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@@ -246,10 +246,6 @@ void GPIO1_Combined_0_15_IRQHandler(void)
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gpio_isr(GPIO1, gpio_pin);
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}
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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-
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rt_interrupt_leave();
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}
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@@ -264,10 +260,6 @@ void GPIO1_Combined_16_31_IRQHandler(void)
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gpio_isr(GPIO1, gpio_pin);
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}
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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-
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rt_interrupt_leave();
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}
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@@ -282,10 +274,6 @@ void GPIO2_Combined_0_15_IRQHandler(void)
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gpio_isr(GPIO2, gpio_pin);
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}
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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-
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rt_interrupt_leave();
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}
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@@ -300,10 +288,6 @@ void GPIO2_Combined_16_31_IRQHandler(void)
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gpio_isr(GPIO2, gpio_pin);
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}
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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-
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rt_interrupt_leave();
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}
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@@ -318,10 +302,6 @@ void GPIO3_Combined_0_15_IRQHandler(void)
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gpio_isr(GPIO3, gpio_pin);
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}
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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-
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rt_interrupt_leave();
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}
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@@ -336,10 +316,6 @@ void GPIO3_Combined_16_31_IRQHandler(void)
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gpio_isr(GPIO3, gpio_pin);
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}
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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-
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rt_interrupt_leave();
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}
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@@ -354,10 +330,6 @@ void GPIO4_Combined_0_15_IRQHandler(void)
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gpio_isr(GPIO4, gpio_pin);
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}
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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-
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rt_interrupt_leave();
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}
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void GPIO4_Combined_16_31_IRQHandler(void)
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@@ -371,10 +343,6 @@ void GPIO4_Combined_16_31_IRQHandler(void)
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gpio_isr(GPIO4, gpio_pin);
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}
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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-
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rt_interrupt_leave();
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}
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@@ -388,10 +356,7 @@ void GPIO5_Combined_0_15_IRQHandler(void)
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{
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gpio_isr(GPIO5, gpio_pin);
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}
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-
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-#if defined __CORTEX_M && (__CORTEX_M == 4U)
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- __DSB();
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-#endif
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+
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rt_interrupt_leave();
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}
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@@ -478,7 +443,7 @@ static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
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- IOMUXC_SetPinMux(0x401F8000U + (pin-125)*4, 0x5U, 0, 0, 0, 1);
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+ IOMUXC_SetPinMux(0x400A8000U + (pin-125)*4, 0x5U, 0, 0, 0, 1);
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}
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gpio.outputLogic = 0;
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@@ -521,8 +486,15 @@ static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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}
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break;
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}
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-
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- IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value);
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+
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+ if(rt1052_pin_map[pin].gpio != GPIO5)
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+ {
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+ IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value);
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+ }
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+ else
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+ {
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+ IOMUXC_SetPinConfig(0, 0, 0, 0, 0x400A8018U + (pin-125)*4, config_value);
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+ }
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GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio);
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}
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@@ -628,7 +600,7 @@ static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, r
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else
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{
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CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
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- IOMUXC_SetPinMux(0x401F8000U + (pin-125)*4, 0x5U, 0, 0, 0, 0);
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+ IOMUXC_SetPinMux(0x400A8000U + (pin-125)*4, 0x5U, 0, 0, 0, 0);
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}
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gpio.direction = kGPIO_DigitalInput;
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