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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2006-2021, RT-Thread Development Team
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+ * Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@@ -7,6 +7,7 @@
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* Date Author Notes
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* 2021-05-18 Jesven the first version
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* 2023-06-24 WangXiaoyao Support backtrace for user thread
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+ * 2024-01-06 Shell Fix barrier on irq_disable/enable
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*/
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#ifndef __ASSEMBLY__
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@@ -36,8 +37,8 @@ int rt_hw_cpu_id(void)
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.weak rt_hw_cpu_id
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.type rt_hw_cpu_id, @function
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rt_hw_cpu_id:
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- mrs x0, tpidr_el1 /* MPIDR_EL1: Multi-Processor Affinity Register */
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- ret
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+ mrs x0, tpidr_el1
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+ ret
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/*
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void rt_hw_set_process_id(size_t id)
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@@ -314,7 +315,8 @@ rt_hw_interrupt_is_disabled:
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rt_hw_interrupt_disable:
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MRS X0, DAIF
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MSR DAIFSet, #3
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- DSB SY
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+ DSB NSH
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+ ISB
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RET
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/*
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@@ -322,7 +324,8 @@ rt_hw_interrupt_disable:
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*/
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.globl rt_hw_interrupt_enable
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rt_hw_interrupt_enable:
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- DSB SY
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+ ISB
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+ DSB NSH
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AND X0, X0, #0xc0
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MRS X1, DAIF
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BIC X1, X1, #0xc0
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@@ -580,4 +583,4 @@ START_POINT(vector_serror)
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STP X0, X1, [SP, #-0x10]!
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BL rt_hw_trap_serror
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b .
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-START_POINT_END(vector_exception)
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+START_POINT_END(vector_serror)
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