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@@ -180,13 +180,12 @@ init_cpu_el:
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/* running at EL3? */
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cmp x0, #3
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- bne .init_cpu_hyp
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+ bne .init_cpu_hyp_test
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/* should never be executed, just for completeness. (EL3) */
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mov x1, #(1 << 0) /* EL0 and EL1 are in Non-Secure state */
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orr x1, x1, #(1 << 4) /* RES1 */
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orr x1, x1, #(1 << 5) /* RES1 */
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- /* bic x1, x1, #(1 << 7) disable Secure Monitor Call */
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orr x1, x1, #(1 << 10) /* The next lower level is AArch64 */
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msr scr_el3, x1
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@@ -201,11 +200,12 @@ init_cpu_el:
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msr elr_el3, x1
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eret
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-.init_cpu_hyp:
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+.init_cpu_hyp_test:
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/* running at EL2? */
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cmp x0, #2 /* EL2 = 0b10 */
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bne .init_cpu_sys
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+.init_cpu_hyp:
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/* Enable CNTP for EL1 */
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mrs x0, cnthctl_el2 /* Counter-timer Hypervisor Control register */
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orr x0, x0, #(1 << 0) /* Don't traps NS EL0/1 accesses to the physical counter */
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