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[BSP][fix and update]STM32F4xx-HAL fix an error

[1]修复了当选择含有CCMRAM的F4系列MCU时造成的heap初始化错误
uestczyh222 7 years ago
parent
commit
dcb0f280b4

+ 13 - 6
bsp/stm32f4xx-HAL/.config

@@ -49,7 +49,7 @@ CONFIG_RT_USING_DEVICE=y
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
-CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart2"
 # CONFIG_RT_USING_MODULE is not set
 
 #
@@ -94,7 +94,7 @@ CONFIG_RT_USING_SERIAL=y
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
-CONFIG_RT_USING_RTC=y
+# CONFIG_RT_USING_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
 # CONFIG_RT_USING_SPI is not set
 # CONFIG_RT_USING_WDT is not set
@@ -136,6 +136,12 @@ CONFIG_RT_USING_RTC=y
 #
 # CONFIG_RT_USING_VBUS is not set
 
+#
+# Utilities
+#
+# CONFIG_RT_USING_LOGTRACE is not set
+# CONFIG_RT_USING_RYM is not set
+
 #
 # RT-Thread online packages
 #
@@ -185,7 +191,7 @@ CONFIG_RT_USING_RTC=y
 # CONFIG_SOC_STM32F415RG is not set
 # CONFIG_SOC_STM32F415VG is not set
 # CONFIG_SOC_STM32F415ZG is not set
-# CONFIG_SOC_STM32F407VG is not set
+CONFIG_SOC_STM32F407VG=y
 # CONFIG_SOC_STM32F407VE is not set
 # CONFIG_SOC_STM32F407ZG is not set
 # CONFIG_SOC_STM32F407ZE is not set
@@ -232,7 +238,7 @@ CONFIG_RT_USING_RTC=y
 # CONFIG_SOC_STM32F401CB is not set
 # CONFIG_SOC_STM32F401CC is not set
 # CONFIG_SOC_STM32F401RB is not set
-CONFIG_SOC_STM32F401RC=y
+# CONFIG_SOC_STM32F401RC is not set
 # CONFIG_SOC_STM32F401VB is not set
 # CONFIG_SOC_STM32F401VC is not set
 # CONFIG_SOC_STM32F401CD is not set
@@ -311,6 +317,7 @@ CONFIG_SOC_STM32F401RC=y
 # CONFIG_SOC_STM32F423ZH is not set
 # CONFIG_RT_USING_HSI is not set
 CONFIG_RT_HSE_VALUE=8000000
-CONFIG_RT_USING_UART1=y
-# CONFIG_RT_USING_UART2 is not set
+CONFIG_RT_HSE_HCLK=168000000
+# CONFIG_RT_USING_UART1 is not set
+CONFIG_RT_USING_UART2=y
 # CONFIG_RT_USING_UART6 is not set

+ 3 - 0
bsp/stm32f4xx-HAL/Kconfig

@@ -290,6 +290,9 @@ config RT_HSE_VALUE
     int "HSE Value"
     default 8000000
     depends on !RT_USING_HSI
+config RT_HSE_HCLK
+    int "System Clock Value"
+    default 84000000
 config RT_USING_UART1
     bool "Using UART1"
     default y    

+ 1 - 1
bsp/stm32f4xx-HAL/SConstruct

@@ -15,7 +15,7 @@ except:
     print RTT_ROOT
     exit(-1)
 
-TARGET = 'rtthread-stm32f411.' + rtconfig.TARGET_EXT
+TARGET = 'rtthread-stm32f4xx.' + rtconfig.TARGET_EXT
 
 env = Environment(tools = ['mingw'],
 	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,

+ 70 - 39
bsp/stm32f4xx-HAL/drivers/board.c

@@ -23,55 +23,86 @@
 
 static void SystemClock_Config(void)
 {
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
-
+    RCC_OscInitTypeDef RCC_OscInitStruct;
+    RCC_ClkInitTypeDef RCC_ClkInitStruct;
+#ifdef RT_USING_RTC
+    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+#endif
     /**Configure the main internal regulator output voltage 
     */
-  __HAL_RCC_PWR_CLK_ENABLE();
+    __HAL_RCC_PWR_CLK_ENABLE();
 
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
+    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 
     /**Initializes the CPU, AHB and APB busses clocks 
     */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 4;
-  RCC_OscInitStruct.PLL.PLLN = 168;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
-  RCC_OscInitStruct.PLL.PLLQ = 7;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
-    while(1)
-		{}
-  }
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+#ifdef RT_USING_RTC
+    RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
+    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+#endif
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLM = (HSE_VALUE/1000000UL);//Get 1M clock
+    RCC_OscInitStruct.PLL.PLLN = (HCLK_VALUE/1000000UL)*2;//Get 2*HCLK_VALUE
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;//Get HCLK_VALUE
+    RCC_OscInitStruct.PLL.PLLQ = RCC_OscInitStruct.PLL.PLLN/48;//Get 48M Clock
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        while(1)
+        {}
+    }
 
     /**Initializes the CPU, AHB and APB busses clocks 
     */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
-  {
-    while(1)
-		{}
-  }
-
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
-  PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
-  {
-    while(1)
-		{}
-  }
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+
+#if (RT_HSE_HCLK <= 42000000UL)
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+    {
+        while(1)
+        {}
+    }
+#elif (RT_HSE_HCLK <= 84000000UL)
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+    {
+        while(1)
+        {}
+    }
+#elif (RT_HSE_HCLK <= 168000000UL)
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
+    {
+        while(1)
+        {}
+    }
+#else
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV8;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)
+    {
+        while(1)
+        {}
+    }
+#endif
+#ifdef RT_USING_RTC
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
+    PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+    {
+        while(1)
+        {}
+    }
+#endif
 }
 /**
  * This is the timer interrupt service routine.

+ 11 - 11
bsp/stm32f4xx-HAL/drivers/board.h

@@ -177,13 +177,13 @@
     defined(SOC_STM32F405VG)||\
     defined(SOC_STM32F405ZG)
 //#define STM32F405xx
-#define STM32_SRAM_SIZE 192-64
+#define STM32_SRAM_SIZE (192-64)
 #elif \
     defined(SOC_STM32F415RG)||\
     defined(SOC_STM32F415VG)||\
     defined(SOC_STM32F415ZG)
 //#define STM32F415xx
-#define STM32_SRAM_SIZE 192-64
+#define STM32_SRAM_SIZE (192-64)
 #elif \
     defined(SOC_STM32F407VG)||\
     defined(SOC_STM32F407VE)||\
@@ -192,7 +192,7 @@
     defined(SOC_STM32F407IG)||\
     defined(SOC_STM32F407IE)
 //#define STM32F407xx
-#define STM32_SRAM_SIZE 192-64
+#define STM32_SRAM_SIZE (192-64)
 #elif \
     defined(SOC_STM32F417VG)||\
     defined(SOC_STM32F417VE)||\
@@ -201,7 +201,7 @@
     defined(SOC_STM32F417IG)||\
     defined(SOC_STM32F417IE)
 //#define STM32F417xx
-#define STM32_SRAM_SIZE 192-64
+#define STM32_SRAM_SIZE (192-64)
 #elif \
     defined(SOC_STM32F427VG)||\
     defined(SOC_STM32F427VI)||\
@@ -210,7 +210,7 @@
     defined(SOC_STM32F427IG)||\
     defined(SOC_STM32F427II)
 //#define STM32F427xx
-#define STM32_SRAM_SIZE 256-64
+#define STM32_SRAM_SIZE (256-64)
 #elif \
     defined(SOC_STM32F437VG)||\
     defined(SOC_STM32F437VI)||\
@@ -219,7 +219,7 @@
     defined(SOC_STM32F437IG)||\
     defined(SOC_STM32F437II)
 //#define STM32F437xx
-#define STM32_SRAM_SIZE 256-64
+#define STM32_SRAM_SIZE (256-64)
 #elif \
     defined(SOC_STM32F429VG)||\
     defined(SOC_STM32F429VI)||\
@@ -232,7 +232,7 @@
     defined(SOC_STM32F429IG)||\
     defined(SOC_STM32F429II)
 //#define STM32F429xx
-#define STM32_SRAM_SIZE 256-64
+#define STM32_SRAM_SIZE (256-64)
 #elif \
     defined(SOC_STM32F439VG)||\
     defined(SOC_STM32F439VI)||\
@@ -245,7 +245,7 @@
     defined(SOC_STM32F439IG)||\
     defined(SOC_STM32F439II)
 //#define STM32F439xx
-#define STM32_SRAM_SIZE 256-64
+#define STM32_SRAM_SIZE (256-64)
 #elif \
     defined(SOC_STM32F401CB)||\
     defined(SOC_STM32F401CC)||\
@@ -313,7 +313,7 @@
     defined(SOC_STM32F469BE)||\
     defined(SOC_STM32F469NE)
 //#define STM32F469xx
-#define STM32_SRAM_SIZE 384-64
+#define STM32_SRAM_SIZE (384-64)
 #elif \
     defined(SOC_STM32F479AI)||\
     defined(SOC_STM32F479II)||\
@@ -324,7 +324,7 @@
     defined(SOC_STM32F479BG)||\
     defined(SOC_STM32F479NG)
 //#define STM32F479xx
-#define STM32_SRAM_SIZE 384-64
+#define STM32_SRAM_SIZE (384-64)
 #elif \
     defined(SOC_STM32F412CEU)||\
     defined(SOC_STM32F412CGU)
@@ -385,7 +385,7 @@ extern int Image$$RW_IRAM1$$ZI$$Limit;
 extern int __bss_end;
 #define HEAP_BEGIN  ((void *)&__bss_end)
 #endif
-#define HEAP_END    (0x20000000 + STM32_SRAM_SIZE*1024)
+#define HEAP_END    STM32_SRAM_END
 
 #endif
 extern void rt_hw_board_init(void);

+ 3 - 3
bsp/stm32f4xx-HAL/drivers/drv_usart.c

@@ -260,7 +260,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
   {
     /* USART1 clock enable */
     __HAL_RCC_USART1_CLK_ENABLE();
-		__HAL_RCC_GPIOA_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
     /**USART1 GPIO Configuration    
     PA9     ------> USART1_TX
     PA10     ------> USART1_RX 
@@ -276,7 +276,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
   {
     /* USART2 clock enable */
     __HAL_RCC_USART2_CLK_ENABLE();
-		__HAL_RCC_GPIOA_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
     /**USART2 GPIO Configuration    
     PA2     ------> USART2_TX
     PA3     ------> USART2_RX 
@@ -292,7 +292,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
   {
     /* USART6 clock enable */
     __HAL_RCC_USART6_CLK_ENABLE();
-		__HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
     /**USART6 GPIO Configuration    
     PC6     ------> USART6_TX
     PC7     ------> USART6_RX 

+ 3 - 2
bsp/stm32f4xx-HAL/drivers/stm32f4xx_hal_conf.h

@@ -103,8 +103,9 @@
   *        (when HSE is used as system clock source, directly or through the PLL).  
   */
 #if !defined  (RT_USING_HSI)
-  #define HSE_VALUE ((unsigned int)RT_HSE_VALUE)
+  #define HSE_VALUE ((unsigned long)RT_HSE_VALUE)
 #endif
+  #define HCLK_VALUE ((unsigned long)RT_HSE_HCLK)
 #if !defined  (HSE_VALUE) 
   #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
@@ -158,7 +159,7 @@
   * @brief This is the HAL system configuration section
   */
 #define  VDD_VALUE		      ((uint32_t)3300U) /*!< Value of VDD in mv */           
-#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */            
+#define  TICK_INT_PRIORITY            ((uint32_t)15U)   /*!< tick interrupt priority */            
 #define  USE_RTOS                     0U     
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U

File diff suppressed because it is too large
+ 130 - 137
bsp/stm32f4xx-HAL/project.uvoptx


+ 52 - 62
bsp/stm32f4xx-HAL/project.uvprojx

@@ -14,16 +14,16 @@
       <uAC6>0</uAC6>
       <TargetOption>
         <TargetCommonOption>
-          <Device>STM32F401RCTx</Device>
+          <Device>STM32F407VGTx</Device>
           <Vendor>STMicroelectronics</Vendor>
           <PackID>Keil.STM32F4xx_DFP.2.11.0</PackID>
           <PackURL>http://www.keil.com/pack</PackURL>
-          <Cpu>IRAM(0x20000000,0x10000) IROM(0x08000000,0x40000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
+          <Cpu>IRAM(0x20000000,0x20000) IRAM2(0x10000000,0x10000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
-          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32F401RCTx$CMSIS\Flash\STM32F4xx_256.FLM))</FlashDriverDll>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000 -FP0($$Device:STM32F407VGTx$CMSIS\Flash\STM32F4xx_1024.FLM))</FlashDriverDll>
           <DeviceId>0</DeviceId>
-          <RegisterFile>$$Device:STM32F401RCTx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h</RegisterFile>
+          <RegisterFile>$$Device:STM32F407VGTx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h</RegisterFile>
           <MemoryEnv></MemoryEnv>
           <Cmp></Cmp>
           <Asm></Asm>
@@ -33,7 +33,7 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>$$Device:STM32F401RCTx$CMSIS\SVD\STM32F401x.svd</SFDFile>
+          <SFDFile>$$Device:STM32F407VGTx$CMSIS\SVD\STM32F40x.svd</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
@@ -138,7 +138,7 @@
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3>"" ()</Flash3>
+          <Flash3></Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
           <pFcarmGrp></pFcarmGrp>
@@ -184,7 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
-            <hadIRAM2>0</hadIRAM2>
+            <hadIRAM2>1</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
             <useUlib>0</useUlib>
@@ -192,7 +192,7 @@
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
             <RoSelD>3</RoSelD>
-            <RwSelD>3</RwSelD>
+            <RwSelD>4</RwSelD>
             <CodeSel>0</CodeSel>
             <OptFeed>0</OptFeed>
             <NoZi1>0</NoZi1>
@@ -244,12 +244,12 @@
               <IRAM>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x10000</Size>
+                <Size>0x20000</Size>
               </IRAM>
               <IROM>
                 <Type>1</Type>
                 <StartAddress>0x8000000</StartAddress>
-                <Size>0x40000</Size>
+                <Size>0x100000</Size>
               </IROM>
               <XRAM>
                 <Type>0</Type>
@@ -274,7 +274,7 @@
               <OCR_RVCT4>
                 <Type>1</Type>
                 <StartAddress>0x8000000</StartAddress>
-                <Size>0x40000</Size>
+                <Size>0x100000</Size>
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
@@ -299,12 +299,12 @@
               <OCR_RVCT9>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x10000</Size>
+                <Size>0x20000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
-                <StartAddress>0x0</StartAddress>
-                <Size>0x0</Size>
+                <StartAddress>0x10000000</StartAddress>
+                <Size>0x10000</Size>
               </OCR_RVCT10>
             </OnChipMemories>
             <RvctStartVector></RvctStartVector>
@@ -334,9 +334,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>USE_HAL_DRIVER, STM32F401xC</Define>
+              <Define>USE_HAL_DRIVER, STM32F407xx</Define>
               <Undefine></Undefine>
-              <IncludePath>applications;.;drivers;Libraries\CMSIS\Device\ST\STM32F4xx\Include;Libraries\CMSIS\Include;Libraries\STM32F4xx_HAL_Driver\Inc;..\..\include;..\..\libcpu\arm\cortex-m4;..\..\libcpu\arm\common;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh</IncludePath>
+              <IncludePath>applications;.;drivers;Libraries\CMSIS\Device\ST\STM32F4xx\Include;Libraries\CMSIS\Include;Libraries\STM32F4xx_HAL_Driver\Inc;..\rt-thread\include;..\rt-thread\libcpu\arm\cortex-m4;..\rt-thread\libcpu\arm\common;..\rt-thread\components\drivers\include;..\rt-thread\components\drivers\include;..\rt-thread\components\drivers\include;..\rt-thread\components\finsh</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -410,11 +410,6 @@
               <FileType>1</FileType>
               <FilePath>drivers\drv_usart.c</FilePath>
             </File>
-            <File>
-              <FileName>drv_rtc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>drivers\drv_rtc.c</FilePath>
-            </File>
           </Files>
         </Group>
         <Group>
@@ -426,9 +421,9 @@
               <FilePath>Libraries\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c</FilePath>
             </File>
             <File>
-              <FileName>startup_stm32f401xc.s</FileName>
+              <FileName>startup_stm32f407xx.s</FileName>
               <FileType>2</FileType>
-              <FilePath>Libraries\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f401xc.s</FilePath>
+              <FilePath>Libraries\CMSIS\Device\ST\STM32F4xx\Source\Templates\arm\startup_stm32f407xx.s</FilePath>
             </File>
           </Files>
         </Group>
@@ -868,77 +863,77 @@
             <File>
               <FileName>clock.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
+              <FilePath>..\rt-thread\src\clock.c</FilePath>
             </File>
             <File>
               <FileName>components.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\components.c</FilePath>
+              <FilePath>..\rt-thread\src\components.c</FilePath>
             </File>
             <File>
               <FileName>device.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
+              <FilePath>..\rt-thread\src\device.c</FilePath>
             </File>
             <File>
               <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
+              <FilePath>..\rt-thread\src\idle.c</FilePath>
             </File>
             <File>
               <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
+              <FilePath>..\rt-thread\src\ipc.c</FilePath>
             </File>
             <File>
               <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
+              <FilePath>..\rt-thread\src\irq.c</FilePath>
             </File>
             <File>
               <FileName>kservice.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
+              <FilePath>..\rt-thread\src\kservice.c</FilePath>
             </File>
             <File>
               <FileName>mem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
+              <FilePath>..\rt-thread\src\mem.c</FilePath>
             </File>
             <File>
               <FileName>memheap.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\memheap.c</FilePath>
+              <FilePath>..\rt-thread\src\memheap.c</FilePath>
             </File>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
+              <FilePath>..\rt-thread\src\mempool.c</FilePath>
             </File>
             <File>
               <FileName>object.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
+              <FilePath>..\rt-thread\src\object.c</FilePath>
             </File>
             <File>
               <FileName>scheduler.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
+              <FilePath>..\rt-thread\src\scheduler.c</FilePath>
             </File>
             <File>
               <FileName>signal.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\signal.c</FilePath>
+              <FilePath>..\rt-thread\src\signal.c</FilePath>
             </File>
             <File>
               <FileName>thread.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
+              <FilePath>..\rt-thread\src\thread.c</FilePath>
             </File>
             <File>
               <FileName>timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>..\rt-thread\src\timer.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -948,27 +943,27 @@
             <File>
               <FileName>cpuport.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
+              <FilePath>..\rt-thread\libcpu\arm\cortex-m4\cpuport.c</FilePath>
             </File>
             <File>
               <FileName>context_rvds.S</FileName>
               <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
+              <FilePath>..\rt-thread\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
             </File>
             <File>
               <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+              <FilePath>..\rt-thread\libcpu\arm\common\backtrace.c</FilePath>
             </File>
             <File>
               <FileName>div0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+              <FilePath>..\rt-thread\libcpu\arm\common\div0.c</FilePath>
             </File>
             <File>
               <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+              <FilePath>..\rt-thread\libcpu\arm\common\showmem.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -978,47 +973,42 @@
             <File>
               <FileName>pin.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\misc\pin.c</FilePath>
-            </File>
-            <File>
-              <FileName>rtc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\rtc\rtc.c</FilePath>
+              <FilePath>..\rt-thread\components\drivers\misc\pin.c</FilePath>
             </File>
             <File>
               <FileName>serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\serial\serial.c</FilePath>
+              <FilePath>..\rt-thread\components\drivers\serial\serial.c</FilePath>
             </File>
             <File>
               <FileName>completion.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\completion.c</FilePath>
+              <FilePath>..\rt-thread\components\drivers\src\completion.c</FilePath>
             </File>
             <File>
               <FileName>dataqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
+              <FilePath>..\rt-thread\components\drivers\src\dataqueue.c</FilePath>
             </File>
             <File>
               <FileName>pipe.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
+              <FilePath>..\rt-thread\components\drivers\src\pipe.c</FilePath>
             </File>
             <File>
               <FileName>ringbuffer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
+              <FilePath>..\rt-thread\components\drivers\src\ringbuffer.c</FilePath>
             </File>
             <File>
               <FileName>waitqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
+              <FilePath>..\rt-thread\components\drivers\src\waitqueue.c</FilePath>
             </File>
             <File>
               <FileName>workqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
+              <FilePath>..\rt-thread\components\drivers\src\workqueue.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -1028,32 +1018,32 @@
             <File>
               <FileName>shell.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\shell.c</FilePath>
+              <FilePath>..\rt-thread\components\finsh\shell.c</FilePath>
             </File>
             <File>
               <FileName>symbol.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\symbol.c</FilePath>
+              <FilePath>..\rt-thread\components\finsh\symbol.c</FilePath>
             </File>
             <File>
               <FileName>cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
+              <FilePath>..\rt-thread\components\finsh\cmd.c</FilePath>
             </File>
             <File>
               <FileName>msh.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\msh.c</FilePath>
+              <FilePath>..\rt-thread\components\finsh\msh.c</FilePath>
             </File>
             <File>
               <FileName>msh_cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\msh_cmd.c</FilePath>
+              <FilePath>..\rt-thread\components\finsh\msh_cmd.c</FilePath>
             </File>
             <File>
               <FileName>msh_file.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\msh_file.c</FilePath>
+              <FilePath>..\rt-thread\components\finsh\msh_file.c</FilePath>
             </File>
           </Files>
         </Group>

+ 12 - 6
bsp/stm32f4xx-HAL/rtconfig.h

@@ -46,7 +46,7 @@
 /* RT_USING_INTERRUPT_INFO is not set */
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
-#define RT_CONSOLE_DEVICE_NAME "uart1"
+#define RT_CONSOLE_DEVICE_NAME "uart2"
 /* RT_USING_MODULE is not set */
 
 /* RT-Thread Components */
@@ -86,7 +86,7 @@
 #define RT_USING_PIN
 /* RT_USING_MTD_NOR is not set */
 /* RT_USING_MTD_NAND is not set */
-#define RT_USING_RTC
+/* RT_USING_RTC is not set */
 /* RT_USING_SDIO is not set */
 /* RT_USING_SPI is not set */
 /* RT_USING_WDT is not set */
@@ -120,6 +120,11 @@
 
 /* RT_USING_VBUS is not set */
 
+/* Utilities */
+
+/* RT_USING_LOGTRACE is not set */
+/* RT_USING_RYM is not set */
+
 /* RT-Thread online packages */
 
 /* system packages */
@@ -159,7 +164,7 @@
 /* SOC_STM32F415RG is not set */
 /* SOC_STM32F415VG is not set */
 /* SOC_STM32F415ZG is not set */
-/* SOC_STM32F407VG is not set */
+#define SOC_STM32F407VG
 /* SOC_STM32F407VE is not set */
 /* SOC_STM32F407ZG is not set */
 /* SOC_STM32F407ZE is not set */
@@ -206,7 +211,7 @@
 /* SOC_STM32F401CB is not set */
 /* SOC_STM32F401CC is not set */
 /* SOC_STM32F401RB is not set */
-#define SOC_STM32F401RC
+/* SOC_STM32F401RC is not set */
 /* SOC_STM32F401VB is not set */
 /* SOC_STM32F401VC is not set */
 /* SOC_STM32F401CD is not set */
@@ -285,8 +290,9 @@
 /* SOC_STM32F423ZH is not set */
 /* RT_USING_HSI is not set */
 #define RT_HSE_VALUE 8000000
-#define RT_USING_UART1
-/* RT_USING_UART2 is not set */
+#define RT_HSE_HCLK 168000000
+/* RT_USING_UART1 is not set */
+#define RT_USING_UART2
 /* RT_USING_UART6 is not set */
 
 #endif

+ 2 - 2
bsp/stm32f4xx-HAL/rtconfig.py

@@ -5,7 +5,7 @@ import os
 # toolchains options
 ARCH='arm'
 CPU='cortex-m4'
-CROSS_TOOL='keil'
+CROSS_TOOL='gcc'
 
 if os.getenv('RTT_CC'):
 	CROSS_TOOL = os.getenv('RTT_CC')
@@ -43,7 +43,7 @@ if PLATFORM == 'gcc':
     OBJDUMP = PREFIX + 'objdump'
     OBJCPY = PREFIX + 'objcopy'
 	
-    DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections'
+    DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
     CFLAGS = DEVICE + ' -std=c99 -Dgcc' # -D' + PART_TYPE
     AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
     LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'

+ 2 - 2
bsp/stm32f4xx-HAL/stm32_rom.ld

@@ -6,8 +6,8 @@
 /* Program Entry, set to mark it as "used" and avoid gc */
 MEMORY
 {
-    CODE (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* 1024KB flash */
-    DATA (rw) : ORIGIN = 0x20000000, LENGTH =  64k /* 128K sram */
+    CODE (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */
+    DATA (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
 _system_stack_size = 0x200;

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