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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2006-2018, RT-Thread Development Team
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+ * Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@@ -11,10 +11,10 @@
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#include <rtthread.h>
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#ifdef BSP_USING_SPI
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-#include "drv_spi.h"
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-#include "fsl_common.h"
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-#include "fsl_iomuxc.h"
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-#include "fsl_lpspi.h"
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+#include "drv_spi.h"
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+#include "fsl_common.h"
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+#include "fsl_iomuxc.h"
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+#include "fsl_lpspi.h"
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#include "fsl_lpspi_edma.h"
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#include "fsl_dmamux.h"
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@@ -177,21 +177,21 @@ void edma_xfer_callback(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, st
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t pin)
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{
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- rt_err_t ret = RT_EOK;
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-
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- struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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- RT_ASSERT(spi_device != RT_NULL);
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-
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- struct imxrt_sw_spi_cs *cs_pin = (struct imxrt_sw_spi_cs *)rt_malloc(sizeof(struct imxrt_sw_spi_cs));
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+ rt_err_t ret = RT_EOK;
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+
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+ struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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+ RT_ASSERT(spi_device != RT_NULL);
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+
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+ struct imxrt_sw_spi_cs *cs_pin = (struct imxrt_sw_spi_cs *)rt_malloc(sizeof(struct imxrt_sw_spi_cs));
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RT_ASSERT(cs_pin != RT_NULL);
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-
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+
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cs_pin->pin = pin;
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- rt_pin_mode(pin, PIN_MODE_OUTPUT);
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- rt_pin_write(pin, PIN_HIGH);
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-
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- ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
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-
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- return ret;
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+ rt_pin_mode(pin, PIN_MODE_OUTPUT);
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+ rt_pin_write(pin, PIN_HIGH);
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+
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+ ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
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+
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+ return ret;
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}
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static uint32_t imxrt_get_lpspi_freq(void)
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@@ -199,31 +199,31 @@ static uint32_t imxrt_get_lpspi_freq(void)
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uint32_t freq = 0;
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/* CLOCK_GetMux(kCLOCK_LpspiMux):
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- 00b: derive clock from PLL3 PFD1 720M
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- 01b: derive clock from PLL3 PFD0 720M
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- 10b: derive clock from PLL2 528M
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- 11b: derive clock from PLL2 PFD2 396M
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+ 00b: derive clock from PLL3 PFD1 720M
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+ 01b: derive clock from PLL3 PFD0 720M
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+ 10b: derive clock from PLL2 528M
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+ 11b: derive clock from PLL2 PFD2 396M
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*/
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switch(CLOCK_GetMux(kCLOCK_LpspiMux))
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{
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case 0:
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- freq = CLOCK_GetFreq(kCLOCK_Usb1PllPfd1Clk);
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- break;
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-
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+ freq = CLOCK_GetFreq(kCLOCK_Usb1PllPfd1Clk);
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+ break;
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+
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case 1:
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- freq = CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk);
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- break;
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-
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+ freq = CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk);
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+ break;
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+
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case 2:
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- freq = CLOCK_GetFreq(kCLOCK_SysPllClk);
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- break;
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-
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+ freq = CLOCK_GetFreq(kCLOCK_SysPllClk);
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+ break;
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+
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case 3:
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- freq = CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk);
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- break;
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+ freq = CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk);
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+ break;
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}
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-
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- freq /= (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1U);
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+
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+ freq /= (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1U);
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return freq;
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}
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@@ -250,7 +250,7 @@ static void lpspi_dma_config(struct imxrt_spi *spi)
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DMAMUX_SetSource(DMAMUX, spi->dma->tx_channel, spi->dma->tx_request);
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DMAMUX_EnableChannel(DMAMUX, spi->dma->tx_channel);
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EDMA_CreateHandle(&spi->dma->tx_edma, DMA0, spi->dma->tx_channel);
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-
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+
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LPSPI_MasterTransferCreateHandleEDMA(spi->base,
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&spi->dma->spi_edma,
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edma_xfer_callback,
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@@ -263,8 +263,8 @@ static void lpspi_dma_config(struct imxrt_spi *spi)
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static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
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{
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- lpspi_master_config_t masterConfig;
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- struct imxrt_spi *spi = RT_NULL;
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+ lpspi_master_config_t masterConfig;
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+ struct imxrt_spi *spi = RT_NULL;
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RT_ASSERT(cfg != RT_NULL);
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RT_ASSERT(device != RT_NULL);
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@@ -274,76 +274,76 @@ static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_config
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if(cfg->data_width != 8 && cfg->data_width != 16 && cfg->data_width != 32)
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{
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- return RT_EINVAL;
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+ return RT_EINVAL;
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}
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- LPSPI_MasterGetDefaultConfig(&masterConfig);
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-
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+ LPSPI_MasterGetDefaultConfig(&masterConfig);
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+
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if(cfg->max_hz > 40*1000*1000)
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{
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cfg->max_hz = 40*1000*1000;
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}
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- masterConfig.baudRate = cfg->max_hz;
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- masterConfig.bitsPerFrame = cfg->data_width;
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-
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+ masterConfig.baudRate = cfg->max_hz;
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+ masterConfig.bitsPerFrame = cfg->data_width;
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+
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if(cfg->mode & RT_SPI_MSB)
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{
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- masterConfig.direction = kLPSPI_MsbFirst;
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+ masterConfig.direction = kLPSPI_MsbFirst;
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}
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else
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{
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- masterConfig.direction = kLPSPI_LsbFirst;
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+ masterConfig.direction = kLPSPI_LsbFirst;
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}
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-
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+
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if(cfg->mode & RT_SPI_CPHA)
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{
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- masterConfig.cpha = kLPSPI_ClockPhaseSecondEdge;
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+ masterConfig.cpha = kLPSPI_ClockPhaseSecondEdge;
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}
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else
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{
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- masterConfig.cpha = kLPSPI_ClockPhaseFirstEdge;
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+ masterConfig.cpha = kLPSPI_ClockPhaseFirstEdge;
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}
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-
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+
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if(cfg->mode & RT_SPI_CPOL)
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{
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- masterConfig.cpol = kLPSPI_ClockPolarityActiveLow;
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+ masterConfig.cpol = kLPSPI_ClockPolarityActiveLow;
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}
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else
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{
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- masterConfig.cpol = kLPSPI_ClockPolarityActiveHigh;
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+ masterConfig.cpol = kLPSPI_ClockPolarityActiveHigh;
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}
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- masterConfig.pinCfg = kLPSPI_SdiInSdoOut;
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+ masterConfig.pinCfg = kLPSPI_SdiInSdoOut;
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masterConfig.dataOutConfig = kLpspiDataOutTristate;
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- masterConfig.pcsToSckDelayInNanoSec = 1000000000 / masterConfig.baudRate;
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- masterConfig.lastSckToPcsDelayInNanoSec = 1000000000 / masterConfig.baudRate;
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- masterConfig.betweenTransferDelayInNanoSec = 1000000000 / masterConfig.baudRate;
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+ masterConfig.pcsToSckDelayInNanoSec = 1000000000 / masterConfig.baudRate;
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+ masterConfig.lastSckToPcsDelayInNanoSec = 1000000000 / masterConfig.baudRate;
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+ masterConfig.betweenTransferDelayInNanoSec = 1000000000 / masterConfig.baudRate;
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- LPSPI_MasterInit(spi->base, &masterConfig, imxrt_get_lpspi_freq());
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- spi->base->CFGR1 |= LPSPI_CFGR1_PCSCFG_MASK;
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+ LPSPI_MasterInit(spi->base, &masterConfig, imxrt_get_lpspi_freq());
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+ spi->base->CFGR1 |= LPSPI_CFGR1_PCSCFG_MASK;
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return RT_EOK;
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}
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static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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- lpspi_transfer_t transfer;
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+ lpspi_transfer_t transfer;
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status_t status;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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- struct imxrt_spi *spi = (struct imxrt_spi *)(device->bus->parent.user_data);
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- struct imxrt_sw_spi_cs *cs = device->parent.user_data;
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+ struct imxrt_spi *spi = (struct imxrt_spi *)(device->bus->parent.user_data);
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+ struct imxrt_sw_spi_cs *cs = device->parent.user_data;
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if(message->cs_take)
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{
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rt_pin_write(cs->pin, PIN_LOW);
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}
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- transfer.dataSize = message->length;
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- transfer.rxData = (uint8_t *)(message->recv_buf);
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- transfer.txData = (uint8_t *)(message->send_buf);
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+ transfer.dataSize = message->length;
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+ transfer.rxData = (uint8_t *)(message->recv_buf);
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+ transfer.txData = (uint8_t *)(message->send_buf);
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if(RT_FALSE == spi->dma_flag)
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{
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@@ -370,10 +370,10 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
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message->length = 0;
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}
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- return message->length;
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+ return message->length;
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}
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-static struct rt_spi_ops imxrt_spi_ops =
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+static struct rt_spi_ops imxrt_spi_ops =
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{
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.configure = spi_configure,
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.xfer = spixfer
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@@ -405,8 +405,8 @@ int rt_hw_spi_bus_init(void)
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lpspis[i].xfer_sem = rt_sem_create(sem_name, 0, RT_IPC_FLAG_PRIO);
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}
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- return ret;
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+ return ret;
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}
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-INIT_BOARD_EXPORT(rt_hw_spi_bus_init);
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+INIT_BOARD_EXPORT(rt_hw_spi_bus_init);
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#endif /* BSP_USING_SPI */
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