Browse Source

Merge pull request #5567 from mysterywolf/nxp

#5564 format codes
guo 3 years ago
parent
commit
e665bacf89

+ 2 - 2
bsp/imxrt/libraries/drivers/drv_can.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -375,7 +375,7 @@ static int can_send(struct rt_can_device *can_dev, const void *buf, rt_uint32_t
         ret = RT_EBUSY;
         break;
     }
-    
+
     return ret;
 }
 

+ 2 - 2
bsp/imxrt/libraries/drivers/drv_can.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2019-06-28     misonyo     the first version.
  */
- 
+
 #ifndef DRV_CAN_H__
 #define DRV_CAN_H__
 

+ 5 - 5
bsp/imxrt/libraries/drivers/drv_eth.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -329,7 +329,7 @@ static status_t _ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, const ui
 #endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
 
         pbuf_copy_partial((const struct pbuf *)data, (void *)address, length, 0);
-            
+
         /* Set data length. */
         curBuffDescrip->length = length;
 #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
@@ -434,7 +434,7 @@ static status_t _ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, const ui
                 address = (uint32_t)curBuffDescrip->buffer;
 #endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
                 DCACHE_CleanByRange(address, handle->txBuffSizeAlign[0]);
-#endif  /* FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL */                 
+#endif  /* FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL */
                 /* Active the transmit buffer descriptor. */
                 _ENET_ActiveSend(base, 0);
 
@@ -454,8 +454,8 @@ static status_t _ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, const ui
 /* transmit packet. */
 rt_err_t rt_imxrt_eth_tx(rt_device_t dev, struct pbuf *p)
 {
-	rt_err_t result = RT_EOK;
-	enet_handle_t * enet_handle = &imxrt_eth_device.enet_handle;
+    rt_err_t result = RT_EOK;
+    enet_handle_t * enet_handle = &imxrt_eth_device.enet_handle;
 
     RT_ASSERT(p != NULL);
     RT_ASSERT(enet_handle != RT_NULL);

+ 2 - 2
bsp/imxrt/libraries/drivers/drv_gpio.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -70,7 +70,7 @@ const struct pin_mask mask_tab[5] =
 #endif
 };
 
-const rt_int8_t reg_offset[] = 
+const rt_int8_t reg_offset[] =
 {
 #if defined(SOC_IMXRT1015_SERIES)
     38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 64, 65, 66, 67, 68, 69,

+ 4 - 4
bsp/imxrt/libraries/drivers/drv_gpio.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,12 +7,12 @@
  * Date           Author       Notes
  * 2018-4-30     misonyo     the first version.
  */
- 
+
 #ifndef DRV_GPIO_H__
 #define DRV_GPIO_H__
 
-#include <rtthread.h> 
-#include <rtdevice.h> 
+#include <rtthread.h>
+#include <rtdevice.h>
 
 #define GET_PIN(PORTx, PIN)      (32 * (PORTx - 1) + (PIN & 31))    /* PORTx:1,2,3,4,5 */
 

+ 121 - 10
bsp/imxrt/libraries/drivers/drv_i2c.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -18,7 +18,7 @@
 #define LOG_TAG              "drv.i2c"
 #include <drv_log.h>
 
-#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4)
+#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4) && !defined(BSP_USING_I2C5)&& !defined(BSP_USING_I2C6)
 #error "Please define at least one BSP_USING_I2Cx"
 #endif
 
@@ -35,6 +35,9 @@ struct imxrt_i2c_bus
     volatile rt_uint32_t msg_ptr;
     volatile rt_uint32_t dptr;
     char *device_name;
+#ifdef SOC_IMXRT1170_SERIES
+    clock_root_t clock_root;
+#endif
 };
 
 #if defined (BSP_USING_I2C1)
@@ -55,13 +58,28 @@ struct imxrt_i2c_bus
 #define I2C4BUS_NAME  "i2c4"
 #endif /*BSP_USING_I2C4*/
 
+#if defined (BSP_USING_I2C5)
+#define I2C5BUS_NAME "i2c5"
+#endif /*BSP_USING_I2C5*/
+
+#if defined (BSP_USING_I2C6)
+#define I2C6BUS_NAME  "i2c6"
+#endif /*BSP_USING_I2C6*/
+
 #endif /* MIMXRT1015_SERIES */
 
-#define LPI2C_CLOCK_SOURCE_DIVIDER 4
+/* Select USB1 PLL (360 MHz) as master lpi2c clock source */
+#define LPI2C_CLOCK_SOURCE_SELECT (1U)
+#ifdef SOC_IMXRT1170_SERIES
+/* Clock divider for master lpi2c clock source */
+#define LPI2C_CLOCK_SOURCE_DIVIDER (12U)
+#else
+#define LPI2C_CLOCK_SOURCE_DIVIDER (0U)
 
 /* Get frequency of lpi2c clock */
-#define LPI2C_CLOCK_FREQUENCY ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (LPI2C_CLOCK_SOURCE_DIVIDER))
+#define LPI2C_CLOCK_FREQUENCY ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (LPI2C_CLOCK_SOURCE_DIVIDER + 1U))
 
+#endif
 #ifdef BSP_USING_I2C1
 static struct imxrt_i2c_bus lpi2c1 =
 {
@@ -96,9 +114,25 @@ static struct imxrt_i2c_bus lpi2c4 =
 };
 #endif /* RT_USING_HW_I2C4 */
 
+#ifdef BSP_USING_I2C5
+static struct imxrt_i2c_bus lpi2c5 =
+{
+    .I2C = LPI2C5,
+    .device_name = I2C5BUS_NAME,
+};
+#endif /* RT_USING_HW_I2C5 */
+
+#ifdef BSP_USING_I2C6
+static struct imxrt_i2c_bus lpi2c6 =
+{
+    .I2C = LPI2C6,
+    .device_name = I2C6BUS_NAME,
+};
+#endif /* RT_USING_HW_I2C6 */
+
 #endif /* MIMXRT1015_SERIES */
 
-#if (defined(BSP_USING_I2C1) || defined(BSP_USING_I2C2) || defined(BSP_USING_I2C3) || defined(BSP_USING_I2C4))
+#if (defined(BSP_USING_I2C1) || defined(BSP_USING_I2C2) || defined(BSP_USING_I2C3) || defined(BSP_USING_I2C4) ||defined(BSP_USING_I2C5) || defined(BSP_USING_I2C6))
 
 static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
                                     struct rt_i2c_msg msgs[],
@@ -123,7 +157,19 @@ static rt_err_t imxrt_lpi2c_configure(struct imxrt_i2c_bus *bus, lpi2c_master_co
     RT_ASSERT(cfg != RT_NULL);
 
     bus->parent.ops = &imxrt_i2c_ops;
+#ifdef SOC_IMXRT1170_SERIES
+    clock_root_config_t rootCfg = {0};
+    rootCfg.mux = LPI2C_CLOCK_SOURCE_SELECT;
+    rootCfg.div = LPI2C_CLOCK_SOURCE_DIVIDER + 1;
+    CLOCK_SetRootClock(bus->clock_root, &rootCfg);
+    volatile uint32_t freq = CLOCK_GetRootClockFreq(bus->clock_root);
+    LPI2C_MasterInit(bus->I2C, cfg, freq);
+#else
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, LPI2C_CLOCK_SOURCE_SELECT);
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, LPI2C_CLOCK_SOURCE_DIVIDER);
     LPI2C_MasterInit(bus->I2C, cfg, LPI2C_CLOCK_FREQUENCY);
+#endif
+
     return RT_EOK;
 }
 
@@ -221,6 +267,37 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
     {
         if (imxrt_i2c->msg[i].flags & RT_I2C_RD)
         {
+            if ((imxrt_i2c->msg[i].flags & RT_I2C_NO_START) != RT_I2C_NO_START)
+            {
+                if (LPI2C_MasterStart(imxrt_i2c->I2C, imxrt_i2c->msg[i].addr, kLPI2C_Write) != kStatus_Success)
+                {
+                    i = 0;
+                    break;
+                }
+
+                while (LPI2C_MasterGetStatusFlags(imxrt_i2c->I2C) & kLPI2C_MasterNackDetectFlag)
+                {
+                }
+
+                if (LPI2C_MasterRepeatedStart(imxrt_i2c->I2C, imxrt_i2c->msg[i].addr, kLPI2C_Read) != kStatus_Success)
+                {
+                    i = 0;
+                    break;
+                }
+            }
+            else
+            {
+                if (LPI2C_MasterStart(imxrt_i2c->I2C, imxrt_i2c->msg[i].addr, kLPI2C_Read) != kStatus_Success)
+                {
+                    i = 0;
+                    break;
+                }
+
+                while (LPI2C_MasterGetStatusFlags(imxrt_i2c->I2C) & kLPI2C_MasterNackDetectFlag)
+                {
+                }
+            }
+
             if (LPI2C_MasterStart(imxrt_i2c->I2C, imxrt_i2c->msg[i].addr, kLPI2C_Read) != kStatus_Success)
             {
                 i = 0;
@@ -245,8 +322,16 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
                 break;
             }
 
-            while (LPI2C_MasterGetStatusFlags(imxrt_i2c->I2C) & kLPI2C_MasterNackDetectFlag)
+            if(LPI2C_MasterWaitForTxFifoAllEmpty(imxrt_i2c->I2C) != kStatus_Success)
             {
+                i = 0;
+                break;
+            }
+
+            if (LPI2C_MasterGetStatusFlags(imxrt_i2c->I2C) & kLPI2C_MasterNackDetectFlag)
+            {
+                i = 0;
+                break;
             }
 
             if (LPI2C_MasterSend(imxrt_i2c->I2C, imxrt_i2c->msg[i].buf, imxrt_i2c->msg[i].len) != kStatus_Success)
@@ -261,11 +346,12 @@ static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
                 break;
             }
         }
-    }
 
-    if (LPI2C_MasterStop(imxrt_i2c->I2C) != kStatus_Success)
-    {
-        i = 0;
+        if (LPI2C_MasterStop(imxrt_i2c->I2C) != kStatus_Success)
+        {
+            i = 0;
+        }
+
     }
 
     imxrt_i2c->msg = RT_NULL;
@@ -341,6 +427,31 @@ int rt_hw_i2c_init(void)
     rt_i2c_bus_device_register(&lpi2c4.parent, lpi2c4.device_name);
 #endif /* BSP_USING_I2C4 */
 
+#if   defined(BSP_USING_I2C5)
+    LPI2C_MasterGetDefaultConfig(&masterConfig);
+#if   defined(HW_I2C5_BADURATE_400kHZ)
+    masterConfig.baudRate_Hz = 400000U;
+#elif defined(HW_I2C5_BADURATE_100kHZ)
+    masterConfig.baudRate_Hz = 100000U;
+#endif  /* HW_I2C5_BADURATE_400kHZ */
+    lpi2c5.clock_root = kCLOCK_Root_Lpi2c5;
+    imxrt_lpi2c_configure(&lpi2c5, &masterConfig);
+    rt_i2c_bus_device_register(&lpi2c5.parent, lpi2c5.device_name);
+#endif /* BSP_USING_I2C5 */
+
+#if   defined(BSP_USING_I2C6)
+    LPI2C_MasterGetDefaultConfig(&masterConfig);
+#if   defined(HW_I2C6_BADURATE_400kHZ)
+    masterConfig.baudRate_Hz = 400000U;
+#elif defined(HW_I2C6_BADURATE_100kHZ)
+    masterConfig.baudRate_Hz = 100000U;
+#endif  /* HW_I2C6_BADURATE_400kHZ */
+    lpi2c6.clock_root = kCLOCK_Root_Lpi2c6;
+    imxrt_lpi2c_configure(&lpi2c6, &masterConfig);
+    rt_i2c_bus_device_register(&lpi2c6.parent, lpi2c6.device_name);
+#endif /* BSP_USING_I2C6 */
+
+
 #endif /* MIMXRT1015_SERIES */
 
     return 0;

+ 1 - 2
bsp/imxrt/libraries/drivers/drv_mdio.c

@@ -1,6 +1,5 @@
-
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

+ 1 - 2
bsp/imxrt/libraries/drivers/drv_mdio.h

@@ -1,6 +1,5 @@
-
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

+ 3 - 3
bsp/imxrt/libraries/drivers/drv_pulse_encoder.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -22,7 +22,7 @@
 #if !defined(BSP_USING_PULSE_ENCODER1) && !defined(BSP_USING_PULSE_ENCODER2) && !defined(BSP_USING_PULSE_ENCODER3) \
     && !defined(BSP_USING_PULSE_ENCODER4)
     #error "Please define at least one BSP_USING_PULSE_ENCODERx"
-    /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
+    /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
 #elif (defined(BSP_USING_PULSE_ENCODER2) || defined(BSP_USING_PULSE_ENCODER3) || defined(BSP_USING_PULSE_ENCODER4)) || defined(SOC_IMXRT1015_SERIES)
     #error "IMXRT1015 had only one quadrature decoder module"
 #elif (defined(BSP_USING_PULSE_ENCODER3) || defined(BSP_USING_PULSE_ENCODER4)) || defined(SOC_IMXRT1020_SERIES)
@@ -157,4 +157,4 @@ int rt_hw_pulse_encoder_init(void)
 }
 INIT_BOARD_EXPORT(rt_hw_pulse_encoder_init);
 
-#endif
+#endif

+ 2 - 2
bsp/imxrt/libraries/drivers/drv_sai.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2018-4-30     misonyo     the first version.
  */
- 
+
 #include <rtthread.h>
 #include <rthw.h>
 #include <rtdef.h>

+ 4 - 4
bsp/imxrt/libraries/drivers/drv_sai.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -30,9 +30,9 @@
 /* Clock divider for sai1 clock source */
 #define DEMO_SAI1_CLOCK_SOURCE_DIVIDER (63U)
 /* Get frequency of sai1 clock */
-#define AUD_BLOCK_CNT	2
-#define AUD_BLOCK_SIZE	1024
-#define AUD_FIFO_SIZE 	(AUD_BLOCK_SIZE * AUD_BLOCK_CNT)
+#define AUD_BLOCK_CNT   2
+#define AUD_BLOCK_SIZE  1024
+#define AUD_FIFO_SIZE   (AUD_BLOCK_SIZE * AUD_BLOCK_CNT)
 #define DEMO_SAI_CLK_FREQ                                                        \
     (CLOCK_GetFreq(kCLOCK_AudioPllClk) / (DEMO_SAI1_CLOCK_SOURCE_DIVIDER + 1U) / \
      (DEMO_SAI1_CLOCK_SOURCE_PRE_DIVIDER + 1U))

+ 10 - 10
bsp/imxrt/libraries/drivers/drv_sdram.c

@@ -31,7 +31,7 @@ int rt_hw_sdram_Init(void)
     /* Initializes the MAC configure structure to zero. */
     memset(&config, 0, sizeof(semc_config_t));
     memset(&sdramconfig, 0, sizeof(semc_sdram_config_t));
-     
+
     /* Initialize SEMC. */
     SEMC_GetDefaultConfig(&config);
     config.dqsMode = kSEMC_Loopbackdqspad;  /* For more accurate timing. */
@@ -68,18 +68,18 @@ int rt_hw_sdram_Init(void)
     {
         LOG_D("sdram init success, mapped at 0x%X, size is %d Kbytes.", SDRAM_BANK_ADDR, SDRAM_SIZE);
 #ifdef RT_USING_MEMHEAP_AS_HEAP
-	/*
-	 * If RT_USING_MEMHEAP_AS_HEAP is enabled, SDRAM is initialized to the heap.
-	 * The heap start address is (base + half size), and the size is (half size - 2M).
-	 * The reasons are:
-	 * 		1. Reserve the half space for SDRAM link case
-	 *		2. Reserve the 2M for non-cache space
-	 */
+    /*
+     * If RT_USING_MEMHEAP_AS_HEAP is enabled, SDRAM is initialized to the heap.
+     * The heap start address is (base + half size), and the size is (half size - 2M).
+     * The reasons are:
+     *      1. Reserve the half space for SDRAM link case
+     *      2. Reserve the 2M for non-cache space
+     */
         rt_memheap_init(&system_heap, "sdram", (void *)(SDRAM_BANK_ADDR + (SDRAM_SIZE * 1024)/2),
-			(SDRAM_SIZE * 1024)/2 - (2 * 1024 * 1024));
+            (SDRAM_SIZE * 1024)/2 - (2 * 1024 * 1024));
 #endif
     }
-    
+
     return result;
 }
 INIT_BOARD_EXPORT(rt_hw_sdram_Init);

+ 2 - 2
bsp/imxrt/libraries/drivers/drv_sdram.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2018-03-27     Liuguang     the first version.
  */
- 
+
 #ifndef DRV_SDRAM_H__
 #define DRV_SDRAM_H__
 

+ 68 - 68
bsp/imxrt/libraries/drivers/drv_spi.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -11,10 +11,10 @@
 #include <rtthread.h>
 #ifdef BSP_USING_SPI
 
-#include "drv_spi.h" 
-#include "fsl_common.h" 
-#include "fsl_iomuxc.h" 
-#include "fsl_lpspi.h" 
+#include "drv_spi.h"
+#include "fsl_common.h"
+#include "fsl_iomuxc.h"
+#include "fsl_lpspi.h"
 #include "fsl_lpspi_edma.h"
 #include "fsl_dmamux.h"
 
@@ -177,21 +177,21 @@ void edma_xfer_callback(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, st
 
 rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t pin)
 {
-    rt_err_t ret = RT_EOK; 
-    
-    struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device)); 
-    RT_ASSERT(spi_device != RT_NULL); 
-    
-    struct imxrt_sw_spi_cs *cs_pin = (struct imxrt_sw_spi_cs *)rt_malloc(sizeof(struct imxrt_sw_spi_cs)); 
+    rt_err_t ret = RT_EOK;
+
+    struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
+    RT_ASSERT(spi_device != RT_NULL);
+
+    struct imxrt_sw_spi_cs *cs_pin = (struct imxrt_sw_spi_cs *)rt_malloc(sizeof(struct imxrt_sw_spi_cs));
     RT_ASSERT(cs_pin != RT_NULL);
-    
+
     cs_pin->pin = pin;
-    rt_pin_mode(pin, PIN_MODE_OUTPUT); 
-    rt_pin_write(pin, PIN_HIGH); 
-    
-    ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin); 
-    
-    return ret; 
+    rt_pin_mode(pin, PIN_MODE_OUTPUT);
+    rt_pin_write(pin, PIN_HIGH);
+
+    ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
+
+    return ret;
 }
 
 static uint32_t imxrt_get_lpspi_freq(void)
@@ -199,31 +199,31 @@ static uint32_t imxrt_get_lpspi_freq(void)
     uint32_t freq = 0;
 
     /* CLOCK_GetMux(kCLOCK_LpspiMux):
-       00b: derive clock from PLL3 PFD1 720M 
-       01b: derive clock from PLL3 PFD0 720M 
-       10b: derive clock from PLL2      528M 
-       11b: derive clock from PLL2 PFD2 396M 
+       00b: derive clock from PLL3 PFD1 720M
+       01b: derive clock from PLL3 PFD0 720M
+       10b: derive clock from PLL2      528M
+       11b: derive clock from PLL2 PFD2 396M
     */
     switch(CLOCK_GetMux(kCLOCK_LpspiMux))
     {
     case 0:
-        freq = CLOCK_GetFreq(kCLOCK_Usb1PllPfd1Clk); 
-        break; 
-        
+        freq = CLOCK_GetFreq(kCLOCK_Usb1PllPfd1Clk);
+        break;
+
     case 1:
-        freq = CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk); 
-        break; 
-    
+        freq = CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk);
+        break;
+
     case 2:
-        freq = CLOCK_GetFreq(kCLOCK_SysPllClk); 
-        break; 
-    
+        freq = CLOCK_GetFreq(kCLOCK_SysPllClk);
+        break;
+
     case 3:
-        freq = CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk); 
-        break; 
+        freq = CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk);
+        break;
     }
-    
-    freq /= (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1U); 
+
+    freq /= (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1U);
 
     return freq;
 }
@@ -250,7 +250,7 @@ static void lpspi_dma_config(struct imxrt_spi *spi)
     DMAMUX_SetSource(DMAMUX, spi->dma->tx_channel, spi->dma->tx_request);
     DMAMUX_EnableChannel(DMAMUX, spi->dma->tx_channel);
     EDMA_CreateHandle(&spi->dma->tx_edma, DMA0, spi->dma->tx_channel);
-    
+
     LPSPI_MasterTransferCreateHandleEDMA(spi->base,
                                         &spi->dma->spi_edma,
                                         edma_xfer_callback,
@@ -263,8 +263,8 @@ static void lpspi_dma_config(struct imxrt_spi *spi)
 
 static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
 {
-    lpspi_master_config_t masterConfig; 
-    struct imxrt_spi *spi = RT_NULL; 
+    lpspi_master_config_t masterConfig;
+    struct imxrt_spi *spi = RT_NULL;
 
     RT_ASSERT(cfg != RT_NULL);
     RT_ASSERT(device != RT_NULL);
@@ -274,76 +274,76 @@ static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_config
 
     if(cfg->data_width != 8 && cfg->data_width != 16 && cfg->data_width != 32)
     {
-        return RT_EINVAL; 
+        return RT_EINVAL;
     }
 
-    LPSPI_MasterGetDefaultConfig(&masterConfig); 
-    
+    LPSPI_MasterGetDefaultConfig(&masterConfig);
+
     if(cfg->max_hz > 40*1000*1000)
     {
         cfg->max_hz = 40*1000*1000;
     }
-    masterConfig.baudRate     = cfg->max_hz; 
-    masterConfig.bitsPerFrame = cfg->data_width; 
-    
+    masterConfig.baudRate     = cfg->max_hz;
+    masterConfig.bitsPerFrame = cfg->data_width;
+
     if(cfg->mode & RT_SPI_MSB)
     {
-        masterConfig.direction = kLPSPI_MsbFirst; 
+        masterConfig.direction = kLPSPI_MsbFirst;
     }
     else
     {
-        masterConfig.direction = kLPSPI_LsbFirst; 
+        masterConfig.direction = kLPSPI_LsbFirst;
     }
-    
+
     if(cfg->mode & RT_SPI_CPHA)
     {
-        masterConfig.cpha = kLPSPI_ClockPhaseSecondEdge; 
+        masterConfig.cpha = kLPSPI_ClockPhaseSecondEdge;
     }
     else
     {
-        masterConfig.cpha = kLPSPI_ClockPhaseFirstEdge; 
+        masterConfig.cpha = kLPSPI_ClockPhaseFirstEdge;
     }
-    
+
     if(cfg->mode & RT_SPI_CPOL)
     {
-        masterConfig.cpol = kLPSPI_ClockPolarityActiveLow; 
+        masterConfig.cpol = kLPSPI_ClockPolarityActiveLow;
     }
     else
     {
-        masterConfig.cpol = kLPSPI_ClockPolarityActiveHigh; 
+        masterConfig.cpol = kLPSPI_ClockPolarityActiveHigh;
     }
 
-    masterConfig.pinCfg                        = kLPSPI_SdiInSdoOut; 
+    masterConfig.pinCfg                        = kLPSPI_SdiInSdoOut;
     masterConfig.dataOutConfig                 = kLpspiDataOutTristate;
-    masterConfig.pcsToSckDelayInNanoSec        = 1000000000 / masterConfig.baudRate; 
-    masterConfig.lastSckToPcsDelayInNanoSec    = 1000000000 / masterConfig.baudRate; 
-    masterConfig.betweenTransferDelayInNanoSec = 1000000000 / masterConfig.baudRate; 
+    masterConfig.pcsToSckDelayInNanoSec        = 1000000000 / masterConfig.baudRate;
+    masterConfig.lastSckToPcsDelayInNanoSec    = 1000000000 / masterConfig.baudRate;
+    masterConfig.betweenTransferDelayInNanoSec = 1000000000 / masterConfig.baudRate;
 
-    LPSPI_MasterInit(spi->base, &masterConfig, imxrt_get_lpspi_freq()); 
-    spi->base->CFGR1 |= LPSPI_CFGR1_PCSCFG_MASK; 
+    LPSPI_MasterInit(spi->base, &masterConfig, imxrt_get_lpspi_freq());
+    spi->base->CFGR1 |= LPSPI_CFGR1_PCSCFG_MASK;
 
     return RT_EOK;
 }
 
 static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
 {
-    lpspi_transfer_t transfer; 
+    lpspi_transfer_t transfer;
     status_t status;
     RT_ASSERT(device != RT_NULL);
     RT_ASSERT(device->bus != RT_NULL);
     RT_ASSERT(device->bus->parent.user_data != RT_NULL);
 
-    struct imxrt_spi *spi = (struct imxrt_spi *)(device->bus->parent.user_data); 
-    struct imxrt_sw_spi_cs *cs = device->parent.user_data; 
+    struct imxrt_spi *spi = (struct imxrt_spi *)(device->bus->parent.user_data);
+    struct imxrt_sw_spi_cs *cs = device->parent.user_data;
 
     if(message->cs_take)
     {
         rt_pin_write(cs->pin, PIN_LOW);
     }
 
-    transfer.dataSize = message->length; 
-    transfer.rxData   = (uint8_t *)(message->recv_buf); 
-    transfer.txData   = (uint8_t *)(message->send_buf); 
+    transfer.dataSize = message->length;
+    transfer.rxData   = (uint8_t *)(message->recv_buf);
+    transfer.txData   = (uint8_t *)(message->send_buf);
 
     if(RT_FALSE == spi->dma_flag)
     {
@@ -370,10 +370,10 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
         message->length = 0;
     }
 
-    return message->length; 
+    return message->length;
 }
 
-static struct rt_spi_ops imxrt_spi_ops = 
+static struct rt_spi_ops imxrt_spi_ops =
 {
     .configure = spi_configure,
     .xfer      = spixfer
@@ -405,8 +405,8 @@ int rt_hw_spi_bus_init(void)
         lpspis[i].xfer_sem = rt_sem_create(sem_name, 0, RT_IPC_FLAG_PRIO);
     }
 
-    return ret; 
+    return ret;
 }
-INIT_BOARD_EXPORT(rt_hw_spi_bus_init); 
+INIT_BOARD_EXPORT(rt_hw_spi_bus_init);
 
 #endif /* BSP_USING_SPI */

+ 2 - 2
bsp/imxrt/libraries/drivers/drv_spi.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2018-03-27     Liuguang     the first version.
  */
- 
+
 #ifndef DRV_SPI_H__
 #define DRV_SPI_H__
 

+ 2 - 2
bsp/imxrt/libraries/drivers/drv_uart.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -461,7 +461,7 @@ void edma_rx_callback(struct _edma_handle *handle, void *userData, bool transfer
             recv_len = uart->serial.config.bufsz - uart->dma_rx->last_index;
             uart->dma_rx->last_index = 0;
         }
-        else    
+        else
         {
             /* clear half interrupt */
             EDMA_ClearChannelStatusFlags(DMA0, uart->dma_rx->channel,kEDMA_InterruptFlag);

+ 3 - 3
bsp/imxrt/libraries/drivers/usb/device/usb_device.h

@@ -253,7 +253,7 @@ extern "C" {
  * @retval kStatus_USB_Busy                 Cannot allocate a device handle.
  * @retval kStatus_USB_ControllerNotFound   Cannot find the controller according to the controller id.
  * @retval kStatus_USB_InvalidControllerInterface  The controller driver interfaces is invalid. There is an empty
- * 													interface entity.
+ *                                                  interface entity.
  * @retval kStatus_USB_Error                The macro USB_DEVICE_CONFIG_ENDPOINTS is more than the IP's endpoint number.
  *                                          Or, the device has been initialized.
  *                                          Or, the mutex or message queue is created failed.
@@ -501,8 +501,8 @@ extern usb_status_t USB_DeviceDcdInitModule(usb_device_handle handle, void *time
  *
  * @param[in] handle The device handle got from #USB_DeviceInit.
  *
- * @retval kStatus_USB_Success 			 The device is stopped successfully.
- * @retval kStatus_USB_InvalidHandle		 The device handle is a NULL pointer or the controller handle is invalid.
+ * @retval kStatus_USB_Success           The device is stopped successfully.
+ * @retval kStatus_USB_InvalidHandle         The device handle is a NULL pointer or the controller handle is invalid.
  */
 extern usb_status_t USB_DeviceDcdDeinitModule(usb_device_handle handle);
 #endif