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@@ -25,7 +25,7 @@
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#endif
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#ifdef RT_SERIAL_USING_DMA
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- static void stm32_dma_config(struct rt_serial_device *serial);
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+ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
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#endif
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enum
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@@ -171,10 +171,7 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar
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#ifdef RT_SERIAL_USING_DMA
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case RT_DEVICE_CTRL_CONFIG:
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- if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
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- {
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- stm32_dma_config(serial);
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- }
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+ stm32_dma_config(serial, ctrl_arg);
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break;
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#endif
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}
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@@ -219,12 +216,39 @@ static int stm32_getc(struct rt_serial_device *serial)
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return ch;
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}
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+static rt_size_t stm32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
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+{
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+ struct stm32_uart *uart;
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+ RT_ASSERT(serial != RT_NULL);
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+ uart = (struct stm32_uart *)(serial->parent.user_data);
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+ RT_ASSERT(uart != RT_NULL);
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+
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+ if (size == 0)
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+ {
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+ return 0;
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+ }
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+
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+ if (RT_SERIAL_DMA_TX == direction)
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+ {
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+ if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK)
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+ {
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+ return size;
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+ }
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+ else
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+ {
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+ return 0;
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+ }
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+ }
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+ return 0;
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+}
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+
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static const struct rt_uart_ops stm32_uart_ops =
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{
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.configure = stm32_configure,
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.control = stm32_control,
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.putc = stm32_putc,
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.getc = stm32_getc,
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+ .dma_transmit = stm32_dma_transmit
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};
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/**
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@@ -252,13 +276,13 @@ static void uart_isr(struct rt_serial_device *serial)
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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#ifdef RT_SERIAL_USING_DMA
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- else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) &&
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- (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
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+ else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
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+ && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
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{
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level = rt_hw_interrupt_disable();
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- recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle));
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- recv_len = recv_total_index - uart->dma.last_index;
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- uart->dma.last_index = recv_total_index;
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+ recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
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+ recv_len = recv_total_index - uart->dma_rx.last_index;
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+ uart->dma_rx.last_index = recv_total_index;
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rt_hw_interrupt_enable(level);
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if (recv_len)
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@@ -267,6 +291,17 @@ static void uart_isr(struct rt_serial_device *serial)
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}
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__HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
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}
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+ else if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
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+ {
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+ if ((serial->parent.open_flag & RT_DEVICE_FLAG_DMA_TX) != 0)
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+ {
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+ HAL_UART_IRQHandler(&(uart->handle));
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+ }
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+ else
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+ {
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+ UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
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+ }
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+ }
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#endif
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else
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{
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@@ -324,20 +359,20 @@ static void dma_isr(struct rt_serial_device *serial)
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uart = (struct stm32_uart *) serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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- if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma.handle), DMA_IT_TC) != RESET) ||
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- (__HAL_DMA_GET_IT_SOURCE(&(uart->dma.handle), DMA_IT_HT) != RESET))
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+ if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_TC) != RESET) ||
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+ (__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_HT) != RESET))
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{
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level = rt_hw_interrupt_disable();
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- recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle));
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+ recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
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if (recv_total_index == 0)
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{
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- recv_len = serial->config.bufsz - uart->dma.last_index;
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+ recv_len = serial->config.bufsz - uart->dma_rx.last_index;
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}
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else
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{
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- recv_len = recv_total_index - uart->dma.last_index;
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+ recv_len = recv_total_index - uart->dma_rx.last_index;
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}
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- uart->dma.last_index = recv_total_index;
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+ uart->dma_rx.last_index = recv_total_index;
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rt_hw_interrupt_enable(level);
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if (recv_len)
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@@ -365,12 +400,24 @@ void UART1_DMA_RX_IRQHandler(void)
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/* enter interrupt */
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rt_interrupt_enter();
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- HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma.handle);
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+ HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_rx.handle);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
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+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
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+void UART1_DMA_TX_IRQHandler(void)
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+{
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+
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+ HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_tx.handle);
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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@@ -390,12 +437,24 @@ void UART2_DMA_RX_IRQHandler(void)
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/* enter interrupt */
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rt_interrupt_enter();
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- HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma.handle);
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+ HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_rx.handle);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
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+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
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+void UART2_DMA_TX_IRQHandler(void)
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+{
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+
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+ HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_tx.handle);
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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@@ -415,12 +474,24 @@ void UART3_DMA_RX_IRQHandler(void)
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/* enter interrupt */
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rt_interrupt_enter();
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- HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma.handle);
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+ HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_rx.handle);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
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+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
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+void UART3_DMA_TX_IRQHandler(void)
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+{
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+
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+ HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_tx.handle);
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART3_TX_USING_DMA) */
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#endif /* BSP_USING_UART3*/
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#if defined(BSP_USING_UART4)
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@@ -440,12 +511,25 @@ void UART4_DMA_RX_IRQHandler(void)
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/* enter interrupt */
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rt_interrupt_enter();
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- HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma.handle);
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+ HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_rx.handle);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
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+
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+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
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+void UART4_DMA_TX_IRQHandler(void)
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+{
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+
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+ HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_tx.handle);
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART4_TX_USING_DMA) */
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#endif /* BSP_USING_UART4*/
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#if defined(BSP_USING_UART5)
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@@ -465,12 +549,24 @@ void UART5_DMA_RX_IRQHandler(void)
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/* enter interrupt */
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rt_interrupt_enter();
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- HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma.handle);
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+ HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_rx.handle);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
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+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
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+void UART5_DMA_TX_IRQHandler(void)
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+{
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+
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+ HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_tx.handle);
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
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#endif /* BSP_USING_UART5*/
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#if defined(BSP_USING_UART6)
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@@ -490,12 +586,24 @@ void UART6_DMA_RX_IRQHandler(void)
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/* enter interrupt */
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rt_interrupt_enter();
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- HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma.handle);
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+ HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_rx.handle);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
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+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
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+void UART6_DMA_TX_IRQHandler(void)
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+{
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+
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+ HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_tx.handle);
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
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#endif /* BSP_USING_UART6*/
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#if defined(BSP_USING_LPUART1)
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@@ -515,7 +623,7 @@ void LPUART1_DMA_RX_IRQHandler(void)
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/* enter interrupt */
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rt_interrupt_enter();
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- HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle);
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+ HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma_rx.handle);
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/* leave interrupt */
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rt_interrupt_leave();
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@@ -524,13 +632,27 @@ void LPUART1_DMA_RX_IRQHandler(void)
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#endif /* BSP_USING_LPUART1*/
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#ifdef RT_SERIAL_USING_DMA
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-static void stm32_dma_config(struct rt_serial_device *serial)
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+static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
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{
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+ struct rt_serial_rx_fifo *rx_fifo;
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+ DMA_HandleTypeDef *DMA_Handle;
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+ struct dma_config *dma_config;
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+ struct stm32_uart *uart;
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+
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RT_ASSERT(serial != RT_NULL);
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- struct stm32_uart *uart = (struct stm32_uart *)serial->parent.user_data;
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+ uart = (struct stm32_uart *)serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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- struct rt_serial_rx_fifo *rx_fifo;
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+ if (RT_DEVICE_FLAG_DMA_RX == flag)
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+ {
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+ DMA_Handle = &uart->dma_rx.handle;
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+ dma_config = uart->config->dma_rx;
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+ }
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+ else if (RT_DEVICE_FLAG_DMA_TX == flag)
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+ {
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+ DMA_Handle = &uart->dma_tx.handle;
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+ dma_config = uart->config->dma_tx;
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+ }
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LOG_D("%s dma config start", uart->config->name);
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{
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@@ -538,67 +660,86 @@ static void stm32_dma_config(struct rt_serial_device *serial)
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
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|| defined(SOC_SERIES_STM32L0)
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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- SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
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- tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
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+ SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
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+ tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
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#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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- SET_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
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- tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
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+ SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
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+ tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
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#endif
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UNUSED(tmpreg); /* To avoid compiler warnings */
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}
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- __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle);
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+ if (RT_DEVICE_FLAG_DMA_RX == flag)
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+ {
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+ __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma_rx.handle);
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+ }
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+ else if (RT_DEVICE_FLAG_DMA_TX == flag)
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+ {
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+ __HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
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+ }
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
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- uart->dma.handle.Instance = uart->config->dma_rx->Instance;
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+ DMA_Handle->Instance = dma_config->Instance;
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#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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- uart->dma.handle.Instance = uart->config->dma_rx->Instance;
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- uart->dma.handle.Init.Channel = uart->config->dma_rx->channel;
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+ DMA_Handle->Instance = dma_config->Instance;
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+ DMA_Handle->Init.Channel = dma_config->channel;
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#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
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- uart->dma.handle.Instance = uart->config->dma_rx->Instance;
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- uart->dma.handle.Init.Request = uart->config->dma_rx->request;
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-#endif
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- uart->dma.handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
|
|
- uart->dma.handle.Init.PeriphInc = DMA_PINC_DISABLE;
|
|
|
- uart->dma.handle.Init.MemInc = DMA_MINC_ENABLE;
|
|
|
- uart->dma.handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
|
- uart->dma.handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
|
- uart->dma.handle.Init.Mode = DMA_CIRCULAR;
|
|
|
- uart->dma.handle.Init.Priority = DMA_PRIORITY_MEDIUM;
|
|
|
+ DMA_Handle->Instance = dma_config->Instance;
|
|
|
+ DMA_Handle->Init.Request = dma_config->request;
|
|
|
+#endif
|
|
|
+ DMA_Handle->Init.PeriphInc = DMA_PINC_DISABLE;
|
|
|
+ DMA_Handle->Init.MemInc = DMA_MINC_ENABLE;
|
|
|
+ DMA_Handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
|
+ DMA_Handle->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
|
+
|
|
|
+ if (RT_DEVICE_FLAG_DMA_RX == flag)
|
|
|
+ {
|
|
|
+ DMA_Handle->Init.Direction = DMA_PERIPH_TO_MEMORY;
|
|
|
+ DMA_Handle->Init.Mode = DMA_CIRCULAR;
|
|
|
+ }
|
|
|
+ else if (RT_DEVICE_FLAG_DMA_TX == flag)
|
|
|
+ {
|
|
|
+ DMA_Handle->Init.Direction = DMA_MEMORY_TO_PERIPH;
|
|
|
+ DMA_Handle->Init.Mode = DMA_NORMAL;
|
|
|
+ }
|
|
|
+
|
|
|
+ DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM;
|
|
|
#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
|
|
|
- uart->dma.handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
|
|
+ DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
|
|
#endif
|
|
|
- if (HAL_DMA_DeInit(&(uart->dma.handle)) != HAL_OK)
|
|
|
+ if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK)
|
|
|
{
|
|
|
RT_ASSERT(0);
|
|
|
}
|
|
|
|
|
|
- if (HAL_DMA_Init(&(uart->dma.handle)) != HAL_OK)
|
|
|
+ if (HAL_DMA_Init(DMA_Handle) != HAL_OK)
|
|
|
{
|
|
|
RT_ASSERT(0);
|
|
|
}
|
|
|
|
|
|
- rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
|
|
|
-
|
|
|
- /* Start DMA transfer */
|
|
|
- if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
|
|
|
+ /* enable interrupt */
|
|
|
+ if (flag == RT_DEVICE_FLAG_DMA_RX)
|
|
|
{
|
|
|
- /* Transfer error in reception process */
|
|
|
- RT_ASSERT(0);
|
|
|
+ rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
|
|
|
+ /* Start DMA transfer */
|
|
|
+ if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
|
|
|
+ {
|
|
|
+ /* Transfer error in reception process */
|
|
|
+ RT_ASSERT(0);
|
|
|
+ }
|
|
|
+ CLEAR_BIT(uart->handle.Instance->CR3, USART_CR3_EIE);
|
|
|
+ __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
|
|
|
}
|
|
|
-
|
|
|
- /* enable interrupt */
|
|
|
- __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
|
|
|
-
|
|
|
- /* enable rx irq */
|
|
|
- HAL_NVIC_SetPriority(uart->config->dma_rx->dma_irq, 0, 0);
|
|
|
- HAL_NVIC_EnableIRQ(uart->config->dma_rx->dma_irq);
|
|
|
+
|
|
|
+ /* enable irq */
|
|
|
+ HAL_NVIC_SetPriority(dma_config->dma_irq, 0, 0);
|
|
|
+ HAL_NVIC_EnableIRQ(dma_config->dma_irq);
|
|
|
|
|
|
HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
|
|
|
HAL_NVIC_EnableIRQ(uart->config->irq_type);
|
|
|
|
|
|
- LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance);
|
|
|
+ LOG_D("%s dma %s instance: %x", uart->config->name, flag == RT_DEVICE_FLAG_DMA_RX ? "RX" : "TX", DMA_Handle->Instance);
|
|
|
LOG_D("%s dma config done", uart->config->name);
|
|
|
}
|
|
|
|
|
|
@@ -646,44 +787,99 @@ void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
|
|
|
uart = (struct stm32_uart *)huart;
|
|
|
dma_isr(&uart->serial);
|
|
|
}
|
|
|
+void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
|
|
|
+{
|
|
|
+ struct stm32_uart *uart;
|
|
|
+ RT_ASSERT(huart != NULL);
|
|
|
+ uart = (struct stm32_uart *)huart;
|
|
|
+ rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
|
|
|
+}
|
|
|
#endif /* RT_SERIAL_USING_DMA */
|
|
|
|
|
|
static void stm32_uart_get_dma_config(void)
|
|
|
{
|
|
|
+#ifdef BSP_USING_UART1
|
|
|
+ uart_obj[UART1_INDEX].uart_dma_flag = 0;
|
|
|
#ifdef BSP_UART1_RX_USING_DMA
|
|
|
- uart_obj[UART1_INDEX].uart_dma_flag = 1;
|
|
|
- static struct dma_config uart1_dma_rx = UART1_DMA_CONFIG;
|
|
|
+ uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart1_dma_rx = UART1_DMA_RX_CONFIG;
|
|
|
uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
|
|
|
#endif
|
|
|
+#ifdef BSP_UART1_TX_USING_DMA
|
|
|
+ uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart1_dma_tx = UART1_DMA_TX_CONFIG;
|
|
|
+ uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART2
|
|
|
+ uart_obj[UART2_INDEX].uart_dma_flag = 0;
|
|
|
#ifdef BSP_UART2_RX_USING_DMA
|
|
|
- uart_obj[UART2_INDEX].uart_dma_flag = 1;
|
|
|
- static struct dma_config uart2_dma_rx = UART2_DMA_CONFIG;
|
|
|
+ uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart2_dma_rx = UART2_DMA_RX_CONFIG;
|
|
|
uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
|
|
|
#endif
|
|
|
+#ifdef BSP_UART2_TX_USING_DMA
|
|
|
+ uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart2_dma_tx = UART2_DMA_TX_CONFIG;
|
|
|
+ uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART3
|
|
|
+ uart_obj[UART3_INDEX].uart_dma_flag = 0;
|
|
|
#ifdef BSP_UART3_RX_USING_DMA
|
|
|
- uart_obj[UART3_INDEX].uart_dma_flag = 1;
|
|
|
- static struct dma_config uart3_dma_rx = UART3_DMA_CONFIG;
|
|
|
+ uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart3_dma_rx = UART3_DMA_RX_CONFIG;
|
|
|
uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
|
|
|
#endif
|
|
|
+#ifdef BSP_UART3_TX_USING_DMA
|
|
|
+ uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart3_dma_tx = UART3_DMA_TX_CONFIG;
|
|
|
+ uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART4
|
|
|
+ uart_obj[UART4_INDEX].uart_dma_flag = 0;
|
|
|
#ifdef BSP_UART4_RX_USING_DMA
|
|
|
- uart_obj[UART4_INDEX].uart_dma_flag = 1;
|
|
|
- static struct dma_config uart4_dma_rx = UART4_DMA_CONFIG;
|
|
|
+ uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart4_dma_rx = UART4_DMA_RX_CONFIG;
|
|
|
uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
|
|
|
#endif
|
|
|
+#ifdef BSP_UART4_TX_USING_DMA
|
|
|
+ uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
|
|
|
+ uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART5
|
|
|
+ uart_obj[UART5_INDEX].uart_dma_flag = 0;
|
|
|
#ifdef BSP_UART5_RX_USING_DMA
|
|
|
- uart_obj[UART5_INDEX].uart_dma_flag = 1;
|
|
|
- static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG;
|
|
|
+ uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart5_dma_rx = UART5_DMA_RX_CONFIG;
|
|
|
uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
|
|
|
#endif
|
|
|
+#ifdef BSP_UART5_TX_USING_DMA
|
|
|
+ uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart5_dma_tx = UART5_DMA_TX_CONFIG;
|
|
|
+ uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART6
|
|
|
+ uart_obj[UART6_INDEX].uart_dma_flag = 0;
|
|
|
#ifdef BSP_UART6_RX_USING_DMA
|
|
|
- uart_obj[UART6_INDEX].uart_dma_flag = 1;
|
|
|
- static struct dma_config uart6_dma_rx = UART6_DMA_CONFIG;
|
|
|
+ uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart6_dma_rx = UART6_DMA_RX_CONFIG;
|
|
|
uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
|
|
|
#endif
|
|
|
-#ifdef BSP_LPUART1_RX_USING_DMA
|
|
|
- uart_obj[LPUART1_INDEX].uart_dma_flag = 1;
|
|
|
- static struct dma_config lpuart1_dma_rx = LPUART1_DMA_CONFIG;
|
|
|
- uart_config[LPUART1_INDEX].dma_rx = &lpuart1_dma_rx;
|
|
|
+#ifdef BSP_UART6_TX_USING_DMA
|
|
|
+ uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart6_dma_tx = UART6_DMA_TX_CONFIG;
|
|
|
+ uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
|
|
|
+#endif
|
|
|
#endif
|
|
|
}
|
|
|
|
|
|
@@ -700,23 +896,13 @@ int rt_hw_usart_init(void)
|
|
|
uart_obj[i].config = &uart_config[i];
|
|
|
uart_obj[i].serial.ops = &stm32_uart_ops;
|
|
|
uart_obj[i].serial.config = config;
|
|
|
-
|
|
|
-#if defined(RT_SERIAL_USING_DMA)
|
|
|
- if (uart_obj[i].uart_dma_flag)
|
|
|
- {
|
|
|
- /* register UART device */
|
|
|
- result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
|
|
|
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX
|
|
|
- , &uart_obj[i]);
|
|
|
- }
|
|
|
- else
|
|
|
-#endif
|
|
|
- {
|
|
|
- /* register UART device */
|
|
|
- result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
|
|
|
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
|
|
|
- , &uart_obj[i]);
|
|
|
- }
|
|
|
+ /* register UART device */
|
|
|
+ result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
|
|
|
+ RT_DEVICE_FLAG_RDWR
|
|
|
+ | RT_DEVICE_FLAG_INT_RX
|
|
|
+ | RT_DEVICE_FLAG_INT_TX
|
|
|
+ | uart_obj[i].uart_dma_flag
|
|
|
+ , &uart_obj[i]);
|
|
|
RT_ASSERT(result == RT_EOK);
|
|
|
}
|
|
|
|
Bernard Xiong