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@@ -1,486 +1,493 @@
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-;/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
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-;* File Name : startup_stm32f10x_hd.s
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-;* Author : MCD Application Team
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-;* Version : V3.0.0
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-;* Date : 04/06/2009
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-;* Description : STM32F10x High Density Devices vector table for EWARM5.x
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-;* toolchain.
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-;* This module performs:
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-;* - Set the initial SP
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-;* - Set the initial PC == __iar_program_start,
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-;* - Set the vector table entries with the exceptions ISR address,
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-;* - Configure external SRAM mounted on STM3210E-EVAL board
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-;* to be used as data memory (optional, to be enabled by user)
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-;* After Reset the Cortex-M3 processor is in Thread mode,
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-;* priority is Privileged, and the Stack is set to Main.
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-;********************************************************************************
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-;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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-;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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-;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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-;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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-;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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-;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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-;*******************************************************************************/
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-;
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-;
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-; The modules in this file are included in the libraries, and may be replaced
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-; by any user-defined modules that define the PUBLIC symbol _program_start or
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-; a user defined start symbol.
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-; To override the cstartup defined in the library, simply add your modified
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-; version to the workbench project.
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-;
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-; The vector table is normally located at address 0.
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-; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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-; The name "__vector_table" has special meaning for C-SPY:
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-; it is where the SP start value is found, and the NVIC vector
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-; table register (VTOR) is initialized to this address if != 0.
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-;
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-; Cortex-M version
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-;
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-
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- MODULE ?cstartup
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-
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- ;; ICODE is the same segment as cstartup. By placing __low_level_init
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- ;; in the same segment, we make sure it can be reached with BL. */
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-
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- SECTION CSTACK:DATA:NOROOT(3)
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- SECTION .icode:CODE:NOROOT(2)
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-
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- IMPORT rt_hw_hard_fault
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- IMPORT rt_hw_pend_sv
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- IMPORT rt_hw_timer_handler
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- IMPORT rt_hw_uart2_rx_handler
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-
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- PUBLIC __low_level_init
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-
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- PUBWEAK SystemInit_ExtMemCtl
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- SECTION .text:CODE:REORDER(2)
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- THUMB
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-SystemInit_ExtMemCtl
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- BX LR
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-
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-__low_level_init:
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-
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- ;; Initialize hardware.
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- LDR R0, = SystemInit_ExtMemCtl ; initialize external memory controller
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- MOV R11, LR
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- BLX R0
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- LDR R1, =sfe(CSTACK) ; restore original stack pointer
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- MSR MSP, R1
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- MOV R0,#1
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- ;; Return with BX to be independent of mode of caller
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- BX R11
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-
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- ;; Forward declaration of sections.
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- SECTION .intvec:CODE:NOROOT(2)
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-
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- EXTERN __iar_program_start
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- PUBLIC __vector_table
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-
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- DATA
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-__vector_table
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- DCD sfe(CSTACK)
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- DCD __iar_program_start
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-
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- DCD NMI_Handler ; NMI Handler
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- DCD rt_hw_hard_fault ; Hard Fault Handler
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- DCD MemManage_Handler ; MPU Fault Handler
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- DCD BusFault_Handler ; Bus Fault Handler
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- DCD UsageFault_Handler ; Usage Fault Handler
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- DCD 0 ; Reserved
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- DCD 0 ; Reserved
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- DCD 0 ; Reserved
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- DCD 0 ; Reserved
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- DCD SVC_Handler ; SVCall Handler
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- DCD DebugMon_Handler ; Debug Monitor Handler
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- DCD 0 ; Reserved
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- DCD rt_hw_pend_sv ; PendSV Handler
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- DCD rt_hw_timer_handler ; SysTick Handler
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-
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- ; External Interrupts
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- DCD WWDG_IRQHandler ; Window Watchdog
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- DCD PVD_IRQHandler ; PVD through EXTI Line detect
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- DCD TAMPER_IRQHandler ; Tamper
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- DCD RTC_IRQHandler ; RTC
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- DCD FLASH_IRQHandler ; Flash
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- DCD RCC_IRQHandler ; RCC
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- DCD EXTI0_IRQHandler ; EXTI Line 0
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- DCD EXTI1_IRQHandler ; EXTI Line 1
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- DCD EXTI2_IRQHandler ; EXTI Line 2
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- DCD EXTI3_IRQHandler ; EXTI Line 3
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- DCD EXTI4_IRQHandler ; EXTI Line 4
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- DCD rt_hw_uart2_rx_handler
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- DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
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- DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
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- DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
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- DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
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- DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
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- DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
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- DCD ADC1_2_IRQHandler ; ADC1 & ADC2
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- DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
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- DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
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- DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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- DCD CAN1_SCE_IRQHandler ; CAN1 SCE
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- DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
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- DCD TIM1_BRK_IRQHandler ; TIM1 Break
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- DCD TIM1_UP_IRQHandler ; TIM1 Update
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- DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
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- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
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- DCD TIM2_IRQHandler ; TIM2
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- DCD TIM3_IRQHandler ; TIM3
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- DCD TIM4_IRQHandler ; TIM4
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- DCD I2C1_EV_IRQHandler ; I2C1 Event
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- DCD I2C1_ER_IRQHandler ; I2C1 Error
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- DCD I2C2_EV_IRQHandler ; I2C2 Event
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- DCD I2C2_ER_IRQHandler ; I2C2 Error
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- DCD SPI1_IRQHandler ; SPI1
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- DCD SPI2_IRQHandler ; SPI2
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- DCD USART1_IRQHandler ; USART1
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- DCD USART2_IRQHandler ; USART2
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- DCD USART3_IRQHandler ; USART3
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- DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
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- DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
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- DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup from suspend
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- DCD TIM8_BRK_IRQHandler ; TIM8 Break
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- DCD TIM8_UP_IRQHandler ; TIM8 Update
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- DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
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- DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
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- DCD ADC3_IRQHandler ; ADC3
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- DCD FSMC_IRQHandler ; FSMC
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- DCD SDIO_IRQHandler ; SDIO
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- DCD TIM5_IRQHandler ; TIM5
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- DCD SPI3_IRQHandler ; SPI3
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- DCD UART4_IRQHandler ; UART4
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- DCD UART5_IRQHandler ; UART5
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- DCD TIM6_IRQHandler ; TIM6
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- DCD TIM7_IRQHandler ; TIM7
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- DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
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- DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
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- DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
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- DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
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- ; for STM32F10x Connectivity line devices
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- DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
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- DCD ETH_IRQHandler ; Ethernet
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- DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
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- DCD CAN2_TX_IRQHandler ; CAN2 TX
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- DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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- DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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- DCD CAN2_SCE_IRQHandler ; CAN2 SCE
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- DCD OTG_FS_IRQHandler ; USB OTG FS
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-
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-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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-;;
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-;; Default interrupt handlers.
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-;;
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- THUMB
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-
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- PUBWEAK NMI_Handler
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- SECTION .text:CODE:REORDER(1)
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-NMI_Handler
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- B NMI_Handler
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- PUBWEAK MemManage_Handler
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- SECTION .text:CODE:REORDER(1)
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-MemManage_Handler
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- B MemManage_Handler
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- PUBWEAK BusFault_Handler
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- SECTION .text:CODE:REORDER(1)
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-BusFault_Handler
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- B BusFault_Handler
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- PUBWEAK UsageFault_Handler
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- SECTION .text:CODE:REORDER(1)
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-UsageFault_Handler
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- B UsageFault_Handler
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- PUBWEAK SVC_Handler
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- SECTION .text:CODE:REORDER(1)
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-SVC_Handler
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- B SVC_Handler
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- PUBWEAK DebugMon_Handler
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- SECTION .text:CODE:REORDER(1)
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-DebugMon_Handler
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- B DebugMon_Handler
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- PUBWEAK WWDG_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-WWDG_IRQHandler
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- B WWDG_IRQHandler
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- PUBWEAK PVD_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-PVD_IRQHandler
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- B PVD_IRQHandler
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- PUBWEAK TAMPER_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TAMPER_IRQHandler
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- B TAMPER_IRQHandler
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- PUBWEAK RTC_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-RTC_IRQHandler
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- B RTC_IRQHandler
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- PUBWEAK FLASH_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-FLASH_IRQHandler
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- B FLASH_IRQHandler
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- PUBWEAK RCC_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-RCC_IRQHandler
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- B RCC_IRQHandler
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- PUBWEAK EXTI0_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-EXTI0_IRQHandler
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- B EXTI0_IRQHandler
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- PUBWEAK EXTI1_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-EXTI1_IRQHandler
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- B EXTI1_IRQHandler
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- PUBWEAK EXTI2_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-EXTI2_IRQHandler
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- B EXTI2_IRQHandler
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- PUBWEAK EXTI3_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-EXTI3_IRQHandler
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- B EXTI3_IRQHandler
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- PUBWEAK EXTI4_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-EXTI4_IRQHandler
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- B EXTI4_IRQHandler
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- PUBWEAK DMA1_Channel1_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-DMA1_Channel1_IRQHandler
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- B DMA1_Channel1_IRQHandler
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- PUBWEAK DMA1_Channel2_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-DMA1_Channel2_IRQHandler
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- B DMA1_Channel2_IRQHandler
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- PUBWEAK DMA1_Channel3_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-DMA1_Channel3_IRQHandler
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- B DMA1_Channel3_IRQHandler
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- PUBWEAK DMA1_Channel4_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-DMA1_Channel4_IRQHandler
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- B DMA1_Channel4_IRQHandler
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- PUBWEAK DMA1_Channel5_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-DMA1_Channel5_IRQHandler
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- B DMA1_Channel5_IRQHandler
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- PUBWEAK DMA1_Channel6_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-DMA1_Channel6_IRQHandler
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- B DMA1_Channel6_IRQHandler
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- PUBWEAK DMA1_Channel7_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-DMA1_Channel7_IRQHandler
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- B DMA1_Channel7_IRQHandler
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- PUBWEAK ADC1_2_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-ADC1_2_IRQHandler
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- B ADC1_2_IRQHandler
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- PUBWEAK USB_HP_CAN1_TX_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-USB_HP_CAN1_TX_IRQHandler
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- B USB_HP_CAN1_TX_IRQHandler
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- PUBWEAK USB_LP_CAN1_RX0_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-USB_LP_CAN1_RX0_IRQHandler
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- B USB_LP_CAN1_RX0_IRQHandler
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- PUBWEAK CAN1_RX1_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-CAN1_RX1_IRQHandler
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- B CAN1_RX1_IRQHandler
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- PUBWEAK CAN1_SCE_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-CAN1_SCE_IRQHandler
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- B CAN1_SCE_IRQHandler
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- PUBWEAK EXTI9_5_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-EXTI9_5_IRQHandler
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- B EXTI9_5_IRQHandler
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- PUBWEAK TIM1_BRK_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM1_BRK_IRQHandler
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- B TIM1_BRK_IRQHandler
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- PUBWEAK TIM1_UP_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM1_UP_IRQHandler
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- B TIM1_UP_IRQHandler
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- PUBWEAK TIM1_TRG_COM_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM1_TRG_COM_IRQHandler
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- B TIM1_TRG_COM_IRQHandler
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- PUBWEAK TIM1_CC_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM1_CC_IRQHandler
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- B TIM1_CC_IRQHandler
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- PUBWEAK TIM2_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM2_IRQHandler
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- B TIM2_IRQHandler
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- PUBWEAK TIM3_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM3_IRQHandler
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- B TIM3_IRQHandler
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- PUBWEAK TIM4_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM4_IRQHandler
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- B TIM4_IRQHandler
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- PUBWEAK I2C1_EV_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-I2C1_EV_IRQHandler
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- B I2C1_EV_IRQHandler
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- PUBWEAK I2C1_ER_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-I2C1_ER_IRQHandler
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- B I2C1_ER_IRQHandler
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- PUBWEAK I2C2_EV_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-I2C2_EV_IRQHandler
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- B I2C2_EV_IRQHandler
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- PUBWEAK I2C2_ER_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-I2C2_ER_IRQHandler
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- B I2C2_ER_IRQHandler
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- PUBWEAK SPI1_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-SPI1_IRQHandler
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- B SPI1_IRQHandler
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- PUBWEAK SPI2_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-SPI2_IRQHandler
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- B SPI2_IRQHandler
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- PUBWEAK USART1_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-USART1_IRQHandler
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- B USART1_IRQHandler
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- PUBWEAK USART2_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-USART2_IRQHandler
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- B USART2_IRQHandler
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- PUBWEAK USART3_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-USART3_IRQHandler
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- B USART3_IRQHandler
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- PUBWEAK EXTI15_10_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-EXTI15_10_IRQHandler
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- B EXTI15_10_IRQHandler
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- PUBWEAK RTCAlarm_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-RTCAlarm_IRQHandler
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- B RTCAlarm_IRQHandler
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- PUBWEAK OTG_FS_WKUP_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-OTG_FS_WKUP_IRQHandler
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- B OTG_FS_WKUP_IRQHandler
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- PUBWEAK TIM8_BRK_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM8_BRK_IRQHandler
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- B TIM8_BRK_IRQHandler
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- PUBWEAK TIM8_UP_IRQHandler
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- SECTION .text:CODE:REORDER(1)
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-TIM8_UP_IRQHandler
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- B TIM8_UP_IRQHandler
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- PUBWEAK TIM8_TRG_COM_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-TIM8_TRG_COM_IRQHandler
|
|
|
- B TIM8_TRG_COM_IRQHandler
|
|
|
- PUBWEAK TIM8_CC_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-TIM8_CC_IRQHandler
|
|
|
- B TIM8_CC_IRQHandler
|
|
|
- PUBWEAK ADC3_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-ADC3_IRQHandler
|
|
|
- B ADC3_IRQHandler
|
|
|
- PUBWEAK FSMC_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-FSMC_IRQHandler
|
|
|
- B FSMC_IRQHandler
|
|
|
- PUBWEAK SDIO_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-SDIO_IRQHandler
|
|
|
- B SDIO_IRQHandler
|
|
|
- PUBWEAK TIM5_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-TIM5_IRQHandler
|
|
|
- B TIM5_IRQHandler
|
|
|
- PUBWEAK SPI3_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-SPI3_IRQHandler
|
|
|
- B SPI3_IRQHandler
|
|
|
- PUBWEAK UART4_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-UART4_IRQHandler
|
|
|
- B UART4_IRQHandler
|
|
|
- PUBWEAK UART5_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-UART5_IRQHandler
|
|
|
- B UART5_IRQHandler
|
|
|
- PUBWEAK TIM6_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-TIM6_IRQHandler
|
|
|
- B TIM6_IRQHandler
|
|
|
- PUBWEAK TIM7_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-TIM7_IRQHandler
|
|
|
- B TIM7_IRQHandler
|
|
|
- PUBWEAK DMA2_Channel1_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-DMA2_Channel1_IRQHandler
|
|
|
- B DMA2_Channel1_IRQHandler
|
|
|
- PUBWEAK DMA2_Channel2_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-DMA2_Channel2_IRQHandler
|
|
|
- B DMA2_Channel2_IRQHandler
|
|
|
- PUBWEAK DMA2_Channel3_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-DMA2_Channel3_IRQHandler
|
|
|
- B DMA2_Channel3_IRQHandler
|
|
|
- PUBWEAK DMA2_Channel4_5_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-DMA2_Channel4_5_IRQHandler
|
|
|
- B DMA2_Channel4_5_IRQHandler
|
|
|
-
|
|
|
-; for STM32F10x Connectivity line devices
|
|
|
- PUBWEAK DMA2_Channel5_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-DMA2_Channel5_IRQHandler
|
|
|
- B DMA2_Channel5_IRQHandler
|
|
|
-
|
|
|
- PUBWEAK ETH_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-ETH_IRQHandler
|
|
|
- B ETH_IRQHandler
|
|
|
-
|
|
|
- PUBWEAK ETH_WKUP_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-ETH_WKUP_IRQHandler
|
|
|
- B ETH_WKUP_IRQHandler
|
|
|
-
|
|
|
- PUBWEAK CAN2_TX_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-CAN2_TX_IRQHandler
|
|
|
- B CAN2_TX_IRQHandler
|
|
|
-
|
|
|
- PUBWEAK CAN2_RX0_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-CAN2_RX0_IRQHandler
|
|
|
- B CAN2_RX0_IRQHandler
|
|
|
-
|
|
|
- PUBWEAK CAN2_RX1_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-CAN2_RX1_IRQHandler
|
|
|
- B CAN2_RX1_IRQHandler
|
|
|
-
|
|
|
- PUBWEAK CAN2_SCE_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-CAN2_SCE_IRQHandler
|
|
|
- B CAN2_SCE_IRQHandler
|
|
|
-
|
|
|
- PUBWEAK OTG_FS_IRQHandler
|
|
|
- SECTION .text:CODE:REORDER(1)
|
|
|
-OTG_FS_IRQHandler
|
|
|
- B OTG_FS_IRQHandler
|
|
|
-
|
|
|
-
|
|
|
- END
|
|
|
-
|
|
|
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
|
|
|
+;/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
|
|
|
+;* File Name : startup_stm32f10x_hd.s
|
|
|
+;* Author : MCD Application Team
|
|
|
+;* Version : V3.0.0
|
|
|
+;* Date : 04/06/2009
|
|
|
+;* Description : STM32F10x High Density Devices vector table for EWARM5.x
|
|
|
+;* toolchain.
|
|
|
+;* This module performs:
|
|
|
+;* - Set the initial SP
|
|
|
+;* - Set the initial PC == __iar_program_start,
|
|
|
+;* - Set the vector table entries with the exceptions ISR address,
|
|
|
+;* - Configure external SRAM mounted on STM3210E-EVAL board
|
|
|
+;* to be used as data memory (optional, to be enabled by user)
|
|
|
+;* After Reset the Cortex-M3 processor is in Thread mode,
|
|
|
+;* priority is Privileged, and the Stack is set to Main.
|
|
|
+;********************************************************************************
|
|
|
+;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|
|
+;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
|
|
+;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
|
|
+;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
|
|
+;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
|
|
+;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|
|
+;*******************************************************************************/
|
|
|
+;
|
|
|
+;
|
|
|
+; The modules in this file are included in the libraries, and may be replaced
|
|
|
+; by any user-defined modules that define the PUBLIC symbol _program_start or
|
|
|
+; a user defined start symbol.
|
|
|
+; To override the cstartup defined in the library, simply add your modified
|
|
|
+; version to the workbench project.
|
|
|
+;
|
|
|
+; The vector table is normally located at address 0.
|
|
|
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
|
|
+; The name "__vector_table" has special meaning for C-SPY:
|
|
|
+; it is where the SP start value is found, and the NVIC vector
|
|
|
+; table register (VTOR) is initialized to this address if != 0.
|
|
|
+;
|
|
|
+; Cortex-M version
|
|
|
+;
|
|
|
+
|
|
|
+#include "rtconfig.h"
|
|
|
+
|
|
|
+ MODULE ?cstartup
|
|
|
+
|
|
|
+ ;; ICODE is the same segment as cstartup. By placing __low_level_init
|
|
|
+ ;; in the same segment, we make sure it can be reached with BL. */
|
|
|
+
|
|
|
+ SECTION CSTACK:DATA:NOROOT(3)
|
|
|
+ SECTION .icode:CODE:NOROOT(2)
|
|
|
+
|
|
|
+ IMPORT rt_hw_hard_fault
|
|
|
+ IMPORT rt_hw_pend_sv
|
|
|
+ IMPORT rt_hw_timer_handler
|
|
|
+#ifdef RT_USING_UART2
|
|
|
+ IMPORT rt_hw_uart2_rx_handler
|
|
|
+#endif
|
|
|
+ PUBLIC __low_level_init
|
|
|
+
|
|
|
+ PUBWEAK SystemInit_ExtMemCtl
|
|
|
+ SECTION .text:CODE:REORDER(2)
|
|
|
+ THUMB
|
|
|
+SystemInit_ExtMemCtl
|
|
|
+ BX LR
|
|
|
+
|
|
|
+__low_level_init:
|
|
|
+
|
|
|
+ ;; Initialize hardware.
|
|
|
+ LDR R0, = SystemInit_ExtMemCtl ; initialize external memory controller
|
|
|
+ MOV R11, LR
|
|
|
+ BLX R0
|
|
|
+ LDR R1, =sfe(CSTACK) ; restore original stack pointer
|
|
|
+ MSR MSP, R1
|
|
|
+ MOV R0,#1
|
|
|
+ ;; Return with BX to be independent of mode of caller
|
|
|
+ BX R11
|
|
|
+
|
|
|
+ ;; Forward declaration of sections.
|
|
|
+ SECTION .intvec:CODE:NOROOT(2)
|
|
|
+
|
|
|
+ EXTERN __iar_program_start
|
|
|
+ PUBLIC __vector_table
|
|
|
+
|
|
|
+ DATA
|
|
|
+__vector_table
|
|
|
+ DCD sfe(CSTACK)
|
|
|
+ DCD __iar_program_start
|
|
|
+
|
|
|
+ DCD NMI_Handler ; NMI Handler
|
|
|
+ DCD rt_hw_hard_fault ; Hard Fault Handler
|
|
|
+ DCD MemManage_Handler ; MPU Fault Handler
|
|
|
+ DCD BusFault_Handler ; Bus Fault Handler
|
|
|
+ DCD UsageFault_Handler ; Usage Fault Handler
|
|
|
+ DCD 0 ; Reserved
|
|
|
+ DCD 0 ; Reserved
|
|
|
+ DCD 0 ; Reserved
|
|
|
+ DCD 0 ; Reserved
|
|
|
+ DCD SVC_Handler ; SVCall Handler
|
|
|
+ DCD DebugMon_Handler ; Debug Monitor Handler
|
|
|
+ DCD 0 ; Reserved
|
|
|
+ DCD rt_hw_pend_sv ; PendSV Handler
|
|
|
+ DCD rt_hw_timer_handler ; SysTick Handler
|
|
|
+
|
|
|
+ ; External Interrupts
|
|
|
+ DCD WWDG_IRQHandler ; Window Watchdog
|
|
|
+ DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
|
|
+ DCD TAMPER_IRQHandler ; Tamper
|
|
|
+ DCD RTC_IRQHandler ; RTC
|
|
|
+ DCD FLASH_IRQHandler ; Flash
|
|
|
+ DCD RCC_IRQHandler ; RCC
|
|
|
+ DCD EXTI0_IRQHandler ; EXTI Line 0
|
|
|
+ DCD EXTI1_IRQHandler ; EXTI Line 1
|
|
|
+ DCD EXTI2_IRQHandler ; EXTI Line 2
|
|
|
+ DCD EXTI3_IRQHandler ; EXTI Line 3
|
|
|
+ DCD EXTI4_IRQHandler ; EXTI Line 4
|
|
|
+#ifdef RT_USING_UART2
|
|
|
+ DCD rt_hw_uart2_rx_handler
|
|
|
+#else
|
|
|
+ DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
|
+#endif
|
|
|
+ DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
|
+ DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
|
+ DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
|
+ DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
|
+ DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
|
+ DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
|
+ DCD ADC1_2_IRQHandler ; ADC1 & ADC2
|
|
|
+ DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
|
|
|
+ DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
|
|
|
+ DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
|
|
+ DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
|
|
+ DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
|
|
+ DCD TIM1_BRK_IRQHandler ; TIM1 Break
|
|
|
+ DCD TIM1_UP_IRQHandler ; TIM1 Update
|
|
|
+ DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
|
|
|
+ DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
|
|
+ DCD TIM2_IRQHandler ; TIM2
|
|
|
+ DCD TIM3_IRQHandler ; TIM3
|
|
|
+ DCD TIM4_IRQHandler ; TIM4
|
|
|
+ DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
|
+ DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
|
+ DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|
|
+ DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|
|
+ DCD SPI1_IRQHandler ; SPI1
|
|
|
+ DCD SPI2_IRQHandler ; SPI2
|
|
|
+ DCD USART1_IRQHandler ; USART1
|
|
|
+ DCD USART2_IRQHandler ; USART2
|
|
|
+ DCD USART3_IRQHandler ; USART3
|
|
|
+ DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
|
|
+ DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
|
|
|
+ DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup from suspend
|
|
|
+ DCD TIM8_BRK_IRQHandler ; TIM8 Break
|
|
|
+ DCD TIM8_UP_IRQHandler ; TIM8 Update
|
|
|
+ DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
|
|
|
+ DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
|
|
|
+ DCD ADC3_IRQHandler ; ADC3
|
|
|
+ DCD FSMC_IRQHandler ; FSMC
|
|
|
+ DCD SDIO_IRQHandler ; SDIO
|
|
|
+ DCD TIM5_IRQHandler ; TIM5
|
|
|
+ DCD SPI3_IRQHandler ; SPI3
|
|
|
+ DCD UART4_IRQHandler ; UART4
|
|
|
+ DCD UART5_IRQHandler ; UART5
|
|
|
+ DCD TIM6_IRQHandler ; TIM6
|
|
|
+ DCD TIM7_IRQHandler ; TIM7
|
|
|
+ DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
|
|
|
+ DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
|
|
|
+ DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
|
|
|
+ DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
|
|
|
+ ; for STM32F10x Connectivity line devices
|
|
|
+ DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5
|
|
|
+ DCD ETH_IRQHandler ; Ethernet
|
|
|
+ DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
|
|
+ DCD CAN2_TX_IRQHandler ; CAN2 TX
|
|
|
+ DCD CAN2_RX0_IRQHandler ; CAN2 RX0
|
|
|
+ DCD CAN2_RX1_IRQHandler ; CAN2 RX1
|
|
|
+ DCD CAN2_SCE_IRQHandler ; CAN2 SCE
|
|
|
+ DCD OTG_FS_IRQHandler ; USB OTG FS
|
|
|
+
|
|
|
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
+;;
|
|
|
+;; Default interrupt handlers.
|
|
|
+;;
|
|
|
+ THUMB
|
|
|
+
|
|
|
+ PUBWEAK NMI_Handler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+NMI_Handler
|
|
|
+ B NMI_Handler
|
|
|
+ PUBWEAK MemManage_Handler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+MemManage_Handler
|
|
|
+ B MemManage_Handler
|
|
|
+ PUBWEAK BusFault_Handler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+BusFault_Handler
|
|
|
+ B BusFault_Handler
|
|
|
+ PUBWEAK UsageFault_Handler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+UsageFault_Handler
|
|
|
+ B UsageFault_Handler
|
|
|
+ PUBWEAK SVC_Handler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+SVC_Handler
|
|
|
+ B SVC_Handler
|
|
|
+ PUBWEAK DebugMon_Handler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DebugMon_Handler
|
|
|
+ B DebugMon_Handler
|
|
|
+ PUBWEAK WWDG_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+WWDG_IRQHandler
|
|
|
+ B WWDG_IRQHandler
|
|
|
+ PUBWEAK PVD_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+PVD_IRQHandler
|
|
|
+ B PVD_IRQHandler
|
|
|
+ PUBWEAK TAMPER_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TAMPER_IRQHandler
|
|
|
+ B TAMPER_IRQHandler
|
|
|
+ PUBWEAK RTC_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+RTC_IRQHandler
|
|
|
+ B RTC_IRQHandler
|
|
|
+ PUBWEAK FLASH_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+FLASH_IRQHandler
|
|
|
+ B FLASH_IRQHandler
|
|
|
+ PUBWEAK RCC_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+RCC_IRQHandler
|
|
|
+ B RCC_IRQHandler
|
|
|
+ PUBWEAK EXTI0_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+EXTI0_IRQHandler
|
|
|
+ B EXTI0_IRQHandler
|
|
|
+ PUBWEAK EXTI1_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+EXTI1_IRQHandler
|
|
|
+ B EXTI1_IRQHandler
|
|
|
+ PUBWEAK EXTI2_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+EXTI2_IRQHandler
|
|
|
+ B EXTI2_IRQHandler
|
|
|
+ PUBWEAK EXTI3_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+EXTI3_IRQHandler
|
|
|
+ B EXTI3_IRQHandler
|
|
|
+ PUBWEAK EXTI4_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+EXTI4_IRQHandler
|
|
|
+ B EXTI4_IRQHandler
|
|
|
+ PUBWEAK DMA1_Channel1_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA1_Channel1_IRQHandler
|
|
|
+ B DMA1_Channel1_IRQHandler
|
|
|
+ PUBWEAK DMA1_Channel2_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA1_Channel2_IRQHandler
|
|
|
+ B DMA1_Channel2_IRQHandler
|
|
|
+ PUBWEAK DMA1_Channel3_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA1_Channel3_IRQHandler
|
|
|
+ B DMA1_Channel3_IRQHandler
|
|
|
+ PUBWEAK DMA1_Channel4_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA1_Channel4_IRQHandler
|
|
|
+ B DMA1_Channel4_IRQHandler
|
|
|
+ PUBWEAK DMA1_Channel5_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA1_Channel5_IRQHandler
|
|
|
+ B DMA1_Channel5_IRQHandler
|
|
|
+ PUBWEAK DMA1_Channel6_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA1_Channel6_IRQHandler
|
|
|
+ B DMA1_Channel6_IRQHandler
|
|
|
+ PUBWEAK DMA1_Channel7_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA1_Channel7_IRQHandler
|
|
|
+ B DMA1_Channel7_IRQHandler
|
|
|
+ PUBWEAK ADC1_2_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+ADC1_2_IRQHandler
|
|
|
+ B ADC1_2_IRQHandler
|
|
|
+ PUBWEAK USB_HP_CAN1_TX_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+USB_HP_CAN1_TX_IRQHandler
|
|
|
+ B USB_HP_CAN1_TX_IRQHandler
|
|
|
+ PUBWEAK USB_LP_CAN1_RX0_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+USB_LP_CAN1_RX0_IRQHandler
|
|
|
+ B USB_LP_CAN1_RX0_IRQHandler
|
|
|
+ PUBWEAK CAN1_RX1_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+CAN1_RX1_IRQHandler
|
|
|
+ B CAN1_RX1_IRQHandler
|
|
|
+ PUBWEAK CAN1_SCE_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+CAN1_SCE_IRQHandler
|
|
|
+ B CAN1_SCE_IRQHandler
|
|
|
+ PUBWEAK EXTI9_5_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+EXTI9_5_IRQHandler
|
|
|
+ B EXTI9_5_IRQHandler
|
|
|
+ PUBWEAK TIM1_BRK_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM1_BRK_IRQHandler
|
|
|
+ B TIM1_BRK_IRQHandler
|
|
|
+ PUBWEAK TIM1_UP_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM1_UP_IRQHandler
|
|
|
+ B TIM1_UP_IRQHandler
|
|
|
+ PUBWEAK TIM1_TRG_COM_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM1_TRG_COM_IRQHandler
|
|
|
+ B TIM1_TRG_COM_IRQHandler
|
|
|
+ PUBWEAK TIM1_CC_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM1_CC_IRQHandler
|
|
|
+ B TIM1_CC_IRQHandler
|
|
|
+ PUBWEAK TIM2_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM2_IRQHandler
|
|
|
+ B TIM2_IRQHandler
|
|
|
+ PUBWEAK TIM3_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM3_IRQHandler
|
|
|
+ B TIM3_IRQHandler
|
|
|
+ PUBWEAK TIM4_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM4_IRQHandler
|
|
|
+ B TIM4_IRQHandler
|
|
|
+ PUBWEAK I2C1_EV_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+I2C1_EV_IRQHandler
|
|
|
+ B I2C1_EV_IRQHandler
|
|
|
+ PUBWEAK I2C1_ER_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+I2C1_ER_IRQHandler
|
|
|
+ B I2C1_ER_IRQHandler
|
|
|
+ PUBWEAK I2C2_EV_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+I2C2_EV_IRQHandler
|
|
|
+ B I2C2_EV_IRQHandler
|
|
|
+ PUBWEAK I2C2_ER_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+I2C2_ER_IRQHandler
|
|
|
+ B I2C2_ER_IRQHandler
|
|
|
+ PUBWEAK SPI1_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+SPI1_IRQHandler
|
|
|
+ B SPI1_IRQHandler
|
|
|
+ PUBWEAK SPI2_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+SPI2_IRQHandler
|
|
|
+ B SPI2_IRQHandler
|
|
|
+ PUBWEAK USART1_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+USART1_IRQHandler
|
|
|
+ B USART1_IRQHandler
|
|
|
+ PUBWEAK USART2_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+USART2_IRQHandler
|
|
|
+ B USART2_IRQHandler
|
|
|
+ PUBWEAK USART3_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+USART3_IRQHandler
|
|
|
+ B USART3_IRQHandler
|
|
|
+ PUBWEAK EXTI15_10_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+EXTI15_10_IRQHandler
|
|
|
+ B EXTI15_10_IRQHandler
|
|
|
+ PUBWEAK RTCAlarm_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+RTCAlarm_IRQHandler
|
|
|
+ B RTCAlarm_IRQHandler
|
|
|
+ PUBWEAK OTG_FS_WKUP_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+OTG_FS_WKUP_IRQHandler
|
|
|
+ B OTG_FS_WKUP_IRQHandler
|
|
|
+ PUBWEAK TIM8_BRK_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM8_BRK_IRQHandler
|
|
|
+ B TIM8_BRK_IRQHandler
|
|
|
+ PUBWEAK TIM8_UP_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM8_UP_IRQHandler
|
|
|
+ B TIM8_UP_IRQHandler
|
|
|
+ PUBWEAK TIM8_TRG_COM_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM8_TRG_COM_IRQHandler
|
|
|
+ B TIM8_TRG_COM_IRQHandler
|
|
|
+ PUBWEAK TIM8_CC_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM8_CC_IRQHandler
|
|
|
+ B TIM8_CC_IRQHandler
|
|
|
+ PUBWEAK ADC3_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+ADC3_IRQHandler
|
|
|
+ B ADC3_IRQHandler
|
|
|
+ PUBWEAK FSMC_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+FSMC_IRQHandler
|
|
|
+ B FSMC_IRQHandler
|
|
|
+ PUBWEAK SDIO_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+SDIO_IRQHandler
|
|
|
+ B SDIO_IRQHandler
|
|
|
+ PUBWEAK TIM5_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM5_IRQHandler
|
|
|
+ B TIM5_IRQHandler
|
|
|
+ PUBWEAK SPI3_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+SPI3_IRQHandler
|
|
|
+ B SPI3_IRQHandler
|
|
|
+ PUBWEAK UART4_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+UART4_IRQHandler
|
|
|
+ B UART4_IRQHandler
|
|
|
+ PUBWEAK UART5_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+UART5_IRQHandler
|
|
|
+ B UART5_IRQHandler
|
|
|
+ PUBWEAK TIM6_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM6_IRQHandler
|
|
|
+ B TIM6_IRQHandler
|
|
|
+ PUBWEAK TIM7_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+TIM7_IRQHandler
|
|
|
+ B TIM7_IRQHandler
|
|
|
+ PUBWEAK DMA2_Channel1_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA2_Channel1_IRQHandler
|
|
|
+ B DMA2_Channel1_IRQHandler
|
|
|
+ PUBWEAK DMA2_Channel2_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA2_Channel2_IRQHandler
|
|
|
+ B DMA2_Channel2_IRQHandler
|
|
|
+ PUBWEAK DMA2_Channel3_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA2_Channel3_IRQHandler
|
|
|
+ B DMA2_Channel3_IRQHandler
|
|
|
+ PUBWEAK DMA2_Channel4_5_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA2_Channel4_5_IRQHandler
|
|
|
+ B DMA2_Channel4_5_IRQHandler
|
|
|
+
|
|
|
+; for STM32F10x Connectivity line devices
|
|
|
+ PUBWEAK DMA2_Channel5_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+DMA2_Channel5_IRQHandler
|
|
|
+ B DMA2_Channel5_IRQHandler
|
|
|
+
|
|
|
+ PUBWEAK ETH_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+ETH_IRQHandler
|
|
|
+ B ETH_IRQHandler
|
|
|
+
|
|
|
+ PUBWEAK ETH_WKUP_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+ETH_WKUP_IRQHandler
|
|
|
+ B ETH_WKUP_IRQHandler
|
|
|
+
|
|
|
+ PUBWEAK CAN2_TX_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+CAN2_TX_IRQHandler
|
|
|
+ B CAN2_TX_IRQHandler
|
|
|
+
|
|
|
+ PUBWEAK CAN2_RX0_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+CAN2_RX0_IRQHandler
|
|
|
+ B CAN2_RX0_IRQHandler
|
|
|
+
|
|
|
+ PUBWEAK CAN2_RX1_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+CAN2_RX1_IRQHandler
|
|
|
+ B CAN2_RX1_IRQHandler
|
|
|
+
|
|
|
+ PUBWEAK CAN2_SCE_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+CAN2_SCE_IRQHandler
|
|
|
+ B CAN2_SCE_IRQHandler
|
|
|
+
|
|
|
+ PUBWEAK OTG_FS_IRQHandler
|
|
|
+ SECTION .text:CODE:REORDER(1)
|
|
|
+OTG_FS_IRQHandler
|
|
|
+ B OTG_FS_IRQHandler
|
|
|
+
|
|
|
+
|
|
|
+ END
|
|
|
+
|
|
|
+/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
|