Merge pull request #2248 from SummerGGift/master_2019_1_21

[bsp][stm32] 添加g0系列 BSP，解决 IAR 链接问题，同时完善头文件层级关系

.travis.yml

@@ -97,6 +97,7 @@ env:
   - RTT_BSP='stm32/stm32f767-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm'
   - RTT_BSP='stm32/stm32f767-fire-challenger' RTT_TOOL_CHAIN='sourcery-arm'
   - RTT_BSP='stm32/stm32f767-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
+  - RTT_BSP='stm32/stm32g071-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
   - RTT_BSP='stm32/stm32l432-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
   - RTT_BSP='stm32/stm32l475-atk-pandora' RTT_TOOL_CHAIN='sourcery-arm'
 #  - RTT_BSP='taihu' RTT_TOOL_CHAIN='sourcery-ppc'

bsp/stm32/README.md

@@ -5,25 +5,27 @@ STM32 系列 BSP 目前支持情况如下表所示：
 | BSP 文件夹名称       | 开发板名称                 |
 |:------------------------- |:-------------------------- |
 | **F0 系列** |  |
-| [stm32f091-st-nucleo](stm32f091-st-nucleo) | ST 官方 stm32f091-nucleo 开发板 |
+| [stm32f091-st-nucleo](stm32f091-st-nucleo) | ST 官方 STM32F091-nucleo 开发板 |
 | **F1 系列** |  |
 | [stm32f103-atk-nano](stm32f103-atk-nano)        | 正点原子 F103 NANO 开发板  |
 | [stm32f103-dofly-lyc8](stm32f103-dofly-lyc8) | 德飞莱 STM32F103 开发板 |
 | [stm32f103-fire-arbitrary](stm32f103-fire-arbitrary/)  | 野火 F103 霸道开发板     |
 | [stm32f103-hw100k-ibox](stm32f103-hw100k-ibox) | STM32F103 硬件十万个为什么 iBox 开发板 |
 | **F4 系列** |  |
-| [stm32f407-st-discovery](stm32f407-st-discovery) | ST 官方 stm32f407-discovery 开发板 |
+| [stm32f407-st-discovery](stm32f407-st-discovery) | ST 官方 STM32F407-discovery 开发板 |
 | [stm32f407-atk-explorer](stm32f407-atk-explorer) | 正点原子 F407 探索者开发板 |
 | [stm32f411-st-nucleo](stm32f411-st-nucleo/) | ST 官方 STM32F411-Nucleo-64 开发板 |
 | [stm32f429-atk-apollo](stm32f429-atk-apollo)      | 正点原子 F429 阿波罗开发板 |
 | [stm32f429-fire-challenger](stm32f429-fire-challenger/) | 野火 F429 挑战者开发板     |
-| [stm32f429-armfly-v6](stm32f429-armfly-v6) | 安富莱 f429-v6 开发板 |
-| [stm32f446-st-nucleo](stm32f446-st-nucleo) | ST 官方 stm32f446-nucleo 开发板 |
+| [stm32f429-armfly-v6](stm32f429-armfly-v6) | 安富莱 F429-v6 开发板 |
+| [stm32f446-st-nucleo](stm32f446-st-nucleo) | ST 官方 STM32F446-nucleo 开发板 |
 | **F7 系列** |  |
 | [stm32f746-st-disco](stm32f746-st-disco) | ST 官方 STM32F746-discovery 开发板 |
 | [stm32f767-atk-apollo](stm32f767-atk-apollo) | 正点原子 F767 阿波罗开发板 |
 | [stm32f767-fire-challenger](stm32f767-fire-challenger/) | 野火 F767 挑战者开发板 |
 | [stm32f767-st-nucleo](stm32f767-st-nucleo) | ST 官方 STM32F767-nucleo 开发板 |
+| **G0 系列** |  |
+| [stm32g071-st-nucleo](stm32g071-st-nucleo) | ST 官方 STM32G071-nucleo开发板 |
 | **L4 系列** |  |
 | [stm32l432-st-nucleo](stm32l432-st-nucleo) | ST 官方 STM32L432-nucleo 开发板 |
 | [stm32l475-atk-pandora](stm32l475-atk-pandora/) | 正点原子 L475 潘多拉 IoT 开发板    |

bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #ifndef __SPI_CONFIG_H__

bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #ifndef __SPI_CONFIG_H__

bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-01-05     zylx         first version
+ * 2019-01-08     SummerGift   clean up the code
+ */
+
+#ifndef __DMA_CONFIG_H__
+#define __DMA_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* DMA1 channel1  */
+
+/* DMA1 channel2-3 DMA2 channel1-2 */
+#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
+#define UART1_DMA_RX_IRQHandler          DMA1_Channel2_3_IRQHandler
+#define UART1_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
+#define UART1_RX_DMA_INSTANCE            DMA1_Channel3
+#define UART1_RX_DMA_IRQ                 DMA1_Channel2_3_IRQn
+#endif
+/* DMA1 channel2-3 DMA2 channel1-2 */
+
+/* DMA1 channel4-7 DMA2 channel3-5 */
+#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
+#define UART2_DMA_RX_IRQHandler          DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
+#define UART2_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
+#define UART2_RX_DMA_INSTANCE            DMA1_Channel5
+#define UART2_RX_DMA_IRQ                 DMA1_Ch4_7_DMAMUX1_OVR_IRQn
+#endif
+/* DMA1 channel4-7 DMA2 channel3-5 */
+#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
+#define UART3_DMA_RX_IRQHandler          DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
+#define UART3_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
+#define UART3_RX_DMA_INSTANCE            DMA1_Channel4
+#define UART3_RX_DMA_IRQ                 DMA1_Ch4_7_DMAMUX1_OVR_IRQn
+#endif
+#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE)
+#define UART4_DMA_RX_IRQHandler          DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler
+#define UART4_RX_DMA_RCC                 RCC_AHBENR_DMA1EN
+#define UART4_RX_DMA_INSTANCE            DMA1_Channel6
+#define UART4_RX_DMA_IRQ                 DMA1_Ch4_7_DMAMUX1_OVR_IRQn
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DMA_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h

@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-10-30     zylx         first version
+ */
+
+#ifndef __UART_CONFIG_H__
+#define __UART_CONFIG_H__
+
+#include <rtthread.h>
+
+#if defined(BSP_USING_LPUART1)
+#ifndef LPUART1_CONFIG
+#define LPUART1_CONFIG                                              \
+    {                                                               \
+        .name = "lpuart1",                                          \
+        .Instance = LPUART1,                                        \
+        .irq_type = USART3_4_LPUART1_IRQn,                          \
+    }
+#endif /* LPUART1_CONFIG */
+#if defined(BSP_LPUART1_RX_USING_DMA)
+#ifndef LPUART1_DMA_CONFIG
+#define LPUART1_DMA_CONFIG                                          \
+    {                                                               \
+        .Instance = DMA1_Channel1,                                  \
+        .dma_rcc  = RCC_AHBENR_DMA1EN,                              \
+        .dma_irq  = DMA1_Channel1_IRQn,                             \
+    }
+#endif /* LPUART1_DMA_CONFIG */
+#endif /* BSP_LPUART1_RX_USING_DMA */
+#endif /* BSP_USING_LPUART1 */
+
+#if defined(BSP_USING_UART1)
+#ifndef UART1_CONFIG
+#define UART1_CONFIG                                                \
+    {                                                               \
+        .name = "uart1",                                            \
+        .Instance = USART1,                                         \
+        .irq_type = USART1_IRQn,                                    \
+    }
+#endif /* UART1_CONFIG */
+#endif /* BSP_USING_UART1 */
+
+#if defined(BSP_UART1_RX_USING_DMA)
+#ifndef UART1_DMA_CONFIG
+#define UART1_DMA_CONFIG                                            \
+    {                                                               \
+        .Instance = UART1_RX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART1_RX_DMA_RCC,                               \
+        .dma_irq  = UART1_RX_DMA_IRQ,                               \
+    }
+#endif /* UART1_DMA_CONFIG */
+#endif /* BSP_UART1_RX_USING_DMA */
+
+#if defined(BSP_USING_UART2)
+#ifndef UART2_CONFIG
+#define UART2_CONFIG                                                \
+    {                                                               \
+        .name = "uart2",                                            \
+        .Instance = USART2,                                         \
+        .irq_type = USART2_IRQn,                                    \
+    }
+#endif /* UART2_CONFIG */
+#endif /* BSP_USING_UART2 */
+
+#if defined(BSP_UART2_RX_USING_DMA)
+#ifndef UART2_DMA_CONFIG
+#define UART2_DMA_CONFIG                                            \
+    {                                                               \
+        .Instance = UART2_RX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART2_RX_DMA_RCC,                               \
+        .dma_irq  = UART2_RX_DMA_IRQ,                               \
+    }
+#endif /* UART2_DMA_CONFIG */
+#endif /* BSP_UART2_RX_USING_DMA */
+
+#if defined(BSP_USING_UART3)
+#ifndef UART3_CONFIG
+#ifndef SOC_SERIES_STM32G0
+#define UART3_CONFIG                                                \
+    {                                                               \
+        .name = "uart3",                                            \
+        .Instance = USART3,                                         \
+        .irq_type = USART3_IRQn,                                    \
+    }
+#else
+#define UART3_CONFIG                                                \
+    {                                                               \
+        .name = "uart3",                                            \
+        .Instance = USART3,                                         \
+        .irq_type = USART3_4_LPUART1_IRQn,                          \
+    }
+#endif /* SOC_SERIES_STM32G0 */
+#endif /* UART3_CONFIG */
+#endif /* BSP_USING_UART3 */
+
+#if defined(BSP_UART3_RX_USING_DMA)
+#ifndef UART3_DMA_CONFIG
+#define UART3_DMA_CONFIG                                            \
+    {                                                               \
+        .Instance = UART3_RX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART3_RX_DMA_RCC,                               \
+        .dma_irq  = UART3_RX_DMA_IRQ,                               \
+    }
+#endif /* UART3_DMA_CONFIG */
+#endif /* BSP_UART3_RX_USING_DMA */
+
+#if defined(BSP_USING_UART4)
+#ifndef UART4_CONFIG
+#ifndef SOC_SERIES_STM32G0
+#define UART4_CONFIG                                                \
+    {                                                               \
+        .name = "uart4",                                            \
+        .Instance = UART4,                                          \
+        .irq_type = UART4_IRQn,                                     \
+    }
+#else
+#define UART4_CONFIG                                                \
+    {                                                               \
+        .name = "uart4",                                            \
+        .Instance = USART4,                                         \
+        .irq_type = USART3_4_LPUART1_IRQn,                          \
+    }
+#endif /* UART4_CONFIG */
+#endif /* SOC_SERIES_STM32G0 */
+#endif /* BSP_USING_UART4 */
+
+#if defined(BSP_UART4_RX_USING_DMA)
+#ifndef UART4_DMA_CONFIG
+#define UART4_DMA_CONFIG                                            \
+    {                                                               \
+        .Instance = UART4_RX_DMA_INSTANCE,                          \
+        .dma_rcc  = UART4_RX_DMA_RCC,                               \
+        .dma_irq  = UART4_RX_DMA_IRQ,                               \
+    }
+#endif /* UART4_DMA_CONFIG */
+#endif /* BSP_UART4_RX_USING_DMA */
+
+#if defined(BSP_USING_UART5)
+#ifndef UART5_CONFIG
+#define UART5_CONFIG                                                \
+    {                                                               \
+        .name = "uart5",                                            \
+        .Instance = UART5,                                          \
+        .irq_type = UART5_IRQn,                                     \
+    }
+#endif /* UART5_CONFIG */
+#endif /* BSP_USING_UART5 */
+
+#if defined(BSP_UART5_RX_USING_DMA)
+#ifndef UART5_DMA_CONFIG
+#define UART5_DMA_CONFIG                                            \
+    {                                                               \
+        .Instance = DMA_NOT_AVAILABLE,                              \
+    }
+#endif /* UART5_DMA_CONFIG */
+#endif /* BSP_UART5_RX_USING_DMA */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __UART_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/drv_common.c

@@ -5,15 +5,11 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-7      SummerGift   change to new framework
+ * 2018-11-7      SummerGift   first version
  */
 
 #include "drv_common.h"
 
-#ifdef RT_USING_PIN
-#include "drv_gpio.h"
-#endif
-
 #ifdef RT_USING_SERIAL
 #include "drv_usart.h"
 #endif

bsp/stm32/libraries/HAL_Drivers/drv_common.h

@@ -14,7 +14,6 @@
 #include <rtthread.h>
 #include <rthw.h>
 #include <rtdevice.h>
-#include <board.h>
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/libraries/HAL_Drivers/drv_config.h

@@ -58,6 +58,9 @@ extern "C" {
 #include "l4/adc_config.h"
 #include "l4/tim_config.h"
 #include "l4/pwm_config.h"
+#elif  defined(SOC_SERIES_STM32G0)
+#include "g0/dma_config.h"
+#include "g0/uart_config.h"
 #endif
 
 #ifdef __cplusplus

bsp/stm32/libraries/HAL_Drivers/drv_dma.h

@@ -12,15 +12,14 @@
 #define __DRV_DMA_H_
 
 #include <rtthread.h>
-#include "rtdevice.h"
-#include <rthw.h>
-#include <drv_common.h>
+#include <board.h>
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4)
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) \
+    || defined(SOC_SERIES_STM32G0)
 #define DMA_INSTANCE_TYPE              DMA_Channel_TypeDef
 #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
 #define DMA_INSTANCE_TYPE              DMA_Stream_TypeDef

bsp/stm32/libraries/HAL_Drivers/drv_gpio.c

@@ -217,7 +217,7 @@ static const struct pin_index pins[] =
 
 static const struct pin_irq_map pin_irq_map[] =
 {
-#if defined(SOC_SERIES_STM32F0)
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
     {GPIO_PIN_0, EXTI0_1_IRQn},
     {GPIO_PIN_1, EXTI0_1_IRQn},
     {GPIO_PIN_2, EXTI2_3_IRQn},

bsp/stm32/libraries/HAL_Drivers/drv_gpio.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author            Notes
- * 2018-11-06     balanceTWK        change to new framework
+ * 2018-11-06     balanceTWK        first version
  */
 
 #ifndef __DRV_GPIO_H__

bsp/stm32/libraries/HAL_Drivers/drv_lcd.c

@@ -8,14 +8,11 @@
  * 2019-01-08     zylx         first version
  */
 
-#include <rtthread.h>
-#include <rtdevice.h>
 #include <board.h>
 
 #ifdef BSP_USING_LCD
 #include <lcd_port.h>
 #include <string.h>
-#include "drv_gpio.h"
 
 //#define DRV_DEBUG
 #define LOG_TAG             "drv.lcd"

bsp/stm32/libraries/HAL_Drivers/drv_log.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-15     SummerGift   change to new framework
+ * 2018-11-15     SummerGift   first version
  */
 
 /*

bsp/stm32/libraries/HAL_Drivers/drv_qspi.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-27     zylx         change to new framework
+ * 2018-11-27     zylx         first version
  */
  
 #ifndef __DRV_QSPI_H_

bsp/stm32/libraries/HAL_Drivers/drv_rtc.c

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
- * Date         Author      Notes
- * 2018-12-04   balanceTWK        change to new framework
+ * Date         Author        Notes
+ * 2018-12-04   balanceTWK    first version
  */
 
 #include "board.h"

bsp/stm32/libraries/HAL_Drivers/drv_sdio.c

@@ -6,7 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-06-22     tyx          first
- * 2018-12-12     balanceTWK   change to new framework
+ * 2018-12-12     balanceTWK   first version
  */
 
 #include "board.h"

bsp/stm32/libraries/HAL_Drivers/drv_sdram.c

@@ -8,8 +8,6 @@
  * 2018-12-04     zylx         first version
  */
 
-#include <rtthread.h>
-#include <rtdevice.h>
 #include <board.h>
 
 #ifdef BSP_USING_SDRAM

bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-08     balanceTWK   change to new framework
+ * 2018-11-08     balanceTWK   first version
  */
 
 #include <board.h>

bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-08     balanceTWK   change to new framework
+ * 2018-11-08     balanceTWK   first version
  */
 
 #ifndef __DRV_I2C__

bsp/stm32/libraries/HAL_Drivers/drv_usart.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-10-30     SummerGift   change to new framework
+ * 2018-10-30     SummerGift   first version
  */
  
 #include "board.h"
@@ -18,7 +18,8 @@
 #define LOG_TAG             "drv.usart"
 #include <drv_log.h>
 
-#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5)
+#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) \
+    && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_LPUART1)
 #error "Please define at least one BSP_USING_UARTx"
 /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
 #endif
@@ -44,6 +45,9 @@ enum
 #ifdef BSP_USING_UART5
     UART5_INDEX,
 #endif
+#ifdef BSP_USING_LPUART1
+    LPUART1_INDEX,
+#endif
 };
 
 static struct stm32_uart_config uart_config[] =
@@ -63,6 +67,9 @@ static struct stm32_uart_config uart_config[] =
 #ifdef BSP_USING_UART5
         UART5_CONFIG,
 #endif
+#ifdef BSP_USING_LPUART1
+        LPUART1_CONFIG,
+#endif
 };
 
 static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
@@ -175,7 +182,8 @@ static int stm32_putc(struct rt_serial_device *serial, char c)
 
     uart = (struct stm32_uart *)serial->parent.user_data;
     UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0)
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
+    || defined(SOC_SERIES_STM32G0)
     uart->handle.Instance->TDR = c;
 #else
     uart->handle.Instance->DR = c;
@@ -195,7 +203,8 @@ static int stm32_getc(struct rt_serial_device *serial)
     ch = -1;
     if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
     {
-#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0)
+#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
+    || defined(SOC_SERIES_STM32G0)
         ch = uart->handle.Instance->RDR & 0xff;
 #else
         ch = uart->handle.Instance->DR & 0xff;
@@ -271,7 +280,8 @@ static void uart_isr(struct rt_serial_device *serial)
         {
             __HAL_UART_CLEAR_PEFLAG(&uart->handle);
         }
-#if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0)
+#if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
+    && !defined(SOC_SERIES_STM32G0)
         if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
         {
             UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
@@ -421,6 +431,19 @@ void UART5_DMA_RX_IRQHandler(void)
 #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
 #endif /* BSP_USING_UART5*/
 
+#if defined(BSP_USING_LPUART1)
+void USART3_4_LPUART1_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    uart_isr(&(uart_obj[LPUART1_INDEX].serial));
+    
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
 #ifdef RT_SERIAL_USING_DMA
 static void stm32_dma_config(struct rt_serial_device *serial)
 {
@@ -433,7 +456,7 @@ static void stm32_dma_config(struct rt_serial_device *serial)
 
     {
         rt_uint32_t tmpreg= 0x00U;
-#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0)
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
         /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
         SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
         tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
@@ -444,10 +467,10 @@ static void stm32_dma_config(struct rt_serial_device *serial)
 #endif  
         UNUSED(tmpreg);   /* To avoid compiler warnings */
     }
-    
+
     __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle);
 
-#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0)
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
     uart->dma.handle.Instance                 = uart->config->dma_rx->Instance;
 #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
     uart->dma.handle.Instance                 = uart->config->dma_rx->Instance;
@@ -579,7 +602,7 @@ int rt_hw_usart_init(void)
     rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
     struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
     rt_err_t result = 0;
-    
+
     stm32_uart_get_dma_config();
     
     for (int i = 0; i < obj_num; i++)
@@ -587,8 +610,8 @@ int rt_hw_usart_init(void)
         uart_obj[i].config = &uart_config[i];
         uart_obj[i].serial.ops    = &stm32_uart_ops;
         uart_obj[i].serial.config = config;
-        
-#if defined(RT_SERIAL_USING_DMA)     
+
+#if defined(RT_SERIAL_USING_DMA)
         if(uart_obj[i].uart_dma_flag)
         {
             /* register UART device */
@@ -597,7 +620,7 @@ int rt_hw_usart_init(void)
                                            ,&uart_obj[i]);
         }
         else
-#endif       
+#endif
         {
             /* register UART device */
             result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,

bsp/stm32/libraries/HAL_Drivers/drv_usart.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018.10.30     SummerGift   change to new framework
+ * 2018.10.30     SummerGift   first version
  */
 
 #ifndef __DRV_USART_H__
@@ -19,13 +19,15 @@
 
 int rt_hw_usart_init(void);
 
-#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4)
+#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) \
+    || defined(SOC_SERIES_STM32G0)
 #define DMA_INSTANCE_TYPE              DMA_Channel_TypeDef
 #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
 #define DMA_INSTANCE_TYPE              DMA_Stream_TypeDef
 #endif /*  defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */
 
-#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4)
+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) \
+    || defined(SOC_SERIES_STM32G0)
 #define UART_INSTANCE_CLEAR_FUNCTION    __HAL_UART_CLEAR_FLAG
 #elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0)
 #define UART_INSTANCE_CLEAR_FUNCTION    __HAL_UART_CLEAR_IT

bsp/stm32/libraries/templates/stm32f0xx/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/libraries/templates/stm32f0xx/applications/main.c

@@ -11,7 +11,7 @@
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PB1 */
 #define LED0_PIN    GET_PIN(B, 1)
 

bsp/stm32/libraries/templates/stm32f0xx/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f0xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/libraries/templates/stm32f10x/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/libraries/templates/stm32f10x/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PB1 */
 #define LED0_PIN    GET_PIN(B, 1)
 

bsp/stm32/libraries/templates/stm32f10x/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
  
 #include "board.h"

bsp/stm32/libraries/templates/stm32f10x/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f1xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/libraries/templates/stm32f4xx/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/libraries/templates/stm32f4xx/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PB1 */
 #define LED0_PIN    GET_PIN(B, 1)
 

bsp/stm32/libraries/templates/stm32f4xx/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/libraries/templates/stm32f4xx/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/libraries/templates/stm32f7xx/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/libraries/templates/stm32f7xx/applications/main.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>

bsp/stm32/libraries/templates/stm32f7xx/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/libraries/templates/stm32f7xx/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f7xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/libraries/templates/stm32l4xx/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/libraries/templates/stm32l4xx/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PB1 */
 #define LED0_PIN    GET_PIN(B, 1)
 

bsp/stm32/libraries/templates/stm32l4xx/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/libraries/templates/stm32l4xx/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32l4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f091-st-nucleo/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f091-st-nucleo/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f0xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f103-atk-nano/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f103-atk-nano/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-27     balanceTWK   change to new framework
+ * 2018-11-27     balanceTWK   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PC0 */
 #define LED0_PIN    GET_PIN(C, 0)
 

bsp/stm32/stm32f103-atk-nano/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     balanceTWK   change to new framework
+ * 2018-11-06     balanceTWK   first version
  */
  
 #include "board.h"

bsp/stm32/stm32f103-atk-nano/board/board.h

@@ -5,15 +5,15 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
 #define __BOARD_H__
 
-#include <rtthread.h>
 #include <stm32f1xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f103-dofly-lyc8/applications/main.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>

bsp/stm32/stm32f103-dofly-lyc8/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
  
 #include "board.h"

bsp/stm32/stm32f103-dofly-lyc8/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__

bsp/stm32/stm32f103-fire-arbitrary/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f103-fire-arbitrary/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
  
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PF7 */
 #define LED0_PIN    GET_PIN(F, 7)
 

bsp/stm32/stm32f103-fire-arbitrary/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     balanceTWK   change to new framework
+ * 2018-11-06     balanceTWK   first version
  */
  
 #include <rtthread.h>

bsp/stm32/stm32f103-fire-arbitrary/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     balanceTWK   change to new framework
+ * 2018-11-06     balanceTWK   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f1xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f103-hw100k-ibox/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f103-hw100k-ibox/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PE9 */
 #define LED0_PIN    GET_PIN(E, 9)
 

bsp/stm32/stm32f103-hw100k-ibox/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
  
 #include "board.h"

bsp/stm32/stm32f103-hw100k-ibox/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f1xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f407-atk-explorer/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f407-atk-explorer/applications/main.c

@@ -5,14 +5,14 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  * 2018-11-19     flybreak     add stm32f407-atk-explorer bsp
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PF9 */
 #define LED0_PIN    GET_PIN(F, 9)
 

bsp/stm32/stm32f407-atk-explorer/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/stm32f407-atk-explorer/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f407-st-discovery/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rtthread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f407-st-discovery/applications/main.c

@@ -11,7 +11,6 @@
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
 
 /* defined the LED0 pin: PD14 */
 #define LED0_PIN    GET_PIN(D, 14)

bsp/stm32/stm32f407-st-discovery/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/stm32f407-st-discovery/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      misonyo   change to new framework
+ * 2018-11-5      misonyo   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f411-st-nucleo/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rtthread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f411-st-nucleo/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PA5 */
 #define LED0_PIN               GET_PIN(A, 5)
 

bsp/stm32/stm32f411-st-nucleo/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/stm32f411-st-nucleo/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f429-armfly-v6/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f429-armfly-v6/board/board.h

@@ -14,15 +14,12 @@
 #include <rtthread.h>
 #include <stm32f4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-#ifdef BSP_USING_GPIO
-#include "drv_gpio.h"
-#endif
-
 #define STM32_SRAM_SIZE           (192)
 #define STM32_SRAM_END            (0x20000000 + STM32_SRAM_SIZE * 1024)
 

bsp/stm32/stm32f429-atk-apollo/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f429-atk-apollo/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PB1 */
 #define LED0_PIN    GET_PIN(B, 1)
 

bsp/stm32/stm32f429-atk-apollo/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-7      SummerGift   change to new framework
+ * 2018-11-7      SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/stm32f429-atk-apollo/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      balanceTWK   change to new framework
+ * 2018-11-5      balanceTWK   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f429-fire-challenger/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f429-fire-challenger/applications/main.c

@@ -5,14 +5,14 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  * 2018-11-19     flybreak     add stm32f429-fire-challenger bsp
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PH10 */
 #define LED0_PIN    GET_PIN(H, 10)
 

bsp/stm32/stm32f429-fire-challenger/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/stm32f429-fire-challenger/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f446-st-nucleo/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f446-st-nucleo/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED2 pin: PB7 */
 #define LED2_PIN    GET_PIN(B, 7)
 

bsp/stm32/stm32f446-st-nucleo/board/board.c

@@ -5,8 +5,8 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
- * 2019-01-08     AndeyQi      first version
+ * 2018-11-06     SummerGift   first version
+ * 2019-01-08     AndeyQi      add stm32f446-st-nucleo bsp
  */
 
 #include "board.h"

bsp/stm32/stm32f446-st-nucleo/board/board.h

@@ -5,8 +5,8 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
- * 2019-01-08     AndeyQi      first version
+ * 2018-11-06     SummerGift   first version
+ * 2019-01-08     AndeyQi      add stm32f446-st-nucleo bsp
  */
 
 #ifndef __BOARD_H__
@@ -15,6 +15,7 @@
 #include <rtthread.h>
 #include <stm32f4xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (512 * 1024)

bsp/stm32/stm32f746-st-disco/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f746-st-disco/applications/main.c

@@ -11,7 +11,7 @@
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED1 pin: PI1 */
 #define LED1_PIN    GET_PIN(I, 1)
 

bsp/stm32/stm32f746-st-disco/board/board.h

@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f7xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (1024 * 1024)

bsp/stm32/stm32f767-atk-apollo/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f767-atk-apollo/applications/main.c

@@ -11,7 +11,7 @@
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PB1 */
 #define LED0_PIN    GET_PIN(B, 1)
 

bsp/stm32/stm32f767-atk-apollo/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/stm32f767-atk-apollo/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f7xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f767-atk-apollo/board/ports/drv_qspi_flash.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-27     zylx         change to new framework
+ * 2018-11-27     zylx         first version
  */
  
 #include <board.h>

bsp/stm32/stm32f767-fire-challenger/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f767-fire-challenger/applications/main.c

@@ -5,13 +5,13 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <board.h>
-#include "drv_gpio.h"
+
 /* defined the LED0 pin: PH10 */
 #define LED0_PIN    GET_PIN(H, 10)
 

bsp/stm32/stm32f767-fire-challenger/board/board.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #include "board.h"

bsp/stm32/stm32f767-fire-challenger/board/board.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-5      SummerGift   change to new framework
+ * 2018-11-5      SummerGift   first version
  */
 
 #ifndef __BOARD_H__
@@ -14,6 +14,7 @@
 #include <rtthread.h>
 #include <stm32f7xx.h>
 #include "drv_common.h"
+#include "drv_gpio.h"
 
 #ifdef __cplusplus
 extern "C" {

bsp/stm32/stm32f767-fire-challenger/board/ports/drv_qspi_flash.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-27     zylx         change to new framework
+ * 2018-11-27     zylx         first version
  */
  
 #include <board.h>

bsp/stm32/stm32f767-st-nucleo/SConstruct

@@ -27,7 +27,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 if rtconfig.PLATFORM == 'iar':
     env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
     env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
 
 Export('RTT_ROOT')
 Export('rtconfig')

bsp/stm32/stm32f767-st-nucleo/applications/main.c

@@ -1,35 +1,34 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
- * 2019-1-10      e31207077    change to new framework
- */
-
-#include <rtthread.h>
-#include <rtdevice.h>
-#include <board.h>
-#include "drv_gpio.h"
-
-/* defined the LED1 pin: PB0 */
-#define LED1_PIN    GET_PIN(B, 0)
-
-int main(void)
-{
-    int count = 1;
-    /* set LED1 pin mode to output */
-    rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
-
-    while (count++)
-    {
-        rt_pin_write(LED1_PIN, PIN_HIGH);
-        rt_thread_mdelay(500);
-        rt_pin_write(LED1_PIN, PIN_LOW);
-        rt_thread_mdelay(500);
-    }
-
-    return RT_EOK;		
-}
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-06     SummerGift   first version
+ * 2019-1-10      e31207077    add stm32f767-st-nucleo bsp
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+/* defined the LED1 pin: PB0 */
+#define LED1_PIN    GET_PIN(B, 0)
+
+int main(void)
+{
+    int count = 1;
+    /* set LED1 pin mode to output */
+    rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
+
+    while (count++)
+    {
+        rt_pin_write(LED1_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED1_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+
+    return RT_EOK;		
+}

bsp/stm32/stm32f767-st-nucleo/board/board.c

@@ -1,72 +1,72 @@
-/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
- * 2019-1-10      e31207077    change to new framework
- */
-
-#include "board.h"
-
-/**
-  * @brief System Clock Configuration
-  * @retval None
-  */
-void SystemClock_Config(void)
-{
-  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-
-  /**Configure LSE Drive Capability 
-  */
-  HAL_PWR_EnableBkUpAccess();
-  /**Configure the main internal regulator output voltage 
-  */
-  __HAL_RCC_PWR_CLK_ENABLE();
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-  /**Initializes the CPU, AHB and APB busses clocks 
-  */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 8;
-  RCC_OscInitStruct.PLL.PLLN = 432;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-  RCC_OscInitStruct.PLL.PLLQ = 9;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Activate the Over-Drive mode 
-  */
-  if (HAL_PWREx_EnableOverDrive() != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Initializes the CPU, AHB and APB busses clocks 
-  */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_CLK48;
-  PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
-  PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
-  {
-    Error_Handler();
-  }
-}
-
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-06     SummerGift   first version
+ * 2019-1-10      e31207077    add stm32f767-st-nucleo bsp
+ */
+
+#include "board.h"
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+  /**Configure LSE Drive Capability 
+  */
+  HAL_PWR_EnableBkUpAccess();
+  /**Configure the main internal regulator output voltage 
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  /**Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 432;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 9;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /**Activate the Over-Drive mode 
+  */
+  if (HAL_PWREx_EnableOverDrive() != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /**Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_CLK48;
+  PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
+  PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+