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@@ -86,45 +86,6 @@ static void DMA_RxConfiguration(rt_uint32_t addr, rt_size_t size)
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DMA_Cmd(DMA1_Channel3, ENABLE);
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}
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-
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-static void DMA_TxConfiguration(rt_uint32_t addr, rt_size_t size)
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-{
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- DMA_InitTypeDef DMA_InitStructure;
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-
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- DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_TC3 | DMA1_FLAG_TE3);
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-
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- /* DMA Channel configuration ----------------------------------------------*/
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- DMA_Cmd(DMA1_Channel2, DISABLE);
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- DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
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- DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(&dummy);
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- DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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- DMA_InitStructure.DMA_BufferSize = size;
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- DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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- DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
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- DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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- DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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- DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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- DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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- DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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- DMA_Init(DMA1_Channel2, &DMA_InitStructure);
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-
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- /* DMA Channel configuration ----------------------------------------------*/
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- DMA_Cmd(DMA1_Channel3, DISABLE);
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- DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
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- DMA_InitStructure.DMA_MemoryBaseAddr = (u32) addr;
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- DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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- DMA_InitStructure.DMA_BufferSize = size;
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- DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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- DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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- DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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- DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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- DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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- DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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- DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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- DMA_Init(DMA1_Channel3, &DMA_InitStructure);
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-
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- DMA_Cmd(DMA1_Channel3, ENABLE);
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-}
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#endif
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static uint8_t SPI_HostReadByte(void)
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@@ -245,29 +206,6 @@ static void read_page(uint32_t page, uint8_t *pHeader)
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static void write_page(uint32_t page, uint8_t *pHeader)
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{
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-#if SPI_FLASH_USE_DMA
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- rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
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-
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- DMA_TxConfiguration((rt_uint32_t) pHeader, SECTOR_SIZE);
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-
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- FLASH_CS_0();
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-
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- SPI_HostWriteByte(AT45DB_MM_PAGE_PROG_THRU_BUFFER1);
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- SPI_HostWriteByte((uint8_t) (page >> 6));
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- SPI_HostWriteByte((uint8_t) (page << 2));
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- SPI_HostWriteByte(0x00);
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-
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- SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);
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- while (DMA_GetFlagStatus(DMA1_FLAG_TC3) == RESET);
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-
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- FLASH_CS_1();
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-
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- SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, DISABLE);
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-
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- wait_busy();
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-
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- rt_sem_release(&spi1_lock);
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-#else
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uint16_t i;
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rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
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@@ -289,7 +227,6 @@ static void write_page(uint32_t page, uint8_t *pHeader)
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wait_busy();
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rt_sem_release(&spi1_lock);
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-#endif
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}
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@@ -348,12 +285,7 @@ static rt_size_t rt_spi_flash_write(rt_device_t dev, rt_off_t pos, const void* b
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for (index = 0; index < nr; index++)
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{
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/* only supply single block write: block size 512Byte */
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-#if SPI_FLASH_USE_DMA
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- rt_memcpy(_spi_flash_buffer, ((rt_uint8_t *) buffer + index * SECTOR_SIZE), SECTOR_SIZE);
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- write_page((pos / SECTOR_SIZE + index), _spi_flash_buffer);
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-#else
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write_page((pos / SECTOR_SIZE + index), ((rt_uint8_t *) buffer + index * SECTOR_SIZE));
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-#endif
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}
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return nr * SECTOR_SIZE;
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