|
@@ -117,32 +117,14 @@ void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth)
|
|
{
|
|
{
|
|
rt_kprintf("eth err\n");
|
|
rt_kprintf("eth err\n");
|
|
}
|
|
}
|
|
-static void delay_ms(rt_uint32_t ms)
|
|
|
|
-{
|
|
|
|
- if (ms < 1000 / RT_TICK_PER_SECOND)
|
|
|
|
- {
|
|
|
|
- rt_thread_delay(1);
|
|
|
|
- }
|
|
|
|
- else
|
|
|
|
- {
|
|
|
|
- rt_thread_delay(rt_tick_from_millisecond(ms));
|
|
|
|
- }
|
|
|
|
-}
|
|
|
|
|
|
|
|
static void phy_pin_reset(void)
|
|
static void phy_pin_reset(void)
|
|
{
|
|
{
|
|
- rt_base_t level;
|
|
|
|
-
|
|
|
|
- extern void delay_ms(rt_uint32_t nms);
|
|
|
|
-
|
|
|
|
- level = rt_hw_interrupt_disable();
|
|
|
|
-
|
|
|
|
rt_pcf8574_write_bit(ETH_RESET_IO, 1);
|
|
rt_pcf8574_write_bit(ETH_RESET_IO, 1);
|
|
- delay_ms(100);
|
|
|
|
- rt_pcf8574_write_bit(ETH_RESET_IO, 0);
|
|
|
|
- delay_ms(100);
|
|
|
|
|
|
+ rt_thread_delay(RT_TICK_PER_SECOND / 10);
|
|
|
|
|
|
- rt_hw_interrupt_enable(level);
|
|
|
|
|
|
+ rt_pcf8574_write_bit(ETH_RESET_IO, 0);
|
|
|
|
+ rt_thread_delay(RT_TICK_PER_SECOND / 10);
|
|
}
|
|
}
|
|
#ifdef DEBUG
|
|
#ifdef DEBUG
|
|
FINSH_FUNCTION_EXPORT(phy_pin_reset, phy hardware reset);
|
|
FINSH_FUNCTION_EXPORT(phy_pin_reset, phy hardware reset);
|