1.Add scons support

2.Add Kconfig file
3.Delete some unnecessary files and directories

bsp/smartfusion2/CMSIS/SConscript

@@ -0,0 +1,17 @@
+from building import *
+import rtconfig
+
+cwd = GetCurrentDir()
+src	= Glob('*.c')
+
+if rtconfig.CROSS_TOOL == 'gcc':
+    src += ['startup_gcc/startup_m2sxxx.s']
+    
+elif rtconfig.CROSS_TOOL == 'keil':
+    src += ['startup_arm/startup_m2sxxx.s']
+
+CPPPATH = [cwd]
+
+group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/smartfusion2/CMSIS/hal/hal.h

@@ -1,206 +0,0 @@
-/***************************************************************************//**
- * (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
- * 
- * Hardware abstraction layer functions.
- * 
- * SVN $Revision: 5258 $
- * SVN $Date: 2013-03-21 18:11:02 +0530 (Thu, 21 Mar 2013) $
- */
-#ifndef HAL_H_
-#define HAL_H_
-
-#include "cpu_types.h"
-#include "hw_reg_access.h"
-
-/***************************************************************************//**
- * Enable all interrupts at the processor level.
- */
-void HAL_enable_interrupts( void );
-
-/***************************************************************************//**
- * Disable all interrupts at the processor core level.
- * Return the interrupts enable state before disabling occured so that it can 
- * later be restored. 
- */
-psr_t HAL_disable_interrupts( void );
-
-/***************************************************************************//**
- * Restore the interrupts enable state at the processor core level.
- * This function is normally passed the value returned from a previous call to
- * HAL_disable_interrupts(). 
- */
-void HAL_restore_interrupts( psr_t saved_psr );
-
-/***************************************************************************//**
- */
-#define FIELD_OFFSET(FIELD_NAME)  (FIELD_NAME##_OFFSET)
-#define FIELD_SHIFT(FIELD_NAME)   (FIELD_NAME##_SHIFT)
-#define FIELD_MASK(FIELD_NAME)    (FIELD_NAME##_MASK)
-
-/***************************************************************************//**
- * The macro HAL_set_32bit_reg() allows writing a 32 bits wide register.
- *
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * REG_NAME:    A string identifying the register to write. These strings are
- *              specified in a header file associated with the peripheral.
- * VALUE:       A variable of type uint32_t containing the value to write.
- */
-#define HAL_set_32bit_reg(BASE_ADDR, REG_NAME, VALUE) \
-          (HW_set_32bit_reg( ((BASE_ADDR) + (REG_NAME##_REG_OFFSET)), (VALUE) ))
-
-/***************************************************************************//**
- * The macro HAL_get_32bit_reg() is used to read the value  of a 32 bits wide
- * register.
- * 
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * REG_NAME:    A string identifying the register to read. These strings are
- *              specified in a header file associated with the peripheral.
- * RETURN:		This function-like macro returns a uint32_t value.
- */
-#define HAL_get_32bit_reg(BASE_ADDR, REG_NAME) \
-          (HW_get_32bit_reg( ((BASE_ADDR) + (REG_NAME##_REG_OFFSET)) ))
-
-/***************************************************************************//**
- * The macro HAL_set_32bit_reg_field() is used to write a field within a
- * 32 bits wide register. The field written can be one or more bits.
- * 
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * FIELD_NAME:  A string identifying the register field to write. These strings
- * 				are specified in a header file associated with the peripheral.
- * VALUE:       A variable of type uint32_t containing the field value to write.
- */
-#define HAL_set_32bit_reg_field(BASE_ADDR, FIELD_NAME, VALUE) \
-            (HW_set_32bit_reg_field(\
-                (BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
-                FIELD_SHIFT(FIELD_NAME),\
-                FIELD_MASK(FIELD_NAME),\
-                (VALUE)))
-  
-/***************************************************************************//**
- * The macro HAL_get_32bit_reg_field() is used to read a register field from
- * within a 32 bit wide peripheral register. The field can be one or more bits.
- * 
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * FIELD_NAME:  A string identifying the register field to write. These strings
- * 				are specified in a header file associated with the peripheral.
- * RETURN:		This function-like macro returns a uint32_t value.
- */
-#define HAL_get_32bit_reg_field(BASE_ADDR, FIELD_NAME) \
-            (HW_get_32bit_reg_field(\
-                (BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
-                FIELD_SHIFT(FIELD_NAME),\
-                FIELD_MASK(FIELD_NAME)))
-  
-/***************************************************************************//**
- * The macro HAL_set_16bit_reg() allows writing a 16 bits wide register.
- *
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * REG_NAME:    A string identifying the register to write. These strings are
- *              specified in a header file associated with the peripheral.
- * VALUE:       A variable of type uint_fast16_t containing the value to write.
- */
-#define HAL_set_16bit_reg(BASE_ADDR, REG_NAME, VALUE) \
-            (HW_set_16bit_reg( ((BASE_ADDR) + (REG_NAME##_REG_OFFSET)), (VALUE) ))
-
-/***************************************************************************//**
- * The macro HAL_get_16bit_reg() is used to read the value  of a 16 bits wide
- * register.
- * 
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * REG_NAME:    A string identifying the register to read. These strings are
- *              specified in a header file associated with the peripheral.
- * RETURN:		This function-like macro returns a uint16_t value.
- */
-#define HAL_get_16bit_reg(BASE_ADDR, REG_NAME) \
-            (HW_get_16bit_reg( (BASE_ADDR) + (REG_NAME##_REG_OFFSET) ))
-
-/***************************************************************************//**
- * The macro HAL_set_16bit_reg_field() is used to write a field within a
- * 16 bits wide register. The field written can be one or more bits.
- * 
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * FIELD_NAME:  A string identifying the register field to write. These strings
- * 				are specified in a header file associated with the peripheral.
- * VALUE:       A variable of type uint16_t containing the field value to write.
- */
-#define HAL_set_16bit_reg_field(BASE_ADDR, FIELD_NAME, VALUE) \
-            (HW_set_16bit_reg_field(\
-                (BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
-                FIELD_SHIFT(FIELD_NAME),\
-                FIELD_MASK(FIELD_NAME),\
-                (VALUE)))  
-
-/***************************************************************************//**
- * The macro HAL_get_16bit_reg_field() is used to read a register field from
- * within a 8 bit wide peripheral register. The field can be one or more bits.
- * 
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * FIELD_NAME:  A string identifying the register field to write. These strings
- * 				are specified in a header file associated with the peripheral.
- * RETURN:		This function-like macro returns a uint16_t value.
- */
-#define HAL_get_16bit_reg_field(BASE_ADDR, FIELD_NAME) \
-            (HW_get_16bit_reg_field(\
-                (BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
-                FIELD_SHIFT(FIELD_NAME),\
-                FIELD_MASK(FIELD_NAME)))
-
-/***************************************************************************//**
- * The macro HAL_set_8bit_reg() allows writing a 8 bits wide register.
- *
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * REG_NAME:    A string identifying the register to write. These strings are
- *              specified in a header file associated with the peripheral.
- * VALUE:       A variable of type uint_fast8_t containing the value to write.
- */
-#define HAL_set_8bit_reg(BASE_ADDR, REG_NAME, VALUE) \
-          (HW_set_8bit_reg( ((BASE_ADDR) + (REG_NAME##_REG_OFFSET)), (VALUE) ))
-
-/***************************************************************************//**
- * The macro HAL_get_8bit_reg() is used to read the value of a 8 bits wide
- * register.
- * 
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * REG_NAME:    A string identifying the register to read. These strings are
- *              specified in a header file associated with the peripheral.
- * RETURN:		This function-like macro returns a uint8_t value.
- */
-#define HAL_get_8bit_reg(BASE_ADDR, REG_NAME) \
-          (HW_get_8bit_reg( (BASE_ADDR) + (REG_NAME##_REG_OFFSET) ))
-
-/***************************************************************************//**
- */
-#define HAL_set_8bit_reg_field(BASE_ADDR, FIELD_NAME, VALUE) \
-            (HW_set_8bit_reg_field(\
-                (BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
-                FIELD_SHIFT(FIELD_NAME),\
-                FIELD_MASK(FIELD_NAME),\
-                (VALUE)))
-
-/***************************************************************************//**
- * The macro HAL_get_8bit_reg_field() is used to read a register field from
- * within a 8 bit wide peripheral register. The field can be one or more bits.
- * 
- * BASE_ADDR:   A variable of type addr_t specifying the base address of the
- *              peripheral containing the register.
- * FIELD_NAME:  A string identifying the register field to write. These strings
- * 				are specified in a header file associated with the peripheral.
- * RETURN:		This function-like macro returns a uint8_t value.
- */
-#define HAL_get_8bit_reg_field(BASE_ADDR, FIELD_NAME) \
-            (HW_get_8bit_reg_field(\
-                (BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
-                FIELD_SHIFT(FIELD_NAME),\
-                FIELD_MASK(FIELD_NAME)))
-  
-#endif /*HAL_H_*/

bsp/smartfusion2/CMSIS/hal/hal_assert.h

@@ -1,34 +0,0 @@
-/*******************************************************************************
- * (c) Copyright 2008-2013 Microsemi SoC Products Group. All rights reserved.
- * 
- * SVN $Revision: 7375 $
- * SVN $Date: 2015-05-01 19:27:40 +0530 (Fri, 01 May 2015) $
- */
-#ifndef HAL_ASSERT_HEADER
-#define HAL_ASSERT_HEADER
-
-#ifdef MSCC_NO_RELATIVE_PATHS
-#include "mss_assert.h"
-#else
-#include "../CMSIS/mss_assert.h"
-#endif
-
-#if defined(NDEBUG)
-/***************************************************************************//**
- * HAL_ASSERT() is defined out when the NDEBUG symbol is used.
- ******************************************************************************/
-#define HAL_ASSERT(CHECK)
-
-#else
-/***************************************************************************//**
- * Default behaviour for HAL_ASSERT() macro:
- *------------------------------------------------------------------------------
- * Using the HAL_ASSERT() macro is the same as directly using the SmartFusion2
- * CMSIS ASSERT() macro. The behaviour is toolchain specific and project
- * setting specific.
- ******************************************************************************/
-#define HAL_ASSERT(CHECK)     ASSERT(CHECK);
-
-#endif  /* NDEBUG */
-
-#endif  /* HAL_ASSERT_HEADER */

bsp/smartfusion2/CMSIS/hal/hw_reg_access.h

@@ -1,227 +0,0 @@
-/***************************************************************************//**
- * (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
- * 
- * Hardware registers access functions.
- * The implementation of these function is platform and toolchain specific.
- * The functions declared here are implemented using assembler as part of the 
- * processor/toolchain specific HAL.
- * 
- * SVN $Revision: 5258 $
- * SVN $Date: 2013-03-21 18:11:02 +0530 (Thu, 21 Mar 2013) $
- */
-#ifndef HW_REG_ACCESS
-#define HW_REG_ACCESS
-
-/***************************************************************************//**
- * HW_set_32bit_reg is used to write the content of a 32 bits wide peripheral
- * register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  write.
- * @param value     Value to be written into the peripheral register.
- */
-void
-HW_set_32bit_reg
-(
-	addr_t reg_addr,
-	uint32_t value
-);
-
-/***************************************************************************//**
- * HW_get_32bit_reg is used to read the content of a 32 bits wide peripheral
- * register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  read.
- * @return          32 bits value read from the peripheral register.
- */
-uint32_t
-HW_get_32bit_reg
-(
-	addr_t reg_addr
-);
-
-/***************************************************************************//**
- * HW_set_32bit_reg_field is used to set the content of a field in a 32 bits 
- * wide peripheral register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  be written.
- * @param shift     Bit offset of the register field to be read within the 
- *                  register.
- * @param mask      Bit mask to be applied to the raw register value to filter
- *                  out the other register fields values.
- * @param value     Value to be written in the specified field.
- */
-void
-HW_set_32bit_reg_field
-(
-    addr_t reg_addr,
-    int_fast8_t shift,
-    uint32_t mask,
-    uint32_t value
-);
-
-/***************************************************************************//**
- * HW_get_32bit_reg_field is used to read the content of a field out of a 
- * 32 bits wide peripheral register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  read.
- * @param shift     Bit offset of the register field to be written within the 
- *                  register.
- * @param mask      Bit mask to be applied to the raw register value to filter
- *                  out the other register fields values.
- *
- * @return          32 bits value containing the register field value specified
- *                  as parameter.
- */
-uint32_t 
-HW_get_32bit_reg_field
-(
-    addr_t reg_addr,
-    int_fast8_t shift,
-    uint32_t mask
-);
-
-/***************************************************************************//**
- * HW_set_16bit_reg is used to write the content of a 16 bits wide peripheral
- * register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  write.
- * @param value     Value to be written into the peripheral register.
- */
-void
-HW_set_16bit_reg
-(
-	addr_t reg_addr,
-	uint_fast16_t value
-);
-
-/***************************************************************************//**
- * HW_get_16bit_reg is used to read the content of a 16 bits wide peripheral
- * register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  read.
- * @return          16 bits value read from the peripheral register.
- */
-uint16_t
-HW_get_16bit_reg
-(
-	addr_t reg_addr
-);
-
-/***************************************************************************//**
- * HW_set_16bit_reg_field is used to set the content of a field in a 16 bits 
- * wide peripheral register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  be written.
- * @param shift     Bit offset of the register field to be read within the 
- *                  register.
- * @param mask      Bit mask to be applied to the raw register value to filter
- *                  out the other register fields values.
- * @param value     Value to be written in the specified field.
- */
-void HW_set_16bit_reg_field
-(
-    addr_t reg_addr,
-    int_fast8_t shift,
-    uint_fast16_t mask,
-    uint_fast16_t value
-);
-
-/***************************************************************************//**
- * HW_get_16bit_reg_field is used to read the content of a field from a 
- * 16 bits wide peripheral register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  read.
- * @param shift     Bit offset of the register field to be written within the 
- *                  register.
- * @param mask      Bit mask to be applied to the raw register value to filter
- *                  out the other register fields values.
- *
- * @return          16 bits value containing the register field value specified
- *                  as parameter.
- */
-uint16_t HW_get_16bit_reg_field
-(
-    addr_t reg_addr,
-    int_fast8_t shift,
-    uint_fast16_t mask
-);
-
-/***************************************************************************//**
- * HW_set_8bit_reg is used to write the content of a 8 bits wide peripheral
- * register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  write.
- * @param value     Value to be written into the peripheral register.
- */
-void
-HW_set_8bit_reg
-(
-	addr_t reg_addr,
-	uint_fast8_t value
-);
-
-/***************************************************************************//**
- * HW_get_8bit_reg is used to read the content of a 8 bits wide peripheral
- * register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  read.
- * @return          8 bits value read from the peripheral register.
- */
-uint8_t
-HW_get_8bit_reg
-(
-    addr_t reg_addr
-);
-
-/***************************************************************************//**
- * HW_set_8bit_reg_field is used to set the content of a field in a 8 bits 
- * wide peripheral register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  be written.
- * @param shift     Bit offset of the register field to be read within the 
- *                  register.
- * @param mask      Bit mask to be applied to the raw register value to filter
- *                  out the other register fields values.
- * @param value     Value to be written in the specified field.
- */
-void HW_set_8bit_reg_field
-(
-    addr_t reg_addr,
-    int_fast8_t shift,
-    uint_fast8_t mask,
-    uint_fast8_t value
-);
-
-/***************************************************************************//**
- * HW_get_8bit_reg_field is used to read the content of a field from a 
- * 8 bits wide peripheral register.
- * 
- * @param reg_addr  Address in the processor's memory map of the register to
- *                  read.
- * @param shift     Bit offset of the register field to be written within the 
- *                  register.
- * @param mask      Bit mask to be applied to the raw register value to filter
- *                  out the other register fields values.
- *
- * @return          16 bits value containing the register field value specified
- *                  as parameter.
- */
-uint8_t HW_get_8bit_reg_field
-(
-    addr_t reg_addr,
-    int_fast8_t shift,
-    uint_fast8_t mask
-);
-
-#endif /* HW_REG_ACCESS */

bsp/smartfusion2/CMSIS/hal/hw_reg_access.s

@@ -1,175 +0,0 @@
-;******************************************************************************
-; (c) Copyright 2008-2013 Microsemi SoC Products Group. All rights reserved.
-; 
-; SVN $Revision: 5258 $
-; SVN $Date: 2013-03-21 18:11:02 +0530 (Thu, 21 Mar 2013) $
-;
-
-    AREA    |.text|, CODE, READONLY
-    EXPORT HW_set_32bit_reg
-    EXPORT HW_get_32bit_reg
-    EXPORT HW_set_32bit_reg_field
-    EXPORT HW_get_32bit_reg_field
-    EXPORT HW_set_16bit_reg
-    EXPORT HW_get_16bit_reg
-    EXPORT HW_set_16bit_reg_field
-    EXPORT HW_get_16bit_reg_field
-    EXPORT HW_set_8bit_reg
-    EXPORT HW_get_8bit_reg
-    EXPORT HW_set_8bit_reg_field
-    EXPORT HW_get_8bit_reg_field
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-; R1:   uint32_t value
-;
-HW_set_32bit_reg \
-    PROC
-    STR R1, [R0]
-    BX LR
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-;      
-HW_get_32bit_reg \
-    PROC
-    LDR R0, [R0]
-    BX LR
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-; R1:   int_fast8_t shift
-; R2:   uint32_t mask
-; R3:   uint32_t value
-;
-HW_set_32bit_reg_field \
-    PROC
-    PUSH {R1,R2,R3,LR}
-    LSL.W R3, R3, R1
-    AND.W R3, R3, R2
-    LDR R1, [R0]
-    MVN.W R2, R2
-    AND.W R1, R1, R2
-    ORR.W R1, R1, R3
-    STR R1, [R0]
-    POP {R1,R2,R3,PC}
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-; R1:   int_fast8_t shift
-; R2:   uint32_t mask
-;
-HW_get_32bit_reg_field \
-    PROC
-    LDR R0, [R0]
-    AND.W R0, R0, R2
-    LSR.W R0, R0, R1
-    BX LR
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-; R1:   uint_fast16_t value
-;
-HW_set_16bit_reg \
-    PROC
-    STRH R1, [R0]
-    BX LR
-    ENDP
-        
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-;
-HW_get_16bit_reg \
-    PROC
-    LDRH R0, [R0]
-    BX LR
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-; R1:   int_fast8_t shift
-; R2:   uint_fast16_t mask
-; R3:   uint_fast16_t value
-;
-HW_set_16bit_reg_field \
-    PROC
-    PUSH {R1,R2,R3,LR}
-    LSL.W R3, R3, R1
-    AND.W R3, R3, R2
-    LDRH R1, [R0]
-    MVN.W R2, R2
-    AND.W R1, R1, R2
-    ORR.W R1, R1, R3
-    STRH R1, [R0]
-    POP {R1,R2,R3,PC}
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-; R1:   int_fast8_t shift
-; R2:   uint_fast16_t mask
-;
-HW_get_16bit_reg_field \
-    PROC
-    LDRH R0, [R0]
-    AND.W R0, R0, R2
-    LSR.W R0, R0, R1
-    BX LR
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-; R1:   uint_fast8_t value
-;
-HW_set_8bit_reg \
-    PROC
-    STRB R1, [R0]
-    BX LR
-    ENDP
-        
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-;
-HW_get_8bit_reg \
-    PROC
-    LDRB R0, [R0]
-    BX LR
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr,
-; R1:   int_fast8_t shift
-; R2:   uint_fast8_t mask
-; R3:   uint_fast8_t value
-;
-HW_set_8bit_reg_field \
-    PROC
-    PUSH {R1,R2,R3,LR}
-    LSL.W R3, R3, R1
-    AND.W R3, R3, R2
-    LDRB R1, [R0]
-    MVN.W R2, R2
-    AND.W R1, R1, R2
-    ORR.W R1, R1, R3
-    STRB R1, [R0]
-    POP {R1,R2,R3,PC}
-    ENDP
-
-;------------------------------------------------------------------------------
-; R0:   addr_t reg_addr
-; R1:   int_fast8_t shift
-; R2:   uint_fast8_t mask
-;
-HW_get_8bit_reg_field \
-    PROC
-    LDRB R0, [R0]
-    AND.W R0, R0, R2
-    LSR.W R0, R0, R1
-    BX LR
-    ENDP
-
-    END

bsp/smartfusion2/CMSIS/startup_arm/low_level_init.c

@@ -0,0 +1,44 @@
+/*******************************************************************************
+ * (c) Copyright 2014 Microsemi SoC Products Group. All rights reserved.
+ *
+ *  Keil-MDK specific system initialization.
+ *
+ * SVN $Revision: 7375 $
+ * SVN $Date: 2015-05-01 14:57:40 +0100 (Fri, 01 May 2015) $
+ */
+#ifdef MSCC_NO_RELATIVE_PATHS
+#include "m2sxxx.h"
+#else
+#include "..\m2sxxx.h"
+#endif
+
+#define ENVM_BASE_ADDRESS       0x60000000U
+#define MDDR_BASE_ADDRESS       0xA0000000U
+
+//extern unsigned int Image$$ER_RW$$Base;
+//extern unsigned int Image$$ER_RO$$Base;
+
+/*==============================================================================
+ * The __low_level_init() function is called after SystemInit. Therefore, the
+ * external RAM should be configured at this stage if it is used.
+ */
+/* void low_level_init(void)
+{
+    volatile unsigned int rw_region_base;
+    volatile unsigned int readonly_region_base;
+    
+    rw_region_base = (unsigned int)&Image$$ER_RW$$Base;
+    if (rw_region_base >= MDDR_BASE_ADDRESS)
+    {
+        / --------------------------------------------------------------------------
+         * Remap MDDR to address 0x00000000.
+         /
+        SYSREG->ESRAM_CR = 0u;
+        SYSREG->ENVM_REMAP_BASE_CR = 0u;
+        SYSREG->DDR_CR = 1u;
+    }
+    
+    readonly_region_base = (unsigned int)&Image$$ER_RO$$Base;
+    SCB->VTOR = readonly_region_base;
+}  */
+

bsp/smartfusion2/CMSIS/startup_arm/retarget.c

@@ -0,0 +1,150 @@
+/*******************************************************************************
+ * (c) Copyright 2013 Microsemi SoC Products Group.  All rights reserved.
+ *
+ * Redirection of the standard library I/O to one of the SmartFusion2
+ * MMUART.
+ *
+ * SVN $Revision: 7375 $
+ * SVN $Date: 2015-05-01 14:57:40 +0100 (Fri, 01 May 2015) $
+ */
+
+/*==============================================================================
+ * The content of this source file will only be compiled if either one of the
+ * following two defined symbols are defined in the project settings:
+ *  - MICROSEMI_STDIO_THRU_MMUART0
+ *  - MICROSEMI_STDIO_THRU_MMUART1
+ *
+ */
+#ifdef MICROSEMI_STDIO_THRU_MMUART0
+#ifndef MICROSEMI_STDIO_THRU_UART
+#define MICROSEMI_STDIO_THRU_UART
+#endif
+#endif  /* MICROSEMI_STDIO_THRU_MMUART0 */
+
+#ifdef MICROSEMI_STDIO_THRU_MMUART1
+#ifndef MICROSEMI_STDIO_THRU_UART
+#define MICROSEMI_STDIO_THRU_UART
+#endif
+#endif  /* MICROSEMI_STDIO_THRU_MMUART1 */
+
+/*==============================================================================
+ * Actual implementation.
+ */
+#ifdef MICROSEMI_STDIO_THRU_UART
+
+#include <stdio.h>
+#include <rt_misc.h>
+
+#include "m2sxxx.h"
+#include "mss_uart.h"
+#include "core_uart_apb.h"
+
+
+/*
+ * The baud rate will default to 57600 baud if no baud rate is specified though the
+ * MICROSEMI_STDIO_BAUD_RATE define.
+ */
+#ifndef MICROSEMI_STDIO_BAUD_RATE
+#define MICROSEMI_STDIO_BAUD_RATE  MSS_UART_115200_BAUD
+#endif
+
+#ifdef MICROSEMI_STDIO_THRU_MMUART0
+static mss_uart_instance_t * const gp_my_uart = &g_mss_uart0;
+#else
+static mss_uart_instance_t * const gp_my_uart = &g_mss_uart1;
+#endif
+
+/*==============================================================================
+ * Flag used to indicate if the UART driver needs to be initialized.
+ */
+static int g_stdio_uart_init_done = 0;
+
+
+#define LSR_THRE_MASK   0x20u
+
+/*
+ * Disable semihosting apis
+ */
+#pragma import(__use_no_semihosting_swi)
+
+/*==============================================================================
+ * sendchar()
+ */
+int sendchar(int ch)  
+{
+    uint32_t tx_ready;
+	//第一次调用时，初始化串口
+    if(!g_stdio_uart_init_done)
+    {
+        MSS_UART_init(gp_my_uart,
+                      MICROSEMI_STDIO_BAUD_RATE,
+                      MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY);
+        g_stdio_uart_init_done = 1;
+    }
+    do {
+        tx_ready = gp_my_uart->hw_reg->LSR & LSR_THRE_MASK;
+    } while(!tx_ready);
+    gp_my_uart->hw_reg->THR = ch;
+    return (ch);
+}
+
+/*==============================================================================
+ * 
+ */
+struct __FILE { int handle; /* Add whatever you need here */ };
+FILE __stdout;
+FILE __stdin;
+
+
+/*==============================================================================
+ * fputc()
+ */
+int fputc(int ch, FILE *f)
+{
+  return (sendchar(ch));
+}
+
+/*==============================================================================
+ * fgetc()
+ */
+int fgetc(FILE *f)
+{
+    uint8_t rx_size;
+    uint8_t rx_byte;
+    
+    do {
+        rx_size = MSS_UART_get_rx(gp_my_uart, &rx_byte, 1);
+    } while(0u == rx_size);
+
+    return rx_byte;
+}
+
+/*==============================================================================
+ * ferror()
+ */
+int ferror(FILE *f)
+{
+  /* Your implementation of ferror */
+  return EOF;
+}
+
+/*==============================================================================
+ * _ttywrch()
+ */
+void _ttywrch(int ch)
+{
+  sendchar(ch);
+}
+
+/*==============================================================================
+ * _sys_exit()
+ */
+void _sys_exit(int return_code)
+{
+    for(;;)
+    {
+        ;  /* endless loop */
+    }
+}
+
+#endif  /* MICROSEMI_STDIO_THRU_UART */

bsp/smartfusion2/CMSIS/startup_gcc/debug-in-microsemi-smartfusion2-envm.ld

@@ -0,0 +1,249 @@
+/*******************************************************************************
+ * (c) Copyright 2015 Microsemi SoC Products Group.  All rights reserved.
+ * 
+ * file name : debug-in-microsemi-smartfusion2-envm.ld
+ * SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
+ * debug image executing in SmartFusion2 internal eNVM.
+ * 
+ * Some current (April 2015) dev kit memory map possibilities are
+ * --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
+ * --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
+ * --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
+ * --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
+ * --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
+ * --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
+ * --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
+ * --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
+ * --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
+ * --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
+ * --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
+ * --Some older physical memory map possibilities are
+ * --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
+ * --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
+ * --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
+ *
+ * Example linker scripts use lowest practicl values so will work accross dev kits
+ * eNVM=256KB  eRAM=64KB  External memory = 64MB  
+ *	
+ * On reset, the eNVM region is mapped to 0x00000000 
+ * This is changed below by setting the __smartfusion2_memory_remap variable as required.
+ * Options are detailed below.
+ *
+ * SVN $Revision: 7419 $
+ * SVN $Date: 2015-05-15 21:20:21 +0530 (Fri, 15 May 2015) $
+ */
+ 
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+GROUP(-lc -lgcc -lm)
+OUTPUT_ARCH(arm)
+ENTRY(Reset_Handler)
+SEARCH_DIR(.)
+__DYNAMIC  =  0;
+
+/*******************************************************************************
+ * Start of board customization.
+ *******************************************************************************/
+MEMORY
+{
+	/*
+	*	In general, example LD scripts use lowest common memory footprint
+	*	so will work with all devices.
+	*/
+	/*
+	* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
+	*          the name of the type of flash memory are all in a specific order.
+	*          Please do not modify that comment line, in order to ensure
+	*          debugging of your application will use the flash memory correctly.
+	*/
+	
+	/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
+	rom (rx)  : ORIGIN = 0x60000000, LENGTH = 256k
+	
+	/* SmartFusion2 internal eNVM mirrored to 0x00000000 */
+	romMirror (rx) : ORIGIN = 0x00000000, LENGTH = 256k
+	
+	/* SmartFusion2 internal eSRAM */
+	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
+}
+
+RAM_START_ADDRESS 	= 0x20000000;     	/* Must be the same value MEMORY region ram ORIGIN above. */
+RAM_SIZE 			= 64k;              /* Must be the same value MEMORY region ram LENGTH above. */
+MAIN_STACK_SIZE 	= 4k;               /* Cortex main stack size. */
+MIN_SIZE_HEAP 		= 4k;				/* needs to be calculated for your application */
+
+/*******************************************************************************
+ * End of board customization.
+ *******************************************************************************/
+
+PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
+PROVIDE (_estack = __main_stack_start);
+PROVIDE (__mirrored_nvm = 1);   /* Indicate to startup code that NVM is mirrored to VMA address and no text copy is required. */
+
+/*
+ * 	Remap instruction for startup code and debugger.
+ *  set __smartfusion2_memory_remap to one of the following:
+ *  0: remap eNVM to address 0x00000000       			Production mode or debugging from eNVM   
+ *  1: remap eSRAM to address 0x00000000				Debugging from eSRAM
+ *  2: remap external DDR memory to address 0x00000000  Debugging from DDR memory
+ */
+PROVIDE (__smartfusion2_memory_remap = 0);
+
+SECTIONS
+{
+  .vector_table : ALIGN(0x10)
+  {
+    __vector_table_load = LOADADDR(.vector_table);
+    __vector_table_start = .;
+    __vector_table_vma_base_address = .;			/* required by debugger for start address */
+    KEEP(*(.isr_vector))
+    . = ALIGN(0x10);
+    _evector_table = .;
+  } >romMirror AT>rom
+  
+   /* all data and code run/used before reloaction must be located here */
+   /* When all code in NVRAM, no requirement for this section- but adds clarity when looking at .lst file */
+  .boot_code : ALIGN(0x10)
+  {
+    *(.boot_code)				        /* reset handler */
+    *system_m2sxxx.o(.text*) 	        /* SystemInit() - called before relocation to RAM so keep in ROM */
+    *sys_config.o(.rodata*)
+    . = ALIGN(0x10);
+  } >romMirror AT>rom
+  
+  .text : ALIGN(0x10)
+  {
+    CREATE_OBJECT_SYMBOLS
+    __text_load = LOADADDR(.text);									/* required when copying to RAM */
+    __text_start = .;												/* required when copying to RAM */
+    *(.text .text.* .gnu.linkonce.t.*)
+    *(.plt)
+    *(.gnu.warning)
+    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+
+    . = ALIGN(4);
+    /* These are for running static constructors and destructors under ELF.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+
+    *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    *(.gcc_except_table) 
+    *(.eh_frame_hdr)
+    *(.eh_frame)
+
+    KEEP (*(.vector_table))
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(.fini_array))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(0x10);
+  } >romMirror AT>rom
+
+  /* .ARM.exidx is sorted, so has to go in its own output section.  */
+   __exidx_start = .;
+  .ARM.exidx :
+  {
+    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+  } >ram AT>rom
+  __exidx_end = .;
+  _etext = .;													/* required when copying to RAM */
+
+  .data : ALIGN(0x10)
+  {
+    __data_load = LOADADDR(.data);								/* used when copying to RAM */
+    _sidata = LOADADDR (.data);									
+    __data_start = .;											/* used when copying to RAM */
+    _sdata = .;
+    KEEP(*(.jcr))
+    *(.got.plt) *(.got)
+    *(.shdata)
+    *(.data .data.* .gnu.linkonce.d.*)
+    . = ALIGN (0x10);
+    _edata = .;													/* used when copying to RAM */
+  } >ram AT>rom
+
+  .bss : ALIGN(0x10)
+  {
+    __bss_start__ = . ;
+    _sbss = .;
+    *(.shbss)
+    *(.bss .bss.* .gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN(0x10);
+    __bss_end__ = .;
+    _end = .;
+    __end = _end;
+    _ebss = .;
+    PROVIDE(end = .);
+  } >ram AT>rom
+  
+  .heap : ALIGN(0x10)
+  {
+    __heap_start__ = .;
+    . += MIN_SIZE_HEAP;			/* will generate error if this minimum size not available */
+    . += ((ABSOLUTE(RAM_START_ADDRESS) + RAM_SIZE - MAIN_STACK_SIZE) - .); /* assumes stack starts after heap */
+    _eheap = .;
+  } >ram
+  
+  .stack : ALIGN(0x10)
+  {
+    __stack_start__ = .;
+    . += MAIN_STACK_SIZE;
+    _estack = .;
+  } >ram
+  
+  .stab 0 (NOLOAD) :
+  {
+    *(.stab)
+  }
+
+  .stabstr 0 (NOLOAD) :
+  {
+    *(.stabstr)
+  }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
+  /DISCARD/ : { *(.note.GNU-stack)  }
+}

bsp/smartfusion2/CMSIS/startup_gcc/debug-in-microsemi-smartfusion2-esram.ld

@@ -0,0 +1,248 @@
+/*******************************************************************************
+ * (c) Copyright 2015 Microsemi SoC Products Group.  All rights reserved.
+ * 
+ * file name : debug-in-microsemi-smartfusion2-esram.ld
+ * SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
+ * debug image executing in SmartFusion2 internal eSRAM.
+ * 
+ * Some current (April 2015) dev kit memory map possibilities are
+ * --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
+ * --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
+ * --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
+ * --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
+ * --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
+ * --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
+ * --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
+ * --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
+ * --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
+ * --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
+ * --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
+ * --Some older physical memory map possibilities are
+ * --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
+ * --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
+ * --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
+ *
+ * Example linker scripts use lowest practicl values so will work accross dev kits
+ * eNVM=256KB  eRAM=64KB  External memory = 64MB  
+ *
+ * On reset, the eNVM region is mapped to 0x00000000 
+ * This is changed below by setting the __smartfusion2_memory_remap variable as required.
+ * Options are detailed below.
+ *
+ * SVN $Revision: 7478 $
+ * SVN $Date: 2015-06-18 21:48:18 +0530 (Thu, 18 Jun 2015) $
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+GROUP(-lc -lgcc -lm)
+OUTPUT_ARCH(arm)
+ENTRY(Reset_Handler)
+SEARCH_DIR(.)
+__DYNAMIC  =  0;
+
+/*******************************************************************************
+ * Start of board customization.
+ *******************************************************************************/
+MEMORY
+{
+	/*
+	*	In general, example LD scripts use lowest common memory footprint
+	*	so will work with all devices.
+	*/
+	/*
+	* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
+	*          the name of the type of flash memory are all in a specific order.
+	*          Please do not modify that comment line, in order to ensure
+	*          debugging of your application will use the flash memory correctly.
+	*/ 
+	/* SmartFusion2 internal eSRAM */
+	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
+}
+
+RAM_START_ADDRESS 	= 0x20000000;     	/* Must be the same value MEMORY region ram ORIGIN above. */
+RAM_SIZE 			= 64k;              /* Must be the same value MEMORY region ram LENGTH above. */
+MAIN_STACK_SIZE 	= 4k;               /* Cortex main stack size. */
+MIN_SIZE_HEAP 		= 4k;				/* needs to be calculated for your application */
+
+/* Please note that unassigned RAM will be allocated to the .heap section. */
+
+/*******************************************************************************
+ * End of board customization.
+ *******************************************************************************/
+ 
+PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
+PROVIDE (_estack = __main_stack_start);
+PROVIDE (__mirrored_nvm = 0);   /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
+
+ /*
+  * Remap instruction for start-up code and debugger.
+  *  set __smartfusion2_memory_remap to one of the following:
+  *  0: remap eNVM to address 0x00000000                           Production mode or debugging from eNVM   
+  *  1: remap eSRAM to address 0x00000000                          See note 1 below.
+  *  2: remap external DDR memory to address 0x00000000            Debugging from or production relocate to DDR memory
+  *  note 1: This option should only be used in production mode if required. When debugging using eSRAM, code is not
+  *  relocated and __smartfusion2_memory_remap should be set to option 0. In revision 7419 and below of
+  *  this file, __smartfusion2_memory_remap was set to option 1. This remap was not required and could lead to an issue
+  *  when displaying some invalid memory locations in the debugger using some Libero designs.
+  * 
+  */
+
+PROVIDE (__smartfusion2_memory_remap = 0);
+
+SECTIONS
+{
+  .vector_table : ALIGN(0x10)
+  {
+    __vector_table_load = LOADADDR(.vector_table);
+    __vector_table_start = .;
+    __vector_table_vma_base_address = .;
+    KEEP(*(.isr_vector))
+    . = ALIGN(0x10);
+    _evector_table = .;
+  } >ram
+  
+  .boot_code : ALIGN(0x10) /* When all code in RAM, no requirement for this section- but adds clarity when looking at .lst file */
+  {
+  	*(.boot_code)
+  	. = ALIGN(0x10);
+  } >ram
+  
+  .text :
+  ALIGN(0x10)
+  {
+    CREATE_OBJECT_SYMBOLS
+    __text_load = LOADADDR(.text);
+    __text_start = .;
+    *(.text .text.* .gnu.linkonce.t.*)
+    *(.plt)
+    *(.gnu.warning)
+    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+
+    . = ALIGN(0x4);
+    /* These are for running static constructors and destructors under ELF.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+
+    *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    *(.gcc_except_table) 
+    *(.eh_frame_hdr)
+    *(.eh_frame)
+
+    KEEP (*(.vector_table))
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(.fini_array))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(0x10);
+  } >ram
+  /* .ARM.exidx is sorted, so has to go in its own output section.  */
+   __exidx_start = .;
+  .ARM.exidx :
+  {
+    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+  } >ram
+  __exidx_end = .;
+  _etext = .;
+  PROVIDE(__text_end = .);
+
+  .data :
+  ALIGN(0x10)
+  {
+    __data_load = LOADADDR (.data);
+    _sidata = LOADADDR (.data);
+    __data_start = .;
+    _sdata = .;
+    KEEP(*(.jcr))
+    *(.got.plt) *(.got)
+    *(.shdata)
+    *(.data .data.* .gnu.linkonce.d.*)
+    . = ALIGN(0x10);
+    _edata = .;
+  } >ram 
+
+  .bss : ALIGN(0x10)
+  {
+    __bss_start__ = . ;
+    _sbss = .;
+    *(.shbss)
+    *(.bss .bss.* .gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN(0x10);
+    __bss_end__ = .;
+    _end = .;
+    __end = _end;
+    _ebss = .;
+    PROVIDE(end = .);
+  } >ram 
+
+  .heap : ALIGN(0x10)
+  {
+    __heap_start__ = .;
+    . += MIN_SIZE_HEAP;			/* will generate error if this minimum size not available */
+    . += ((ABSOLUTE(RAM_START_ADDRESS) + RAM_SIZE - MAIN_STACK_SIZE) - .); /* assumes stack starts after heap */
+    _eheap = .;
+  } >ram
+  
+  .stack : ALIGN(0x10)
+  {
+    __stack_start__ = .;
+    . += MAIN_STACK_SIZE;
+    _estack = .;
+  } >ram
+  
+  .stab 0 (NOLOAD) :
+  {
+    *(.stab)
+  }
+
+  .stabstr 0 (NOLOAD) :
+  {
+    *(.stabstr)
+  }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
+  /DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
+}

bsp/smartfusion2/CMSIS/startup_gcc/debug-in-microsemi-smartfusion2-external-ram.ld

@@ -0,0 +1,238 @@
+/*******************************************************************************
+ * (c) Copyright 2015 Microsemi SoC Products Group.  All rights reserved.
+ * 
+ * file name : debug-in-microsemi-smartfusion2-external-ram.ld
+ * SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
+ * debug image executing in external eRAM.
+ * 
+ * Some current (April 2015) dev kit memory map possibilities are
+ * --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
+ * --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
+ * --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
+ * --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
+ * --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
+ * --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
+ * --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
+ * --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
+ * --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
+ * --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
+ * --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
+ * --Some older physical memory map possibilities are
+ * --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
+ * --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
+ * --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
+ *
+ * Example linker scripts use lowest practical values so will work accross dev kits
+ * eNVM=256KB  eRAM=64KB  External memory = 64MB  
+ *
+ * On reset, the eNVM region is mapped to 0x00000000 
+ * This is changed below by setting the __smartfusion2_memory_remap variable as required.
+ * Options are detailed below.
+ *
+ * SVN $Revision: 7419 $
+ * SVN $Date: 2015-05-15 21:20:21 +0530 (Fri, 15 May 2015) $
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+GROUP(-lc -lgcc -lm)
+OUTPUT_ARCH(arm)
+ENTRY(Reset_Handler)
+SEARCH_DIR(.)
+__DYNAMIC  =  0;
+
+/*******************************************************************************
+ * Start of board customization.
+ *******************************************************************************/
+MEMORY
+{
+	/*
+	*	In general, example LD scripts use lowest common memory footprint
+	*	accross dev boards so will work with all devices. Currently this is 64MB
+	*	Program and data space is split evenly in this example 32MB each
+	*/
+	/* SmartFusion2 internal eSRAM */
+	esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
+	
+	/* SmartFusion2 development board external RAM */
+	external_ram (rwx) : ORIGIN = 0x00000000, LENGTH = 32m
+	
+	/* External MDDR RAM used for data section. */
+	/* Must be enough room allocated for data section between 0xA0000000 and data_external_ram */
+	data_external_ram (rw) : ORIGIN = 0xA2000000, LENGTH = 32m
+}
+
+ESRAM_START_ADDRESS = 0x20000000;   /* Must be the same value MEMORY region ram ORIGIN above. */
+ESRAM_SIZE = 64k;                   /* Must be the same value MEMORY region ram LENGTH above. */
+MAIN_STACK_SIZE = 64k;              /* Cortex main stack size. */
+MIN_SIZE_HEAP 	= 64k;		    /* needs to be calculated for your application */
+TOP_OF_MDDR = 0xA4000000;           /* Top address of the external MDDR memory. */
+
+/*******************************************************************************
+ * End of board customization.
+ *******************************************************************************/
+/*PROVIDE (__main_ram_size = ESRAM_SIZE); */
+PROVIDE (__main_stack_start = ESRAM_START_ADDRESS + ESRAM_SIZE);
+PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
+PROVIDE (_estack = __main_stack_start);
+PROVIDE (__mirrored_nvm = 0);   /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
+
+/*
+ * 	Remap instruction for startup code and debugger.
+ *  set __smartfusion2_memory_remap to one of the following:
+ *  0: remap eNVM to address 0x00000000       			Production mode or debugging from eNVM   
+ *  1: remap eSRAM to address 0x00000000				Debugging from eSRAM
+ *  2: remap external DDR memory to address 0x00000000  Debugging from DDR memory
+ */
+PROVIDE (__smartfusion2_memory_remap = 2);
+
+SECTIONS
+{
+  .vector_table : ALIGN(0x10)
+  {
+    __vector_table_load = LOADADDR(.vector_table);
+    __vector_table_start = .;
+    __vector_table_vma_base_address = .;            /* required by debugger for start address */
+    KEEP(*(.isr_vector))
+    . = ALIGN(0x10);
+    _evector_table = .;
+  } >external_ram
+  
+   .text : ALIGN(0x10)
+  {
+    CREATE_OBJECT_SYMBOLS
+    __text_load = LOADADDR(.text);
+    __text_start = .;
+    *(.text .text.* .gnu.linkonce.t.*)
+    *(.plt)
+    *(.gnu.warning)
+    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+
+    . = ALIGN(0x4);
+    /* These are for running static constructors and destructors under ELF.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+
+    *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    *(.gcc_except_table) 
+    *(.eh_frame_hdr)
+    *(.eh_frame)
+
+    KEEP (*(.vector_table))
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(.fini_array))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(0x10);
+  } >external_ram
+  /* .ARM.exidx is sorted, so has to go in its own output section.  */
+   __exidx_start = .;
+  .ARM.exidx :
+  {
+    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+  } >external_ram
+  __exidx_end = .;
+  _etext = .;
+  PROVIDE(__text_end = .);
+
+  .data : ALIGN(0x10)
+  {
+    __data_load = LOADADDR (.data);
+    _sidata = LOADADDR (.data);
+    __data_start = .;
+    _sdata = .;
+    KEEP(*(.jcr))
+    *(.got.plt) *(.got)
+    *(.shdata)
+    *(.data .data.* .gnu.linkonce.d.*)
+    . = ALIGN(0x10);
+    _edata = .;
+  } >data_external_ram 
+
+  .bss : ALIGN(0x10)
+    {
+    __bss_start__ = . ;
+    _sbss = .;
+    *(.shbss)
+    *(.bss .bss.* .gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN(0x10);
+    __bss_end__ = .;
+    _end = .;
+    __end = _end;
+    _ebss = .;
+    PROVIDE(end = .);
+  } >data_external_ram 
+
+  .heap : ALIGN(0x10)
+  {
+    __heap_start__ = .;
+	. += MIN_SIZE_HEAP;			/* will generate error if this minimum size not available */
+    . += (ABSOLUTE(TOP_OF_MDDR) - . );
+    . = ALIGN(0x10);
+    _eheap = .;
+  } >data_external_ram
+
+  .stack : ALIGN(0x10)
+  {
+    __stack_start__ = .;
+    . += MAIN_STACK_SIZE;
+    . = ALIGN(0x10);
+    _estack = .;
+  } >esram
+  
+  .stab 0 (NOLOAD) :
+  {
+    *(.stab)
+  }
+
+  .stabstr 0 (NOLOAD) :
+  {
+    *(.stabstr)
+  }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
+  /DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
+}

bsp/smartfusion2/CMSIS/startup_gcc/production-smartfusion2-execute-in-place.ld

@@ -0,0 +1,241 @@
+/*******************************************************************************
+ * (c) Copyright 2015 Microsemi SoC Products Group.  All rights reserved.
+ * 
+ * file name : production-smartfusion2-execute-in-place.ld
+ * SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
+ * image executing in SmartFusion2 internal eNVM.
+ * 
+ * Some current (April 2015) dev kit memory map possibilities are
+ * --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
+ * --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
+ * --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
+ * --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
+ * --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
+ * --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
+ * --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
+ * --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
+ * --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
+ * --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
+ * --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
+ * --Some older physical memory map possibilities are
+ * --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
+ * --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
+ * --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
+ *
+ * Example linker scripts use lowest practicl values so will work accross dev kits
+ * eNVM=256KB  eRAM=64KB  External memory = 64MB  
+ *
+ * On reset, the eNVM region is mapped to 0x00000000 
+ * This is changed below by setting the __smartfusion2_memory_remap variable as required.
+ * Options are detailed below.
+ *
+ * SVN $Revision: 7454 $
+ * SVN $Date: 2015-06-08 20:28:07 +0530 (Mon, 08 Jun 2015) $
+ */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+GROUP(-lc -lgcc -lm)
+OUTPUT_ARCH(arm)
+ENTRY(Reset_Handler)
+SEARCH_DIR(.)
+__DYNAMIC  =  0;
+
+/*******************************************************************************
+ * Start of board customization.
+ *******************************************************************************/
+MEMORY
+{
+	/*
+	*	In general, example LD scripts use lowest common memory footprint
+	*	so will work with all devices.
+	*/
+	/*
+	* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
+	*          the name of the type of flash memory are all in a specific order.
+	*          Please do not modify that comment line, in order to ensure
+	*          debugging of your application will use the flash memory correctly.
+	*/
+	
+	/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
+	rom (rx)  : ORIGIN = 0x00000000, LENGTH = 256k
+	
+	/* SmartFusion2 internal eSRAM */
+	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
+}
+
+RAM_START_ADDRESS 	= 0x20000000;     		/* Must be the same value MEMORY region ram ORIGIN above. */
+RAM_SIZE 			= 64k;                  /* Must be the same value MEMORY region ram LENGTH above. */
+MAIN_STACK_SIZE 	= 4k;               	/* Cortex main stack size. */
+MIN_SIZE_HEAP 		= 4k;					/* needs to be calculated for your application */
+
+/*******************************************************************************
+ * End of board customization.
+ *******************************************************************************/
+ 
+PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
+PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
+PROVIDE (_estack = __main_stack_start);
+PROVIDE (__mirrored_nvm = 0);   /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
+
+/*
+ * Remap instruction for startup code and debugger:
+ *  0: remap eNVM to address 0x00000000
+ *  1: remap eSRAM to address 0x00000000
+ *  2: remap external DDR memory to address 0x00000000
+ */
+PROVIDE (__smartfusion2_memory_remap = 0);
+
+SECTIONS
+{
+  .vector_table :
+  {
+    __vector_table_load = LOADADDR(.vector_table);
+    __vector_table_start = .;
+    __vector_table_vma_base_address = .;
+    KEEP(*(.isr_vector))
+    . = ALIGN(0x10);
+    _evector_table = .;
+  } >rom
+  
+  .boot_code : ALIGN(0x10) /* When all code in NVRAM, no requirement for this section- but adds clarity when looking at .lst file */
+  {
+  	*(.boot_code)
+  	. = ALIGN(0x10);
+  } >rom
+  
+  .text : ALIGN(0x10)
+  {
+    CREATE_OBJECT_SYMBOLS
+    __text_load = LOADADDR(.text);
+    __text_start = .;
+    
+    *(.text .text.* .gnu.linkonce.t.*)
+    *(.plt)
+    *(.gnu.warning)
+    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+
+    . = ALIGN(0x4);
+    /* These are for running static constructors and destructors under ELF.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+
+    *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    *(.gcc_except_table) 
+    *(.eh_frame_hdr)
+    *(.eh_frame)
+
+    KEEP (*(.vector_table))
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(.fini_array))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(0x10);
+  } >rom
+  /* .ARM.exidx is sorted, so has to go in its own output section.  */
+   __exidx_start = .;
+  .ARM.exidx :
+  {
+    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+  } >rom
+  __exidx_end = .;
+  _etext = .;
+
+  .data : ALIGN(0x10)
+  {
+    __data_load = LOADADDR(.data);
+    _sidata = LOADADDR (.data);
+    __data_start = .;
+    _sdata = .;
+    KEEP(*(.jcr))
+    *(.got.plt) *(.got)
+    *(.shdata)
+    *(.data .data.* .gnu.linkonce.d.*)
+    . = ALIGN(0x10);
+    _edata = .;
+  } >ram AT>rom
+
+  .bss : ALIGN(0x10)
+  {
+    __bss_start__ = . ;
+    _sbss = .;
+    *(.shbss)
+    *(.bss .bss.* .gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN(0x10);
+    __bss_end__ = .;
+    _end = .;
+    __end = _end;
+    _ebss = .;
+    PROVIDE(end = .);
+  } >ram AT>rom
+
+  .heap : ALIGN(0x10)
+  {
+    __heap_start__ = .;
+    . += MIN_SIZE_HEAP;			/* will generate error if this minimum size not available */
+    . += ((ABSOLUTE(RAM_START_ADDRESS) + RAM_SIZE - MAIN_STACK_SIZE) - .); /* assumes stack starts after heap */
+    _eheap = .;
+  } >ram
+  
+  .stack : ALIGN(0x10)
+  {
+    __stack_start__ = .;
+    . += MAIN_STACK_SIZE;
+    _estack = .;
+  } >ram
+  
+  .stab 0 (NOLOAD) :
+  {
+    *(.stab)
+  }
+
+  .stabstr 0 (NOLOAD) :
+  {
+    *(.stabstr)
+  }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
+  /DISCARD/ : { *(.note.GNU-stack)  }
+}

bsp/smartfusion2/CMSIS/startup_gcc/production-smartfusion2-relocate-to-external-ram.ld

@@ -0,0 +1,260 @@
+/*******************************************************************************
+ * (c) Copyright 2015 Microsemi SoC Products Group.  All rights reserved.
+ * 
+ * file name : production-smartfusion2-relocate-to-external-ram.ld
+ * SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
+ * image which is copied from internal eNVM to external RAM during boot-up.
+ * 
+ * Some current (April 2015) dev kit memory map possibilities are
+ * --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
+ * --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
+ * --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
+ * --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
+ * --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
+ * --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
+ * --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
+ * --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
+ * --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
+ * --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
+ * --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
+ * --Some older physical memory map possibilities are
+ * --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
+ * --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
+ * --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
+ *
+ * Example linker scripts use lowest practicl values so will work accross dev kits
+ * eNVM=256KB  eRAM=64KB  External memory = 64MB  
+ *
+ * On reset, the eNVM region is mapped to 0x00000000 
+ * This is changed below by setting the __smartfusion2_memory_remap variable as required.
+ * Options are detailed below.
+ *
+ * SVN $Revision: 7419 $
+ * SVN $Date: 2015-05-15 21:20:21 +0530 (Fri, 15 May 2015) $
+ */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+GROUP(-lc -lgcc -lm)
+OUTPUT_ARCH(arm)
+ENTRY(Reset_Handler)
+SEARCH_DIR(.)
+__DYNAMIC  =  0;
+
+/*******************************************************************************
+ * Start of board customization.
+ *******************************************************************************/
+MEMORY
+{
+	/*
+	*	In general, example LD scripts use lowest common memory footprint
+	*	so will work with all devices.
+	*/
+	/*
+	* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
+	*          the name of the type of flash memory are all in a specific order.
+	*          Please do not modify that comment line, in order to ensure
+	*          debugging of your application will use the flash memory correctly.
+	*/
+	
+	/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
+	rom (rx) : ORIGIN = 0x60000000, LENGTH = 256k
+	
+	/* External MDDR RAM used for data section. */
+	/* 0xA0000000 where external memory starts */
+	/* first 0x00FFFFF reserved for relocated progam */
+	/* Locate external RX data above reserved program area */
+	/* !!! This must not overlap with external_ram when MDDR is remapped to 0x00000000.!!! */
+	data_external_ram (rw) : ORIGIN = 0xA2000000, LENGTH = 32m
+	/* SmartFusion2 development board external RAM */
+	external_ram (rwx) : ORIGIN = 0x00000000, LENGTH = 32m
+	
+	/* SmartFusion2 internal eSRAM */
+	esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
+   
+}
+
+ESRAM_START_ADDRESS = 0x20000000;   /* Must be the same value as MEMORY region esram ORIGIN above. */
+ESRAM_SIZE 		= 64k;           	/* Must be the same value as MEMORY region esram LENGTH above. */
+MAIN_STACK_SIZE = 64k;          	/* Cortex main stack size. */
+MIN_SIZE_HEAP 	= 64k;				/* needs to be calculated for your application */
+TOP_OF_MDDR 	= 0xA4000000;       /* Top address of the external MDDR memory. */
+
+/*******************************************************************************
+ * End of board customization.
+ *******************************************************************************/
+ 
+PROVIDE (__main_stack_start = ESRAM_START_ADDRESS + ESRAM_SIZE);
+PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
+PROVIDE (_estack = __main_stack_start);
+PROVIDE (__mirrored_nvm = 0);   /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
+
+/*
+ * 	Remap instruction for startup code and debugger.
+ *  set __smartfusion2_memory_remap to one of the following:
+ *  0: remap eNVM to address 0x00000000       			Production mode or debugging from eNVM   
+ *  1: remap eSRAM to address 0x00000000				Debugging from eSRAM
+ *  2: remap external DDR memory to address 0x00000000  Debugging from DDR memory
+ */
+PROVIDE (__smartfusion2_memory_remap = 2);
+
+SECTIONS
+{
+  .vector_table : ALIGN(0x10)
+  {
+    __vector_table_load = LOADADDR(.vector_table);
+    __vector_table_start = .;
+    __vector_table_vma_base_address = .;
+    KEEP(*(.isr_vector))
+    . = ALIGN(0x10);
+    _evector_table = .;
+  } >external_ram AT>rom
+  
+  /* all data and code run/used before reloaction must be located here */
+  .boot_code : ALIGN(0x10)
+  {
+    *(.boot_code)				        /* reset handler */
+    *system_m2sxxx.o(.text*) 	        /* SystemInit() - called before relocation to RAM so keep in ROM */
+    *sys_config.o(.rodata*)
+	*sys_config_SERDESIF_?.o(.rodata*)	/* data- used to configure external memeory before use */
+										/* note ? is a wildcard, can be upto 4 instances */
+    *mscc_post_hw_cfg_init.o			/* used on startup */	
+    *ecc_error_handler.o(.text*)		/* do we need this???? */
+    . = ALIGN(0x10);
+  } >rom
+  
+  .text : ALIGN(0x10)
+  {
+    CREATE_OBJECT_SYMBOLS
+    __text_load = LOADADDR(.text);
+    __text_start = .;
+    
+    *(.text .text.* .gnu.linkonce.t.*)
+    *(.plt)
+    *(.gnu.warning)
+    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+
+    . = ALIGN(0x4);
+    /* These are for running static constructors and destructors under ELF.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+
+    *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    *(.gcc_except_table) 
+    *(.eh_frame_hdr)
+    *(.eh_frame)
+
+    KEEP (*(.vector_table))
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(.fini_array))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(0x10);
+  } >external_ram AT>rom
+  /* .ARM.exidx is sorted, so has to go in its own output section.  */
+   __exidx_start = .;
+  .ARM.exidx :
+  {
+    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+  } >external_ram AT>rom
+  __exidx_end = .;
+  _etext = .;
+
+  .data : ALIGN(0x10)
+  {
+    __data_load = LOADADDR(.data);
+    _sidata = LOADADDR (.data);
+    __data_start = .;
+    _sdata = .;
+    KEEP(*(.jcr))
+    *(.got.plt) *(.got)
+    *(.shdata)
+    *(.data .data.* .gnu.linkonce.d.*)
+    . = ALIGN(0x10);
+    _edata = .;
+  } >data_external_ram AT>rom
+
+  .bss  : ALIGN(0x10)
+  {
+    __bss_start__ = . ;
+    _sbss = .;
+    *(.shbss)
+    *(.bss .bss.* .gnu.linkonce.b.*)
+    *(COMMON)
+    . = ALIGN(0x10);
+    __bss_end__ = .;
+    _end = .;
+    __end = _end;
+    _ebss = .;
+    PROVIDE(end = .);
+  } >data_external_ram AT>rom
+  
+  .heap : ALIGN(0x10)
+  {
+    __heap_start__ = .;
+	. += MIN_SIZE_HEAP;			/* will generate error if this minimum size not available */
+    . += (ABSOLUTE(TOP_OF_MDDR) - . );
+     _eheap = .;
+  } >data_external_ram
+
+  .stack  : ALIGN(0x10)
+  {
+    __stack_start__ = .;
+    . += MAIN_STACK_SIZE;
+    _estack = .;
+  } >esram
+  
+  .stab 0 (NOLOAD) :
+  {
+    *(.stab)
+  }
+
+  .stabstr 0 (NOLOAD) :
+  {
+    *(.stabstr)
+  }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
+  /DISCARD/ : { *(.note.GNU-stack)  }
+}

bsp/smartfusion2/CMSIS/startup_gcc/startup_m2sxxx.S

@@ -0,0 +1,1297 @@
+/*******************************************************************************
+ * (c) Copyright 2012-2015 Microsemi SoC Products Group.  All rights reserved.
+ * 
+ * @file startup_m2sxxx.S
+ * @author Microsemi SoC Products Group
+ * @brief SmartFusion2 vector table and startup code for CodeSourcery G++.
+ *
+ * SVN $Revision: 7424 $
+ * SVN $Date: 2015-05-19 21:16:09 +0530 (Tue, 19 May 2015) $
+ */
+
+    .syntax unified
+    .cpu cortex-m3
+    .thumb
+    
+/* #define  UNIT_TEST_FILL_MEMORY   only uncommented if carring out unit test */
+
+/*==============================================================================
+ * Vector table
+ */
+    .global     g_pfnVectors
+    .section    .isr_vector,"ax",%progbits    /* added "x" so appears in .lst file even though not executable code- to help in debug process */
+    .type       g_pfnVectors, %object
+    .size       g_pfnVectors, .-g_pfnVectors
+    
+g_pfnVectors:
+    .word  _estack
+    .word  Reset_Handler
+    .word  NMI_Handler
+    .word  HardFault_Handler
+    .word  MemManage_Handler
+    .word  BusFault_Handler
+    .word  UsageFault_Handler
+    .word  0
+    .word  0
+    .word  0
+    .word  0
+    .word  SVC_Handler
+    .word  DebugMon_Handler
+    .word  0
+    .word  PendSV_Handler
+    .word  SysTick_Handler
+    .word  WdogWakeup_IRQHandler
+    .word  RTC_Wakeup_IRQHandler
+    .word  SPI0_IRQHandler
+    .word  SPI1_IRQHandler
+    .word  I2C0_IRQHandler
+    .word  I2C0_SMBAlert_IRQHandler
+    .word  I2C0_SMBus_IRQHandler
+    .word  I2C1_IRQHandler
+    .word  I2C1_SMBAlert_IRQHandler
+    .word  I2C1_SMBus_IRQHandler
+    .word  UART0_IRQHandler
+    .word  UART1_IRQHandler
+    .word  EthernetMAC_IRQHandler
+    .word  DMA_IRQHandler
+    .word  Timer1_IRQHandler
+    .word  Timer2_IRQHandler
+    .word  CAN_IRQHandler
+    .word  ENVM0_IRQHandler
+    .word  ENVM1_IRQHandler
+    .word  ComBlk_IRQHandler
+    .word  USB_IRQHandler
+    .word  USB_DMA_IRQHandler
+    .word  PLL_Lock_IRQHandler
+    .word  PLL_LockLost_IRQHandler
+    .word  CommSwitchError_IRQHandler
+    .word  CacheError_IRQHandler
+    .word  DDR_IRQHandler
+    .word  HPDMA_Complete_IRQHandler
+    .word  HPDMA_Error_IRQHandler
+    .word  ECC_Error_IRQHandler
+    .word  MDDR_IOCalib_IRQHandler
+    .word  FAB_PLL_Lock_IRQHandler
+    .word  FAB_PLL_LockLost_IRQHandler
+    .word  FIC64_IRQHandler
+    .word  FabricIrq0_IRQHandler
+    .word  FabricIrq1_IRQHandler
+    .word  FabricIrq2_IRQHandler
+    .word  FabricIrq3_IRQHandler
+    .word  FabricIrq4_IRQHandler
+    .word  FabricIrq5_IRQHandler
+    .word  FabricIrq6_IRQHandler
+    .word  FabricIrq7_IRQHandler
+    .word  FabricIrq8_IRQHandler
+    .word  FabricIrq9_IRQHandler
+    .word  FabricIrq10_IRQHandler
+    .word  FabricIrq11_IRQHandler
+    .word  FabricIrq12_IRQHandler
+    .word  FabricIrq13_IRQHandler
+    .word  FabricIrq14_IRQHandler
+    .word  FabricIrq15_IRQHandler    
+    .word  GPIO0_IRQHandler
+    .word  GPIO1_IRQHandler
+    .word  GPIO2_IRQHandler
+    .word  GPIO3_IRQHandler
+    .word  GPIO4_IRQHandler
+    .word  GPIO5_IRQHandler
+    .word  GPIO6_IRQHandler
+    .word  GPIO7_IRQHandler
+    .word  GPIO8_IRQHandler
+    .word  GPIO9_IRQHandler
+    .word  GPIO10_IRQHandler
+    .word  GPIO11_IRQHandler
+    .word  GPIO12_IRQHandler
+    .word  GPIO13_IRQHandler
+    .word  GPIO14_IRQHandler
+    .word  GPIO15_IRQHandler
+    .word  GPIO16_IRQHandler
+    .word  GPIO17_IRQHandler
+    .word  GPIO18_IRQHandler
+    .word  GPIO19_IRQHandler
+    .word  GPIO20_IRQHandler
+    .word  GPIO21_IRQHandler
+    .word  GPIO22_IRQHandler
+    .word  GPIO23_IRQHandler
+    .word  GPIO24_IRQHandler
+    .word  GPIO25_IRQHandler
+    .word  GPIO26_IRQHandler
+    .word  GPIO27_IRQHandler
+    .word  GPIO28_IRQHandler
+    .word  GPIO29_IRQHandler
+    .word  GPIO30_IRQHandler
+    .word  GPIO31_IRQHandler
+    .word  0
+    .word  0
+    
+/*==============================================================================
+ * Reset_Handler
+ * Register r11 is used to keep track of whether we need to initialize RAMs
+ * because ECC/ SECDED is enabled.
+ */
+    .global Reset_Handler
+    .section    .boot_code,"ax",%progbits	         
+    .type   Reset_Handler, %function
+Reset_Handler:
+_start:
+/*------------------------------------------------------------------------------
+ * Initialize stack RAM content to initialize the error detection and correction
+ * (EDAC). This is done if EDAC is enabled for the eSRAM blocks or the
+ * ECC/SECDED is enabled for the MDDR.
+ * Register r11 is used to keep track of the RAM intialization decision outcome
+ * for later use for heap RAM initialization at the end of the startup code.
+ * Please note that the stack has to be located in eSRAM at this point and
+ * cannot be located in MDDR since MDDR is not available at this point.
+ * The bits of the content of register r11 have the following meaning:
+ *  reg11[0]: eSRAM EDAC enabled
+ *  reg11[1]: MDDR ECC/SECDED enabled
+ */
+    mov r11, #0
+    ldr r0, SF2_MDDR_MODE_CR
+    ldr r0, [r0]
+    ldr r1, SF2_EDAC_CR
+    ldr r1, [r1]
+    and r1, r1, #3
+    and r0, r0, #0x1C
+    cmp r0, #0x14
+    bne check_esram_edac
+    orr r11, r11, #2
+check_esram_edac:
+    cmp r1, #0
+    beq check_stack_init
+    orr r11, r11, #1
+check_stack_init:
+    cmp r11, #0
+    beq system_init
+clear_stack:
+    ldr r0, = __stack_start__
+    ldr r1, =_estack
+    ldr r2, RAM_INIT_PATTERN
+    bl fill_memory                      /* ; fill_memory takes r0 - r2 as arguments uses r4, r5, r6, r7, r8, r9, and does not preserve contents */
+    
+/*------------------------------------------------------------------------------
+ * Call CMSIS system init function.
+ */
+ system_init:
+    ldr r0, =SystemInit
+    blx r0
+
+/*------------------------------------------------------------------------------
+ * Modify MDDR configuration if ECC/SECDED is enabled for MDDR.
+ * Enable write combining on MDDR bridge, disable non-bufferable regions.
+ */
+    and r10, r11, 0x2
+    cmp r10, #0
+    beq remap_memory
+    ldr r0, SF2_DDRB_NB_SIZE
+    ldr r1, SF2_DDRB_CR
+    ldr r2, [r0]
+    ldr r3, [r1]
+    push {r0, r1, r2, r3}
+    mov r2, #0
+    mov r3, #0xFF
+    str r2, [r0]
+    str r3, [r1]
+    
+/*------------------------------------------------------------------------------
+ * Perform memory remapping based on the value of __smartfusion2_memory_remap
+ * set in the linker script.
+ */
+remap_memory:
+    ldr r0, =__smartfusion2_memory_remap
+    ldr r2, =0
+    ldr r3, =1
+    cmp r0, #2
+    bne check_esram_remap
+    /*
+     * Remap external RAM to address 0x00000000
+     */
+    ldr r1, SF2_ESRAM_CR
+    str r2, [r1]
+    ldr r1, SF2_ENVM_REMAP_CR
+    str r2, [r1]
+    ldr r1, SF2_DDR_CR
+    str r3, [r1]
+check_esram_remap:
+    cmp r0, #1
+    bne check_mirrored_nvm
+    /*
+     * Remap internal eSRAM to address 0x00000000
+     */
+    ldr r1, SF2_DDR_CR
+    str r2, [r1]
+    ldr r1, SF2_ENVM_REMAP_CR
+    str r2, [r1]
+    ldr r1, SF2_ESRAM_CR
+    str r3, [r1]
+    
+/*------------------------------------------------------------------------------
+ * Check if the executable is built for NVM LMA mirrored to VMA address.
+ * This is done for debugging executables running out of eNVM with SoftConsole.
+ * The .text section should not be copied in this case since both the LMA and
+ * VMA point at the eNVM despite the LMA and VMa having different values.
+ */
+ check_mirrored_nvm:
+    ldr r0, =__mirrored_nvm
+    cmp r0, #0
+    bne copy_data
+    
+/*------------------------------------------------------------------------------
+ * Copy vector table.
+ */
+    ldr r0, =__vector_table_load
+    ldr r1, =__vector_table_start
+    ldr r2, =_evector_table
+    bl block_copy
+    
+/*------------------------------------------------------------------------------
+ * Copy code section.
+ */
+copy_text:
+    ldr r0, =__text_load
+    ldr r1, =__text_start
+    ldr r2, =_etext
+    bl block_copy
+    
+/*------------------------------------------------------------------------------
+ * Copy data section.
+ */
+
+ copy_data:
+    ldr r0, =__data_load
+    ldr r1, =__data_start
+    ldr r2, =_edata
+    bl block_copy
+    
+/*------------------------------------------------------------------------------
+ *  Clear .bss
+ */
+clear_bss:                               
+    ldr r0, =__bss_start__
+    ldr r1, =__bss_end__
+    ldr r2, RAM_INIT_PATTERN
+    bl fill_memory                      /* ; fill_memory takes r0 - r2 as arguments uses r4, r5, r6, r7, r8, r9, and does not preserve contents */
+    
+#ifdef UNIT_TEST_FILL_MEMORY
+	bl unit_test_fill_memory
+#endif
+
+/*------------------------------------------------------------------------------
+ * Initialize heap RAM content to initialize the error detection and correction
+ * (EDAC). We use the decision made earlier in the startup code of whether or
+ * not the stack RAM should be initialized. This decision is held in register
+ * r11. A non-zero value indicates that the RAM content should be initialized.
+ */
+clear_heap:
+    cmp r11, #0
+    beq call_glob_ctor
+    ldr r0, =__heap_start__
+    ldr r1, =_eheap
+    ldr r2, HEAP_INIT_PATTERN
+	bl fill_memory                      /* ; fill_memory takes r0 - r2 as arguments uses r4, r5, r6, r7, r8, r9, and does not preserve contents */
+
+/*------------------------------------------------------------------------------
+ * Restore MDDR configuration.
+ */
+    and r10, r11, 0x2
+    cmp r10, #0
+    beq call_glob_ctor
+    pop {r0, r1, r2, r3}
+    str r2, [r0]
+    str r3, [r1]
+    
+/*------------------------------------------------------------------------------
+ * Call global constructors
+ */
+    /*
+     * Align to word and use 32-bits LDR instruction to ensure the ADD instruction
+     * taking PC as argument is aligned on a word boundary.
+     */
+    .align 4
+call_glob_ctor:
+    ldr.w r0, =__libc_init_array
+    add lr, pc, #3
+    bx r0
+    
+/*------------------------------------------------------------------------------
+ * branch to main.
+ */
+branch_to_main:
+    mov r0, #0      /*  ; no arguments  */
+    mov r1, #0      /*  ; no argv either */
+    ldr pc, =main
+
+ExitLoop:
+    B ExitLoop
+
+/*------------------------------------------------------------------------------
+ * block copy.
+ *
+ * r0: source address
+ * r1: target address
+ * r2: end target address 
+ *
+ * note: Most efficient if memory aligned. Linker ALIGN(16) command
+ * should be used as per example linker scripts.
+ * Note 1: If the memory address in r0 or r1, byte copy routine is used
+ * Note 2: If r1 < r2, will loop indefinetley to highlight linker issue.
+ */
+block_copy:
+    push {r3, r4, r5, r6, r7, r8, lr}
+    cmp r0, r1
+    beq block_copy_exit          /* ; Exit early if source and destination the same */
+    subs.w r2, r2, r1            /* ; Calculate number of bytes to move */
+    bpl  block_copy_address_ok	 /* ; check (end target address) > (target address) => continue */
+    b .							 /* ; halt as critical error-  memory map not OK- make it easy to catch in debugger */
+block_copy_address_ok:
+    /* ; detect if source or target memory addresses unaligned. If so use byte copy routine */
+    orr.w r3, r0, r1
+    ands.w r3, r3, #3
+    beq  block_copy_continue
+block_copy_byte_copy:
+    bl block_copy_byte
+    b  block_copy_exit
+block_copy_continue:
+	mov  r3, #0
+	mov  r8,r2                   /* ; Save copy of byte count */
+    asrs r2,r2, #4               /* ; Div by 16 to get number of chunks to move */
+    beq block_copy_byte_copy	 /* ; need to use byte copy if less than 16 bytes */
+block_copy_loop:
+    cmp r2, r3
+    itt ne
+    ldmne r0!, {r4, r5, r6, r7}
+    stmne r1!, {r4, r5, r6, r7}
+    add.w r3, r3, #1			/* ; use Thumb2- make sure condition code reg. not updated */
+    bne block_copy_loop
+	/* ; copy spare bytes at the end if any */
+    and r8, #15					/* ; get spare bytes  --check can you do an ands? 	*/
+	cmp r8, #0					/* ; no spare bytes at end- end now 	*/
+	beq block_copy_exit
+copy_spare_bytes:               /* ; From above, R0 contains source address, R1 contains destination address */
+	ldrb r4, [r0]
+    strb r4, [r1]
+    add  r0, #1
+    add  r1, #1
+  	subs r8, r8, #1
+    bne copy_spare_bytes
+block_copy_exit:
+    pop {r3, r4, r5, r6, r7, r8, pc}
+
+/*
+ * block_copy_byte: used if memory not aligned
+ * r0: source address
+ * r1: target address
+ * r2: number of bytes
+*/
+block_copy_byte:
+    push {r3, lr}
+	mov  r3, #0
+block_copy_byte_loop:            /* ; From above, R0 contains source address, R1 contains destination address */
+	ldrb r3, [r0]
+    strb r3, [r1]
+    add  r0, #1
+    add  r1, #1
+  	subs r2, r2, #1
+    bne block_copy_byte_loop
+    pop {r3, pc}
+
+/*;------------------------------------------------------------------------------
+; * fill_memory.
+; * @brief Fills memory with Pattern contained in r2
+; * This routine uses the stmne instruction to copy 4 words at a time which is very efficient
+; * The instruction can only write to word aligned memory, hence the code at the start and end of this routine
+; * to handle possible unaligned bytes at start and end.
+; *
+; * @param param1 r0: start address
+; * @param param2 r1: end address
+; * @param param3 r2: FILL PATTETN
+; *
+; * @note note: Most efficient if memory aligned. Linker ALIGN(4) command
+; * should be used as per example linker scripts
+; * Stack is not used in this routine
+; * register contents r4, r5, r6, r7, r8, r9, will are used and will be returned undefined 
+; * @return none - Used Registers are not preserved
+; */
+
+fill_memory:
+    /* ;push {r4, r5, r6, r7, r8, r9, lr}	 We will not use stack as may be not available */
+    cmp r0, r1
+    beq fill_memory_exit        /* ; Exit early if source and destination the same */
+/* ; copy non-aligned bytes at the start */
+    and.w  r6, r0, #3			/* ; see if non-alaigned bytes at the start 	*/
+    cmp r6, #0
+    beq fill_memory_end_start   /* ; no spare bytes at start, continue 	*/
+    mov    r5, #4
+    sub.w  r4, r5, r6			/* ; now have number of non-aligned bytes in r4 */
+    mov  r7, #8
+    mul  r8, r7, r6				/* ; calculate number of shifts required to initalise pattern for non-aligned bytes */
+    mov  r9, r2					/* ; copy pattern */
+    ror  r9, r9, r8             	/* ; Rotate right to keep pattern consistent */
+fill_memory_spare_bytes_start:  /* ; From above, R0 contains source address, R1 contains destination address */
+    cmp r4, #0					/* ; no spare bytes at end- end now 	*/
+    beq fill_memory_end_start
+    strb r9, [r0]				/* ; fill byte */
+    ror.w  r9, r9, r7             	/* ; Rotate right by one byte for the next time, to keep pattern consistent */
+    add r0, r0, #1				/* ; add one to address */
+    subs r4, r4, #1				/* ; subtract one from byte count 1	*/
+    b fill_memory_spare_bytes_start
+fill_memory_end_start:
+    mov  r6, #0
+    mov  r7, r1					 /* ; save end address */
+    subs r1, r1, r0              /* ; Calculate number of bytes to fill */
+    mov  r8,r1                   /* ; Save copy of byte count */
+    asrs r1,r1, #4               /* ; Div by 16 to get number of chunks to move */
+    mov  r9, r2					 /* ; copy pattern */
+    mov  r4, r2					 /* ; copy pattern */
+    mov  r5, r2					 /* ; copy pattern */
+    cmp r1, r6					 /* ; compare to see if all chunks copied */
+    beq fill_memory_spare_bytes_end
+fill_memory_loop:
+    it ne
+    stmne r0!, {r2, r4, r5, r9}  /* ; copy pattern- note: stmne instruction must me word aligned (address in r0) */
+    add.w r6, r6, #1			 /* ; use Thumb2- make sure condition code reg. not updated */
+    cmp r1, r6					 /* ; compare to see if all chunks copied */
+    bne fill_memory_loop
+fill_memory_spare_bytes_end:	 /* ; copy spare bytes at the end if any */
+    and.w r8, r8, #15					 /* ; get spare bytes  --check can you do an ands? 	*/
+fill_memory_spare_end_loop:      /* ; From above, R0 contains source address, R1 contains destination address */
+    cmp r8, #0					 /* ; no spare bytes at end- end now 	*/
+    beq fill_memory_exit
+    strb r2, [r0]
+    ror.w  r2, r2, #8             	 /* ; Rotate right by one byte for the next time, to keep pattern consistent */
+    add r0, r0, #1				 /* ; add one to address */
+    subs r8, r8, #1				 /* ; subtract one from byte count 1	*/
+    b fill_memory_spare_end_loop
+fill_memory_exit:
+    bx lr				/*; We will not use pop as stack may be not available */
+    
+
+/*------------------------------------------------------------------------------
+ * unit_test_fill_memory
+ * calls fills_memory function with various paramaters
+ *
+ * r0: start address
+ * r1: end address
+ * r2: FILL PATTETN
+ *
+ * Debugger used to check filled memeory is as expected.
+ * Note: Last instruction in this routine deliberatly halts code to prevent accidentle enabeling in
+ * release code.
+ */
+#ifdef UNIT_TEST_FILL_MEMORY
+    MEM_TEST_PATTERN:      .word   0x12345678
+unit_test_fill_memory:
+	push {r0, r1, r2, lr}
+ 	ldr r0, = 0x20000100
+    ldr r1, = 0x20000200
+    ldr r2, MEM_TEST_PATTERN
+ 	bl fill_memory                      /* ; fill_memory takes r0 - r2 as arguments */
+  	ldr r0, = 0x20000300				/* ; source address */
+    ldr r1, = 0x20000400				/* ; dest address */
+    ldr r2, = 0x200004FF			    /* ; end address */
+	bl block_copy						/* ; copy above */
+	/* second test */
+ 	ldr r0, = 0x20003300
+    ldr r1, = 0x20003403
+    ldr r2, MEM_TEST_PATTERN
+ 	bl fill_memory
+ 	ldr r0, = 0x20003300
+    ldr r1, = 0x20003500
+    ldr r2, = 0x20003603
+	bl block_copy
+	/* third test */
+ 	ldr r0, = 0x20000702
+    ldr r1, = 0x20000803
+    ldr r2, MEM_TEST_PATTERN
+ 	bl fill_memory                      /* ; fill_memory takes r0 - r2 as arguments */
+ 	ldr r0, = 0x20000702
+    ldr r1, = 0x20000902
+    ldr r2, = 0x20000A03
+	bl block_copy
+	/* fourth test */
+    ldr r0, = 0x20000B01
+    ldr r1, = 0x20000C03
+    ldr r2, MEM_TEST_PATTERN
+ 	bl fill_memory                      /* ; fill_memory takes r0 - r2 as arguments */
+ 	ldr r0, = 0x20000B01
+    ldr r1, = 0x20000D01
+    ldr r2, = 0x20000E03
+	bl block_copy
+	/* fith test */
+ 	ldr r0, = 0x20002D01
+    ldr r1, = 0x20002E01
+    ldr r2, MEM_TEST_PATTERN
+ 	bl fill_memory                      /* ; fill_memory takes r0 - r2 as arguments */
+ 	ldr r0, = 0x20002D01
+    ldr r1, = 0x20002F01
+    ldr r2, = 0x20003001
+	bl block_copy
+	/* sixth test */
+ 	ldr r0, = 0x20001903
+    ldr r1, = 0x20001904
+    ldr r2, MEM_TEST_PATTERN
+ 	bl fill_memory                      /* ; fill_memory takes r0 - r2 as arguments */
+ 	ldr r0, = 0x20001903
+    ldr r1, = 0x20001A03
+    ldr r2, = 0x20001A04
+	bl block_copy
+	/* ; final test, note: This one will cause a halt in copy function- as designed */
+	ldr r0, = 0x20001903
+    ldr r1, = 0x20001A03
+    ldr r2, = 0x20000A04				/* ; end address < start address */
+	bl block_copy
+ unit_test_fill_memory_debug:			/* ; delibrately wait here, this function only to be used when carrying out test */
+ 	b .									/* ; stop debugger here and verify memory as expected in debugger */
+ 	pop {r0, r1, r2, pc}
+#endif
+/*==============================================================================
+ * NMI_Handler
+ */
+    .weak   NMI_Handler
+    .type   NMI_Handler, %function
+NMI_Handler:
+    B .
+
+/*==============================================================================
+ * HardFault_Handler
+ */
+    .weak   HardFault_Handler
+    .type   HardFault_Handler, %function
+HardFault_Handler:
+    B .
+
+/*==============================================================================
+ * MemManage_Handler
+ */
+    .weak   MemManage_Handler
+    .type   MemManage_Handler, %function
+MemManage_Handler:
+    B .
+
+/*==============================================================================
+ * BusFault_Handler
+ */
+    .weak   BusFault_Handler
+    .type   BusFault_Handler, %function
+BusFault_Handler:
+    B .
+
+/*==============================================================================
+ * UsageFault_Handler
+ */
+    .weak   UsageFault_Handler
+    .type   UsageFault_Handler, %function
+UsageFault_Handler:
+    B .
+
+/*==============================================================================
+ * SVC_Handler
+ */
+    .weak   SVC_Handler
+    .type   SVC_Handler, %function
+SVC_Handler:
+    B .
+
+/*==============================================================================
+ * DebugMon_Handler
+ */
+    .weak   DebugMon_Handler
+    .type   DebugMon_Handler, %function
+DebugMon_Handler:
+    B .
+
+/*==============================================================================
+ * PendSV_Handler
+ */
+    .weak   PendSV_Handler
+    .type   PendSV_Handler, %function
+PendSV_Handler:
+    B .
+
+/*==============================================================================
+ * SysTick_Handler
+ */
+    .weak   SysTick_Handler
+    .type   SysTick_Handler, %function
+SysTick_Handler:
+    B .
+
+/*==============================================================================
+ * WdogWakeup_IRQHandler
+ */
+    .weak   WdogWakeup_IRQHandler
+    .type   WdogWakeup_IRQHandler, %function
+WdogWakeup_IRQHandler:
+    B .
+
+/*==============================================================================
+ * RTC_Wakeup_IRQHandler
+ */
+    .weak   RTC_Wakeup_IRQHandler
+    .type   RTC_Wakeup_IRQHandler, %function
+RTC_Wakeup_IRQHandler:
+    B .
+
+/*==============================================================================
+ * SPI0_IRQHandler
+ */
+    .weak   SPI0_IRQHandler
+    .type   SPI0_IRQHandler, %function
+SPI0_IRQHandler:
+    B .
+
+/*==============================================================================
+ * SPI1_IRQHandler
+ */
+    .weak   SPI1_IRQHandler
+    .type   SPI1_IRQHandler, %function
+SPI1_IRQHandler:
+    B .
+
+/*==============================================================================
+ * I2C0_IRQHandler
+ */
+    .weak   I2C0_IRQHandler
+    .type   I2C0_IRQHandler, %function
+I2C0_IRQHandler:
+    B .
+
+/*==============================================================================
+ * I2C0_SMBAlert_IRQHandler
+ */
+    .weak   I2C0_SMBAlert_IRQHandler
+    .type   I2C0_SMBAlert_IRQHandler, %function
+I2C0_SMBAlert_IRQHandler:
+    B .
+
+/*==============================================================================
+ * I2C0_SMBus_IRQHandler
+ */
+    .weak   I2C0_SMBus_IRQHandler
+    .type   I2C0_SMBus_IRQHandler, %function
+I2C0_SMBus_IRQHandler:
+    B .
+
+/*==============================================================================
+ * I2C1_IRQHandler
+ */
+    .weak   I2C1_IRQHandler
+    .type   I2C1_IRQHandler, %function
+I2C1_IRQHandler:
+    B .
+
+/*==============================================================================
+ * I2C1_SMBAlert_IRQHandler
+ */
+    .weak   I2C1_SMBAlert_IRQHandler
+    .type   I2C1_SMBAlert_IRQHandler, %function
+I2C1_SMBAlert_IRQHandler:
+    B .
+
+/*==============================================================================
+ * I2C1_SMBus_IRQHandler
+ */
+    .weak   I2C1_SMBus_IRQHandler
+    .type   I2C1_SMBus_IRQHandler, %function
+I2C1_SMBus_IRQHandler:
+    B .
+
+/*==============================================================================
+ * UART0_IRQHandler
+ */
+    .weak   UART0_IRQHandler
+    .type   UART0_IRQHandler, %function
+UART0_IRQHandler:
+    B .
+
+/*==============================================================================
+ * UART1_IRQHandler
+ */
+    .weak   UART1_IRQHandler
+    .type   UART1_IRQHandler, %function
+UART1_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * EthernetMAC_IRQHandler
+ */
+    .weak   EthernetMAC_IRQHandler
+    .type   EthernetMAC_IRQHandler, %function
+EthernetMAC_IRQHandler:
+    B .
+
+/*==============================================================================
+ * DMA_IRQHandler
+ */
+    .weak   DMA_IRQHandler
+    .type   DMA_IRQHandler, %function
+DMA_IRQHandler:
+    B .
+
+/*==============================================================================
+ * Timer1_IRQHandler
+ */
+    .weak   Timer1_IRQHandler
+    .type   Timer1_IRQHandler, %function
+Timer1_IRQHandler:
+    B .
+
+/*==============================================================================
+ * Timer2_IRQHandler
+ */
+    .weak   Timer2_IRQHandler
+    .type   Timer2_IRQHandler, %function
+Timer2_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * CAN_IRQHandler
+ */
+    .weak   CAN_IRQHandler
+    .type   CAN_IRQHandler, %function
+CAN_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * ENVM0_IRQHandler
+ */
+    .weak   ENVM0_IRQHandler
+    .type   ENVM0_IRQHandler, %function
+ENVM0_IRQHandler:
+    B .
+
+/*==============================================================================
+ * ENVM1_IRQHandler
+ */
+    .weak   ENVM1_IRQHandler
+    .type   ENVM1_IRQHandler, %function
+ENVM1_IRQHandler:
+    B .
+
+/*==============================================================================
+ * ComBlk_IRQHandler
+ */
+    .weak   ComBlk_IRQHandler
+    .type   ComBlk_IRQHandler, %function
+ComBlk_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * USB_IRQHandler
+ */
+    .weak   USB_IRQHandler
+    .type   USB_IRQHandler, %function
+USB_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * USB_DMA_IRQHandler
+ */
+    .weak   USB_DMA_IRQHandler
+    .type   USB_DMA_IRQHandler, %function
+USB_DMA_IRQHandler:
+    B .
+
+/*==============================================================================
+ * PLL_Lock_IRQHandler
+ */
+    .weak   PLL_Lock_IRQHandler
+    .type   PLL_Lock_IRQHandler, %function
+PLL_Lock_IRQHandler:
+    B .
+
+/*==============================================================================
+ * PLL_LockLost_IRQHandler
+ */
+    .weak   PLL_LockLost_IRQHandler
+    .type   PLL_LockLost_IRQHandler, %function
+PLL_LockLost_IRQHandler:
+    B .
+
+/*==============================================================================
+ * CommSwitchError_IRQHandler
+ */
+    .weak   CommSwitchError_IRQHandler
+    .type   CommSwitchError_IRQHandler, %function
+CommSwitchError_IRQHandler:
+    B .
+
+/*==============================================================================
+ * CacheError_IRQHandler
+ */
+    .weak   CacheError_IRQHandler
+    .type   CacheError_IRQHandler, %function
+CacheError_IRQHandler:
+    B .
+
+/*==============================================================================
+ * DDR_IRQHandler
+ */
+    .weak   DDR_IRQHandler
+    .type   DDR_IRQHandler, %function
+DDR_IRQHandler:
+    B .
+
+/*==============================================================================
+ * HPDMA_Complete_IRQHandler
+ */
+    .weak   HPDMA_Complete_IRQHandler
+    .type   HPDMA_Complete_IRQHandler, %function
+HPDMA_Complete_IRQHandler:
+    B .
+
+/*==============================================================================
+ * HPDMA_Error_IRQHandler
+ */
+    .weak   HPDMA_Error_IRQHandler
+    .type   HPDMA_Error_IRQHandler, %function
+HPDMA_Error_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * ECC_Error_IRQHandler
+ */
+    .weak   ECC_Error_IRQHandler
+    .type   ECC_Error_IRQHandler, %function
+ECC_Error_IRQHandler:
+    B .
+
+/*==============================================================================
+ * MDDR_IOCalib_IRQHandler
+ */
+    .weak   MDDR_IOCalib_IRQHandler
+    .type   MDDR_IOCalib_IRQHandler, %function
+MDDR_IOCalib_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FAB_PLL_Lock_IRQHandler
+ */
+    .weak   FAB_PLL_Lock_IRQHandler
+    .type   FAB_PLL_Lock_IRQHandler, %function    
+FAB_PLL_Lock_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FAB_PLL_LockLost_IRQHandler
+ */
+    .weak   FAB_PLL_LockLost_IRQHandler
+    .type   FAB_PLL_LockLost_IRQHandler, %function        
+FAB_PLL_LockLost_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * FIC64_IRQHandler
+ */
+    .weak   FIC64_IRQHandler
+    .type   FIC64_IRQHandler, %function            
+FIC64_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * FabricIrq0_IRQHandler
+ */
+    .weak   FabricIrq0_IRQHandler
+    .type   FabricIrq0_IRQHandler, %function
+FabricIrq0_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq1_IRQHandler
+ */
+    .weak   FabricIrq1_IRQHandler
+    .type   FabricIrq1_IRQHandler, %function
+FabricIrq1_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq2_IRQHandler
+ */
+    .weak   FabricIrq2_IRQHandler
+    .type   FabricIrq2_IRQHandler, %function
+FabricIrq2_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq3_IRQHandler
+ */
+    .weak   FabricIrq3_IRQHandler
+    .type   FabricIrq3_IRQHandler, %function
+FabricIrq3_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq4_IRQHandler
+ */
+    .weak   FabricIrq4_IRQHandler
+    .type   FabricIrq4_IRQHandler, %function
+FabricIrq4_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq5_IRQHandler
+ */
+    .weak   FabricIrq5_IRQHandler
+    .type   FabricIrq5_IRQHandler, %function
+FabricIrq5_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq6_IRQHandler
+ */
+    .weak   FabricIrq6_IRQHandler
+    .type   FabricIrq6_IRQHandler, %function
+FabricIrq6_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq7_IRQHandler
+ */
+    .weak   FabricIrq7_IRQHandler
+    .type   FabricIrq7_IRQHandler, %function
+FabricIrq7_IRQHandler:
+    B .
+    
+/*==============================================================================
+ * FabricIrq8_IRQHandler
+ */
+    .weak   FabricIrq8_IRQHandler
+    .type   FabricIrq8_IRQHandler, %function
+FabricIrq8_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq9_IRQHandler
+ */
+    .weak   FabricIrq9_IRQHandler
+    .type   FabricIrq9_IRQHandler, %function
+FabricIrq9_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq10_IRQHandler
+ */
+    .weak   FabricIrq10_IRQHandler
+    .type   FabricIrq10_IRQHandler, %function
+FabricIrq10_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq11_IRQHandler
+ */
+    .weak   FabricIrq11_IRQHandler
+    .type   FabricIrq11_IRQHandler, %function
+FabricIrq11_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq12_IRQHandler
+ */
+    .weak   FabricIrq12_IRQHandler
+    .type   FabricIrq12_IRQHandler, %function
+FabricIrq12_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq13_IRQHandler
+ */
+    .weak   FabricIrq13_IRQHandler
+    .type   FabricIrq13_IRQHandler, %function
+FabricIrq13_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq14_IRQHandler
+ */
+    .weak   FabricIrq14_IRQHandler
+    .type   FabricIrq14_IRQHandler, %function
+FabricIrq14_IRQHandler:
+    B .
+
+/*==============================================================================
+ * FabricIrq15_IRQHandler
+ */
+    .weak   FabricIrq15_IRQHandler
+    .type   FabricIrq15_IRQHandler, %function
+FabricIrq15_IRQHandler:
+    B .    
+
+/*==============================================================================
+ * GPIO0_IRQHandler
+ */
+    .weak   GPIO0_IRQHandler
+    .type   GPIO0_IRQHandler, %function
+GPIO0_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO1_IRQHandler
+ */
+    .weak   GPIO1_IRQHandler
+    .type   GPIO1_IRQHandler, %function
+GPIO1_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO2_IRQHandler
+ */
+    .weak   GPIO2_IRQHandler
+    .type   GPIO2_IRQHandler, %function
+GPIO2_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO3_IRQHandler
+ */
+    .weak   GPIO3_IRQHandler
+    .type   GPIO3_IRQHandler, %function
+GPIO3_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO4_IRQHandler
+ */
+    .weak   GPIO4_IRQHandler
+    .type   GPIO4_IRQHandler, %function
+GPIO4_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO5_IRQHandler
+ */
+    .weak   GPIO5_IRQHandler
+    .type   GPIO5_IRQHandler, %function
+GPIO5_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO6_IRQHandler
+ */
+    .weak   GPIO6_IRQHandler
+    .type   GPIO6_IRQHandler, %function
+GPIO6_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO7_IRQHandler
+ */
+    .weak   GPIO7_IRQHandler
+    .type   GPIO7_IRQHandler, %function
+GPIO7_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO8_IRQHandler
+ */
+    .weak   GPIO8_IRQHandler
+    .type   GPIO8_IRQHandler, %function
+GPIO8_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO9_IRQHandler
+ */
+    .weak   GPIO9_IRQHandler
+    .type   GPIO9_IRQHandler, %function
+GPIO9_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO10_IRQHandler
+ */
+    .weak   GPIO10_IRQHandler
+    .type   GPIO10_IRQHandler, %function
+GPIO10_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO11_IRQHandler
+ */
+    .weak   GPIO11_IRQHandler
+    .type   GPIO11_IRQHandler, %function
+GPIO11_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO12_IRQHandler
+ */
+    .weak   GPIO12_IRQHandler
+    .type   GPIO12_IRQHandler, %function
+GPIO12_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO13_IRQHandler
+ */
+    .weak   GPIO13_IRQHandler
+    .type   GPIO13_IRQHandler, %function
+GPIO13_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO14_IRQHandler
+ */
+    .weak   GPIO14_IRQHandler
+    .type   GPIO14_IRQHandler, %function
+GPIO14_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO15_IRQHandler
+ */
+    .weak   GPIO15_IRQHandler
+    .type   GPIO15_IRQHandler, %function
+GPIO15_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO16_IRQHandler
+ */
+    .weak   GPIO16_IRQHandler
+    .type   GPIO16_IRQHandler, %function
+GPIO16_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO17_IRQHandler
+ */
+    .weak   GPIO17_IRQHandler
+    .type   GPIO17_IRQHandler, %function
+GPIO17_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO18_IRQHandler
+ */
+    .weak   GPIO18_IRQHandler
+    .type   GPIO18_IRQHandler, %function
+GPIO18_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO19_IRQHandler
+ */
+    .weak   GPIO19_IRQHandler
+    .type   GPIO19_IRQHandler, %function
+GPIO19_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO20_IRQHandler
+ */
+    .weak   GPIO20_IRQHandler
+    .type   GPIO20_IRQHandler, %function
+GPIO20_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO21_IRQHandler
+ */
+    .weak   GPIO21_IRQHandler
+    .type   GPIO21_IRQHandler, %function
+GPIO21_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO22_IRQHandler
+ */
+    .weak   GPIO22_IRQHandler
+    .type   GPIO22_IRQHandler, %function
+GPIO22_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO23_IRQHandler
+ */
+    .weak   GPIO23_IRQHandler
+    .type   GPIO23_IRQHandler, %function
+GPIO23_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO24_IRQHandler
+ */
+    .weak   GPIO24_IRQHandler
+    .type   GPIO24_IRQHandler, %function
+GPIO24_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO25_IRQHandler
+ */
+    .weak   GPIO25_IRQHandler
+    .type   GPIO25_IRQHandler, %function
+GPIO25_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO26_IRQHandler
+ */
+    .weak   GPIO26_IRQHandler
+    .type   GPIO26_IRQHandler, %function
+GPIO26_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO27_IRQHandler
+ */
+    .weak   GPIO27_IRQHandler
+    .type   GPIO27_IRQHandler, %function
+GPIO27_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO28_IRQHandler
+ */
+    .weak   GPIO28_IRQHandler
+    .type   GPIO28_IRQHandler, %function
+GPIO28_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO29_IRQHandler
+ */
+    .weak   GPIO29_IRQHandler
+    .type   GPIO29_IRQHandler, %function
+GPIO29_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO30_IRQHandler
+ */
+    .weak   GPIO30_IRQHandler
+    .type   GPIO30_IRQHandler, %function
+GPIO30_IRQHandler:
+    B .
+
+/*==============================================================================
+ * GPIO31_IRQHandler
+ */
+    .weak   GPIO31_IRQHandler
+    .type   GPIO31_IRQHandler, %function
+GPIO31_IRQHandler:
+    B .
+
+/*==============================================================================
+ * mscc_post_hw_cfg_init
+ */
+    .weak   mscc_post_hw_cfg_init
+    .type   mscc_post_hw_cfg_init, %function
+mscc_post_hw_cfg_init:
+    BX LR
+
+/*==============================================================================
+ * Constants:
+ */
+RAM_INIT_PATTERN:       .word   0x00000000
+HEAP_INIT_PATTERN:      .word   0xA2A2A2A2
+SF2_ESRAM_CR:           .word   0x40038000
+SF2_DDR_CR:             .word   0x40038008
+SF2_ENVM_REMAP_CR:      .word   0x40038010
+SF2_DDRB_NB_SIZE:       .word   0x40038030
+SF2_DDRB_CR:            .word   0x40038034
+SF2_EDAC_CR:            .word   0x40038038
+SF2_MDDR_MODE_CR:       .word   0x40020818
+ 
+.end

bsp/smartfusion2/CMSIS/system_m2sxxx.c

@@ -10,7 +10,7 @@
 #if MSCC_NO_RELATIVE_PATHS
 #include "sys_config.h"
 #else
-#include "../drivers_config/sys_config/sys_config.h"
+#include "sys_config.h"
 #endif
 #include "sys_init_cfg_types.h"
 /*------------------------------------------------------------------------------

bsp/smartfusion2/EventRecorderStub.scvd

@@ -1,9 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-
-<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
-
-<component name="EventRecorderStub" version="1.0.0"/>       <!--name and version of the component-->
-  <events>
-  </events>
-
-</component_viewer>

bsp/smartfusion2/JLinkSettings.ini

@@ -1,39 +0,0 @@
-[BREAKPOINTS]
-ForceImpTypeAny = 0
-ShowInfoWin = 1
-EnableFlashBP = 2
-BPDuringExecution = 0
-[CFI]
-CFISize = 0x00
-CFIAddr = 0x00
-[CPU]
-MonModeVTableAddr = 0xFFFFFFFF
-MonModeDebug = 0
-MaxNumAPs = 0
-LowPowerHandlingMode = 0
-OverrideMemMap = 0
-AllowSimulation = 1
-ScriptFile=""
-[FLASH]
-CacheExcludeSize = 0x00
-CacheExcludeAddr = 0x00
-MinNumBytesFlashDL = 0
-SkipProgOnCRCMatch = 1
-VerifyDownload = 1
-AllowCaching = 1
-EnableFlashDL = 2
-Override = 0
-Device="ARM7"
-[GENERAL]
-WorkRAMSize = 0x00
-WorkRAMAddr = 0x00
-RAMUsageLimit = 0x00
-[SWO]
-SWOLogFile=""
-[MEM]
-RdOverrideOrMask = 0x00
-RdOverrideAndMask = 0xFFFFFFFF
-RdOverrideAddr = 0xFFFFFFFF
-WrOverrideOrMask = 0x00
-WrOverrideAndMask = 0xFFFFFFFF
-WrOverrideAddr = 0xFFFFFFFF

bsp/smartfusion2/Kconfig

@@ -0,0 +1,26 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "drivers/Kconfig"
+
+config SOC_SF2_M2S010
+    bool 
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y

bsp/smartfusion2/README.md

@@ -14,29 +14,40 @@ SmartFusion2 内部框图
 
 移植了 RT-Thread 内核，支持线程调度、线程间同步和通信等，目前已经完成了PIN、Serial设备驱动，FinSH组件默认使用uart0设备。
 
-| **片上外设**      | **支持情况** | **备注**                              |
-| :----------------- | :----------: | :------------------------------------- |
-| GPIO              |     支持     | GPIO_0/1输出，GPIO_2/3输入 |
-| UART              |     支持     | MMUART0 & MMUART1|
-| SPI               |   暂不支持    |  |
-| I2C               |   暂不支持    |  |
-| RTC               |   暂不支持   |  |
-| PWM               |   暂不支持   |  |
-| USB        |   暂不支持   |  |
+| **片上外设**      | **支持情况** |
+| :----------------- | :----------: |
+| GPIO              |     支持     |
+| UART              |     支持     |
+| SPI               |   暂不支持    |
+| I2C               |   暂不支持    |
+| RTC               |   暂不支持   |
+| USB        |   暂不支持   |
 
-### 3. 使用说明
+### 3. scons构建系统
 
-#### 3.1 FPGA 工程设计 
+通过加入`rtconfig.py`，`SConstruct`，`SConscript`文件，可支持scons构建系统，可以输入`scons`调用env工具中包含的arm-gcc编译器构建工程，支持以下scons命令：
+
+- `scons`：使用arm-gcc编译BSP
+- `scons -c`：清除执行 scons 时生成的临时文件和目标文件。
+- `scons --target=mdk4`：重新生成Keil MDK4环境下的工程。
+- `scons --target=mdk5`：重新生成Keil MDK5环境下的工程。
+- `scons --dist`：打包BSP工程，包括RT-Thread源码及BSP相关工程文件。
+
+添加Kconfig文件，用于生成rtconfig.h。
+
+### 4. 使用说明
+
+#### 4.1 FPGA 工程设计 
 
 FPGA 部分使用 SmartDesign 图形化设计，不需要写 HDL 代码，时钟来自外部 50M 晶体输入，PLL 倍频 100M 提供给 MCU 使用，顶层配置如下图所示：
 
 ![](figures/top_sd.jpg)
 
-MSS 部分仅使用到了GPIO 和UART，GPIO_0和GPIO_1配置成输出输出模式用于驱动LED，GPIO_2和GPIO_3配置成输入模式，用于读取按键输入。
+MSS 部分仅使用到了GPIO 和UART，GPIO_0配置成输出输出模式用于驱动LED。
 
 配置完成的 FPGA 工程文件下载：[sf2_fpga_prj.rar](https://wcc-blog.oss-cn-beijing.aliyuncs.com/Libero/RT-Thread/sf2_fpga_prj.rar)
 
-#### 3.2 ARM 程序设计
+#### 4.2 ARM 程序设计
 
 ARM 程序使用 Keil MDK 5.26 开发，需要安装 M2S 系列芯片支持包：[Microsemi.M2Sxxx.1.0.64.pack](http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.1.0.64.pack)
 
@@ -46,7 +57,7 @@ ARM 程序使用 Keil MDK 5.26 开发，需要安装 M2S 系列芯片支持包
 
 ![](figures/files.jpg)
 
-### 4. 下载和运行
+### 5. 下载和运行
 
 为了能使用 ARM 调试器连接到 ARM 内核，而不是 FPGA，需要把 JTAG_SEL 引脚置为低电平。使用 ARM 调试器，如 JLink，对应连接 JTAG 口的 TMS、TCK、GND 引脚，如果连接正常，可以检测到 ARM 芯片，如下图所示：
 
@@ -72,7 +83,7 @@ msh >
 
 ![](figures/log.jpg)
 
-### 5. 注意事项
+### 6. 注意事项
 
 - FPGA 开发环境基于 Libero V11.8.2.4，向上兼容，不支持低版本 IDE。
 - ARM 开发环境基于 Keil MDK 5.26，如果使用SoftConsole IDE ，需要修改 `libcpu` 内的文件。
@@ -80,12 +91,12 @@ msh >
 - 使用 SoftConsole 开发环境可以直接使用官方的 Flash Pro 调试器进行 ARM 程序的调试。
 - 内核时钟需要和 FPGA 中 MSS 配置的对应，Libero 自动生成的时钟文件，可以直接替换`bsp\smartfusion2\libraries\sys_config`文件夹下的文件 。
 
-### 6. 参考资料
+### 7. 参考资料
 
 - [学习路线 - RT-Thread 文档中心](https://www.rt-thread.org/document/site/)
 - [Microsemi Libero系列中文教程](https://blog.csdn.net/whik1194/article/details/102901710)
 
-### 7. 联系我
+### 8. 联系我
 
 - Github：[whik](https://github.com/whik)
 - E-Mail：wangchao149@foxmail.com

bsp/smartfusion2/SConscript

@@ -0,0 +1,15 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/smartfusion2/SConstruct

@@ -0,0 +1,35 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/smartfusion2/applications/SConscript

@@ -0,0 +1,10 @@
+from building import *
+import rtconfig
+
+cwd     = GetCurrentDir()
+CPPPATH = [cwd]
+src	= Glob('*.c')
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/smartfusion2/applications/link.sct

@@ -0,0 +1,16 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x00000000 0x00040000  {    ; load region size_region
+  ER_IROM1 0x00000000 0x00040000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+  RW_IRAM1 0x20000000 0x00010000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+

bsp/smartfusion2/applications/main.c

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-06     whik         first version
+ */
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#define LED_PIN 0
+
+int main(void)
+{
+    int count = 1;
+
+    rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
+
+    while(count++)
+    {
+        rt_pin_write(LED_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+
+        rt_pin_write(LED_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+    
+    return RT_EOK;
+}

bsp/smartfusion2/applicatons/main.c

@@ -1,38 +0,0 @@
-#include <rthw.h>
-#include <rtthread.h>
-#include <rtdevice.h>
-
-#define LED0_PIN 0
-#define LED1_PIN 1
-#define SW0_PIN  2
-#define SW1_PIN  3
-
-extern void sw0_isr(void *args);
-extern void sw1_isr(void *args);
-
-int main(void)
-{
-    int count = 1;
-
-    rt_pin_attach_irq(SW0_PIN, PIN_IRQ_MODE_RISING, sw0_isr, RT_NULL);
-    rt_pin_attach_irq(SW1_PIN, PIN_IRQ_MODE_RISING, sw1_isr, RT_NULL);
-    
-    rt_pin_irq_enable(SW0_PIN, PIN_IRQ_ENABLE);
-    rt_pin_irq_enable(SW1_PIN, PIN_IRQ_ENABLE);
-
-    rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
-    rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT); 
-    
-    while(count++)
-    {
-        rt_pin_write(LED0_PIN, PIN_HIGH);
-        rt_pin_write(LED1_PIN, PIN_HIGH);
-        rt_thread_mdelay(100);
-
-        rt_pin_write(LED0_PIN, PIN_LOW);
-        rt_pin_write(LED1_PIN, PIN_LOW);
-        rt_thread_mdelay(100);
-    }
-    
-    return RT_EOK;
-}

bsp/smartfusion2/board/SConscript

@@ -0,0 +1,10 @@
+from building import *
+import rtconfig
+
+cwd     = GetCurrentDir()
+CPPPATH = [cwd]
+src	= Glob('*.c')
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/smartfusion2/board/board.c

@@ -1,12 +1,11 @@
 /*
- * Copyright (c) 2006-2019, RT-Thread Development Team
+ * Copyright (c) 2006-2020, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
- * 2017-07-24     Tanek        the first version
- * 2018-11-12     Ernest Chen  modify copyright
+ * 2020-08-06     whik         first version
  */
  
 #include <stdint.h>

bsp/smartfusion2/board/config.c

@@ -1,16 +1,14 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-06     whik         first version
+ */
 #include "config.h"
 
-void sw0_isr(void *args)
-{
-    rt_kprintf("sw_0 is trigger \r\n");
-    rt_thread_mdelay(400);
-}
-
-void sw1_isr(void *args)
-{
-    rt_kprintf("sw_1 is trigger \r\n");
-    rt_thread_mdelay(400);
-}
 /* hardware initialization */
 void boardInit(void)
 {

bsp/smartfusion2/board/config.h

@@ -1,3 +1,12 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-06     whik         first version
+ */
 #ifndef __CONFIG_H__
 #define __CONFIG_H__
 

bsp/smartfusion2/del_obj_file.bat

@@ -1,22 +0,0 @@
-%删除obj目录下的多余文件%
-del *.lnp /s
-::del *.opt /s  ::不允许删除JLINK的设置
-del *.__i /s
-del *.crf /s
-del *.o /s
-del *.d /s
-del *.htm /s
-
-%删除USER目录下的多余文件%
-del *.map /s
-del *.lst /s
-del *.dep /s
-del *.build_log.htm /s
-del *.bak /s
-del *.sct /s
-del *.axf /s
-
-del JLinkLog.txt /s
-del SConscript /s
-
-echo 编译产生的其他文件已经删除

bsp/smartfusion2/drivers/Kconfig

@@ -0,0 +1,35 @@
+menu "Hardware Drivers Config"
+
+    menu "On-chip Peripheral Drivers"
+
+        menu "UART Drivers"
+            config BSP_USING_UART0
+                bool "Enable MSS_UART0"
+                select RT_USING_SERIAL
+                default y
+                help
+                config MSS_UART0
+        
+            config BSP_USING_UART1
+                bool "Enable MSS_UART1"
+                select RT_USING_SERIAL
+                default y
+                help 
+                config MSS_UART1
+            
+            config RT_CONSOLE_DEVICE_NAME
+                string "the device name for console"
+                default "uart0"
+        endmenu 
+        
+        menu "GPIO Drivers"
+            config BSP_USING_GPIO
+            bool "Enable MSS_GPIO"
+            select RT_USING_PIN
+            default y
+            help
+            config MSS_GPIO
+        endmenu
+    endmenu
+        
+endmenu

bsp/smartfusion2/drivers/SConscript

@@ -0,0 +1,16 @@
+from building import *
+
+cwd = GetCurrentDir()
+src = []
+
+# add serial driver code
+if  GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1'):
+   src += ['drv_uart.c']
+if  GetDepend('BSP_USING_GPIO'):
+   src += ['drv_gpio.c']
+
+CPPPATH = [cwd]
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/smartfusion2/drivers/drv_gpio.c

@@ -1,8 +1,16 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-07-09     whik         first version
+ */
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <rthw.h>
 
-#include "mss_gpio.h"
 #include "drv_gpio.h"
 
 #ifdef BSP_USING_GPIO
@@ -132,7 +140,7 @@ static rt_err_t sf2_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
 
 static rt_err_t sf2_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
 {
-    uint32_t mode;
+    uint32_t mode = 0;
     rt_base_t level;
 
     if (enabled == PIN_IRQ_ENABLE)

bsp/smartfusion2/drivers/drv_gpio.h

@@ -1,6 +1,17 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-06     whik         first version
+ */
 #ifndef __DRV_GPIO_H__
 #define __DRV_GPIO_H__
 
+#include "mss_gpio.h"
+
 int rt_hw_pin_init(void);
 
 #endif

bsp/smartfusion2/drivers/drv_uart.c

@@ -1,3 +1,12 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-06     whik         first version
+ */
 #include <rthw.h>
 #include <rtthread.h>
 #include <rtdevice.h>
@@ -41,6 +50,7 @@ void uart1_rx_handler(mss_uart_instance_t *this_uart)
     /* leave interrupt */
     rt_interrupt_leave();
 }
+
 static rt_err_t sf2_uart_configure(struct rt_serial_device *serial, 
 	                               struct serial_configure *cfg)
 {
@@ -151,7 +161,6 @@ static const struct rt_uart_ops sf2_uart_ops =
     sf2_uart_getc,
 };
 
-
 int rt_hw_uart_init(void)
 {
     rt_err_t result = RT_EOK;

bsp/smartfusion2/drivers/drv_uart.h

@@ -1,3 +1,12 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020-08-06     whik         first version
+ */
 #ifndef __DRV_UART_H__
 #define __DRV_UART_H__
 

bsp/smartfusion2/libraries/SConscript

@@ -0,0 +1,16 @@
+from building import *
+import rtconfig
+
+cwd     = GetCurrentDir()
+
+src	= [cwd + '/sys_config/sys_config.c']
+src += [cwd + '/mss_gpio/mss_gpio.c']
+src += [cwd + '/mss_uart/mss_uart.c']
+
+CPPPATH = [cwd+'/sys_config']
+CPPPATH += [cwd+'/mss_gpio']
+CPPPATH += [cwd+'/mss_uart']
+
+group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/smartfusion2/project.uvopt

@@ -0,0 +1,987 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>project</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>20000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>1</RunSim>
+        <RunTarget>0</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\obj\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <Books>
+        <Book>
+          <Number>0</Number>
+          <Title>Datasheet</Title>
+          <Path>DATASHTS\Actel\M2Sxxx\SmartFusion2_DS.pdf</Path>
+        </Book>
+        <Book>
+          <Number>1</Number>
+          <Title>Technical Reference Manual</Title>
+          <Path>datashts\arm\cortex_m3\r2p1\DDI0337I_CORTEXM3_R2P1_TRM.PDF</Path>
+        </Book>
+        <Book>
+          <Number>2</Number>
+          <Title>Generic User Guide</Title>
+          <Path>datashts\arm\cortex_m3\r2p1\DUI0552A_CORTEX_M3_DGUG.PDF</Path>
+        </Book>
+      </Books>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <tPdscDbg>0</tPdscDbg>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U10000387 -O207 -S8 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-O207 -O207 -S9 -C0 -FO7  -FN1 -FC800 -FD20000000 -FF0M2Sxxx_256 -FL040000 -FS00</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Kernel</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <Focus>0</Focus>
+      <ColumnNumber>0</ColumnNumber>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <TopLine>0</TopLine>
+      <CurrentLine>0</CurrentLine>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\src\clock.c</PathWithFileName>
+      <FilenameWithoutPath>clock.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>2</FileNumber>
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+      <tvExp>0</tvExp>
+      <Focus>0</Focus>
+      <ColumnNumber>0</ColumnNumber>
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+      <CurrentLine>0</CurrentLine>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\src\components.c</PathWithFileName>
+      <FilenameWithoutPath>components.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
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+      <tvExpOptDlg>0</tvExpOptDlg>
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+    </File>
+    <File>
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+  </Group>
+
+  <Group>
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+      <CurrentLine>0</CurrentLine>
+      <bDave2>0</bDave2>
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+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>CMSIS</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
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+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\components\libc\compilers\common\time.c</PathWithFileName>
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+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+</ProjectOpt>

bsp/smartfusion2/project.uvoptx

@@ -26,10 +26,10 @@
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>
-      <CLKADS>100000000</CLKADS>
+      <CLKADS>12000000</CLKADS>
       <OPTTT>
         <gFlags>1</gFlags>
-        <BeepAtEnd>0</BeepAtEnd>
+        <BeepAtEnd>1</BeepAtEnd>
         <RunSim>0</RunSim>
         <RunTarget>1</RunTarget>
         <RunAbUc>0</RunAbUc>
@@ -113,39 +113,14 @@
         <tDllPa></tDllPa>
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
-        <tIfile>.\JLinkSettings.ini</tIfile>
+        <tIfile></tIfile>
         <pMon>Segger\JL2CM3.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGDARM</Key>
-          <Name>(1010=-1,-1,-1,-1,0)(1007=105,137,292,412,0)(1008=290,130,666,366,0)(1009=-1,-1,-1,-1,0)</Name>
-        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>JL2CM3</Key>
-          <Name>-U10000387 -O70 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256.FLM -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM)</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMRTXEVENTFLAGS</Key>
-          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGTARM</Key>
-          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=260,193,636,429,0)(1009=-1,-1,-1,-1,0)</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMDBGFLAGS</Key>
-          <Name>-T0</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ST-LINKIII-KEIL_SWO</Key>
-          <Name>-U303030303030303030303031 -O8398 -S1 -C0 -A0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256.FLM -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM)</Name>
+          <Name>-U10000387 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256.FLM -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -153,43 +128,19 @@
           <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM))</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
-      <Breakpoint>
-        <Bp>
-          <Number>0</Number>
-          <Type>0</Type>
-          <LineNumber>1188</LineNumber>
-          <EnabledFlag>1</EnabledFlag>
-          <Address>17828</Address>
-          <ByteObject>0</ByteObject>
-          <HtxType>0</HtxType>
-          <ManyObjects>0</ManyObjects>
-          <SizeOfObject>0</SizeOfObject>
-          <BreakByAccess>0</BreakByAccess>
-          <BreakIfRCount>1</BreakIfRCount>
-          <Filename>..\..\components\drivers\serial\serial.c</Filename>
-          <ExecCommand></ExecCommand>
-          <Expression>\\project\../../components/drivers/serial/serial.c\1188</Expression>
-        </Bp>
-      </Breakpoint>
-      <WatchWindow1>
-        <Ww>
-          <count>0</count>
-          <WinNumber>1</WinNumber>
-          <ItemText>ch</ItemText>
-        </Ww>
-      </WatchWindow1>
+      <Breakpoint/>
       <Tracepoint>
         <THDelay>0</THDelay>
       </Tracepoint>
       <DebugFlag>
         <trace>0</trace>
         <periodic>1</periodic>
-        <aLwin>1</aLwin>
+        <aLwin>0</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
         <aSer2>0</aSer2>
         <aPa>0</aPa>
-        <viewmode>1</viewmode>
+        <viewmode>0</viewmode>
         <vrSel>0</vrSel>
         <aSym>0</aSym>
         <aTbox>0</aTbox>
@@ -224,8 +175,8 @@
   </Target>
 
   <Group>
-    <GroupName>Applications</GroupName>
-    <tvExp>1</tvExp>
+    <GroupName>Kernel</GroupName>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -236,8 +187,8 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
-      <PathWithFileName>.\applicatons\main.c</PathWithFileName>
-      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <PathWithFileName>..\..\src\clock.c</PathWithFileName>
+      <FilenameWithoutPath>clock.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
@@ -248,8 +199,8 @@
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       <bDave2>0</bDave2>
-      <PathWithFileName>.\board\board.c</PathWithFileName>
-      <FilenameWithoutPath>board.c</FilenameWithoutPath>
+      <PathWithFileName>..\..\src\components.c</PathWithFileName>
+      <FilenameWithoutPath>components.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
@@ -260,239 +211,239 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
-      <PathWithFileName>.\board\config.c</PathWithFileName>
-      <FilenameWithoutPath>config.c</FilenameWithoutPath>
+      <PathWithFileName>..\..\src\device.c</PathWithFileName>
+      <FilenameWithoutPath>device.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
     <File>
       <GroupNumber>1</GroupNumber>
       <FileNumber>4</FileNumber>
-      <FileType>5</FileType>
+      <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
-      <PathWithFileName>.\rtconfig.h</PathWithFileName>
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+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>0</uC99>
+            <useXO>0</useXO>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>RT_USING_ARM_LIBC</Define>
+              <Undefine></Undefine>
+              <IncludePath>.;..\..\include;applications;board;CMSIS;drivers;libraries\sys_config;libraries\mss_gpio;libraries\mss_uart;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\libc\compilers\common</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\applications\link.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Kernel</GroupName>
+          <Files>
+            <File>
+              <FileName>clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\clock.c</FilePath>
+            </File>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\components.c</FilePath>
+            </File>
+            <File>
+              <FileName>device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\device.c</FilePath>
+            </File>
+            <File>
+              <FileName>idle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\idle.c</FilePath>
+            </File>
+            <File>
+              <FileName>ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\ipc.c</FilePath>
+            </File>
+            <File>
+              <FileName>irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\irq.c</FilePath>
+            </File>
+            <File>
+              <FileName>kservice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\kservice.c</FilePath>
+            </File>
+            <File>
+              <FileName>mem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\mem.c</FilePath>
+            </File>
+            <File>
+              <FileName>mempool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\mempool.c</FilePath>
+            </File>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\object.c</FilePath>
+            </File>
+            <File>
+              <FileName>scheduler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\scheduler.c</FilePath>
+            </File>
+            <File>
+              <FileName>signal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\signal.c</FilePath>
+            </File>
+            <File>
+              <FileName>thread.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\thread.c</FilePath>
+            </File>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\timer.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Applications</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>applications\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>board.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\board.c</FilePath>
+            </File>
+            <File>
+              <FileName>config.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\config.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>CMSIS</GroupName>
+          <Files>
+            <File>
+              <FileName>core_cm3.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>CMSIS\core_cm3.c</FilePath>
+            </File>
+            <File>
+              <FileName>system_m2sxxx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>CMSIS\system_m2sxxx.c</FilePath>
+            </File>
+            <File>
+              <FileName>startup_m2sxxx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>CMSIS\startup_arm\startup_m2sxxx.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers</GroupName>
+          <Files>
+            <File>
+              <FileName>drv_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>drivers\drv_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>drv_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>drivers\drv_gpio.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Libraries</GroupName>
+          <Files>
+            <File>
+              <FileName>sys_config.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>libraries\sys_config\sys_config.c</FilePath>
+            </File>
+            <File>
+              <FileName>mss_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>libraries\mss_gpio\mss_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>mss_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>libraries\mss_uart\mss_uart.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>cpu</GroupName>
+          <Files>
+            <File>
+              <FileName>backtrace.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
+            </File>
+            <File>
+              <FileName>div0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
+            </File>
+            <File>
+              <FileName>showmem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
+            </File>
+            <File>
+              <FileName>cpuport.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
+            </File>
+            <File>
+              <FileName>context_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>DeviceDrivers</GroupName>
+          <Files>
+            <File>
+              <FileName>pin.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\misc\pin.c</FilePath>
+            </File>
+            <File>
+              <FileName>serial.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\serial\serial.c</FilePath>
+            </File>
+            <File>
+              <FileName>completion.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\src\completion.c</FilePath>
+            </File>
+            <File>
+              <FileName>dataqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
+            </File>
+            <File>
+              <FileName>pipe.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
+            </File>
+            <File>
+              <FileName>ringblk_buf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath>
+            </File>
+            <File>
+              <FileName>ringbuffer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
+            </File>
+            <File>
+              <FileName>waitqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
+            </File>
+            <File>
+              <FileName>workqueue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>finsh</GroupName>
+          <Files>
+            <File>
+              <FileName>shell.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\finsh\shell.c</FilePath>
+            </File>
+            <File>
+              <FileName>cmd.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\finsh\cmd.c</FilePath>
+            </File>
+            <File>
+              <FileName>msh.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\finsh\msh.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>libc</GroupName>
+          <Files>
+            <File>
+              <FileName>libc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\armlibc\libc.c</FilePath>
+            </File>
+            <File>
+              <FileName>mem_std.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
+            </File>
+            <File>
+              <FileName>stubs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
+            </File>
+            <File>
+              <FileName>time.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\common\time.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+</Project>

bsp/smartfusion2/project.uvprojx

@@ -18,7 +18,7 @@
           <Vendor>Microsemi</Vendor>
           <PackID>Microsemi.M2Sxxx.1.0.64</PackID>
           <PackURL>http://cores.actel-ip.com/CMSIS-Pack</PackURL>
-          <Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x10000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
+          <Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
           <StartupFile></StartupFile>
           <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM))</FlashDriverDll>
@@ -49,7 +49,7 @@
             <InvalidFlash>1</InvalidFlash>
           </TargetStatus>
           <OutputDirectory>.\obj\</OutputDirectory>
-          <OutputName>project</OutputName>
+          <OutputName>rtthread</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
           <CreateHexFile>1</CreateHexFile>
@@ -72,7 +72,7 @@
           <BeforeMake>
             <RunUserProg1>0</RunUserProg1>
             <RunUserProg2>0</RunUserProg2>
-            <UserProg1Name>..\BAT\del_hex.bat</UserProg1Name>
+            <UserProg1Name></UserProg1Name>
             <UserProg2Name></UserProg2Name>
             <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
             <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
@@ -134,11 +134,11 @@
             <RunIndependent>0</RunIndependent>
             <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
             <Capability>1</Capability>
-            <DriverSelection>4096</DriverSelection>
+            <DriverSelection>-1</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
           <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3>"" ()</Flash3>
+          <Flash3></Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
           <pFcarmGrp></pFcarmGrp>
@@ -199,7 +199,7 @@
             <NoZi1>0</NoZi1>
             <NoZi2>0</NoZi2>
             <NoZi3>0</NoZi3>
-            <NoZi4>0</NoZi4>
+            <NoZi4>1</NoZi4>
             <NoZi5>0</NoZi5>
             <Ro1Chk>0</Ro1Chk>
             <Ro2Chk>0</Ro2Chk>
@@ -327,18 +327,18 @@
             <uC99>0</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>3</v6Lang>
-            <v6LangP>3</v6LangP>
-            <vShortEn>0</vShortEn>
-            <vShortWch>0</vShortWch>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
             <v6WtE>0</v6WtE>
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define></Define>
+              <Define>RT_USING_ARM_LIBC</Define>
               <Undefine></Undefine>
-              <IncludePath>..\smartfusion2;.\board;.\drivers;.\CMSIS;.\CMSIS\startup_arm;.\libraries\mss_gpio;.\libraries\mss_uart;.\libraries\sys_config;..\..\include;..\..\include\libc;..\..\components\finsh;..\..\components\drivers\include;..\..\components\drivers\include\drivers;..\..\components\drivers\include\ipc</IncludePath>
+              <IncludePath>.;..\..\include;applications;board;CMSIS;drivers;libraries\sys_config;libraries\mss_gpio;libraries\mss_uart;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\libc\compilers\common</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -360,7 +360,7 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
@@ -369,7 +369,7 @@
             <TextAddressRange>0x00000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile>..\OBJ\project.sct</ScatterFile>
+            <ScatterFile>.\applications\link.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -379,81 +379,6 @@
         </TargetArmAds>
       </TargetOption>
       <Groups>
-        <Group>
-          <GroupName>Applications</GroupName>
-          <Files>
-            <File>
-              <FileName>main.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\applicatons\main.c</FilePath>
-            </File>
-            <File>
-              <FileName>board.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\board\board.c</FilePath>
-            </File>
-            <File>
-              <FileName>config.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\board\config.c</FilePath>
-            </File>
-            <File>
-              <FileName>rtconfig.h</FileName>
-              <FileType>5</FileType>
-              <FilePath>.\rtconfig.h</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Libraries</GroupName>
-          <Files>
-            <File>
-              <FileName>mss_gpio.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\libraries\mss_gpio\mss_gpio.c</FilePath>
-            </File>
-            <File>
-              <FileName>mss_uart.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\libraries\mss_uart\mss_uart.c</FilePath>
-            </File>
-            <File>
-              <FileName>sys_config.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\libraries\sys_config\sys_config.c</FilePath>
-            </File>
-            <File>
-              <FileName>sys_config_mss_clocks.h</FileName>
-              <FileType>5</FileType>
-              <FilePath>.\libraries\sys_config\sys_config_mss_clocks.h</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>CMSIS</GroupName>
-          <Files>
-            <File>
-              <FileName>core_cm3.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\CMSIS\core_cm3.c</FilePath>
-            </File>
-            <File>
-              <FileName>system_m2sxxx.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>.\CMSIS\system_m2sxxx.c</FilePath>
-            </File>
-            <File>
-              <FileName>startup_m2sxxx.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>.\CMSIS\startup_arm\startup_m2sxxx.s</FilePath>
-            </File>
-            <File>
-              <FileName>hw_reg_access.s</FileName>
-              <FileType>2</FileType>
-              <FilePath>.\CMSIS\hal\hw_reg_access.s</FilePath>
-            </File>
-          </Files>
-        </Group>
         <Group>
           <GroupName>Kernel</GroupName>
           <Files>
@@ -467,11 +392,6 @@
               <FileType>1</FileType>
               <FilePath>..\..\src\components.c</FilePath>
             </File>
-            <File>
-              <FileName>cpu.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\cpu.c</FilePath>
-            </File>
             <File>
               <FileName>device.c</FileName>
               <FileType>1</FileType>
@@ -502,11 +422,6 @@
               <FileType>1</FileType>
               <FilePath>..\..\src\mem.c</FilePath>
             </File>
-            <File>
-              <FileName>memheap.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\memheap.c</FilePath>
-            </File>
             <File>
               <FileName>mempool.c</FileName>
               <FileType>1</FileType>
@@ -527,11 +442,6 @@
               <FileType>1</FileType>
               <FilePath>..\..\src\signal.c</FilePath>
             </File>
-            <File>
-              <FileName>slab.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\slab.c</FilePath>
-            </File>
             <File>
               <FileName>thread.c</FileName>
               <FileType>1</FileType>
@@ -545,162 +455,202 @@
           </Files>
         </Group>
         <Group>
-          <GroupName>Drivers</GroupName>
+          <GroupName>Applications</GroupName>
           <Files>
             <File>
-              <FileName>drv_gpio.c</FileName>
+              <FileName>main.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\drivers\drv_gpio.c</FilePath>
+              <FilePath>applications\main.c</FilePath>
             </File>
             <File>
-              <FileName>drv_uart.c</FileName>
+              <FileName>board.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\drivers\drv_uart.c</FilePath>
+              <FilePath>board\board.c</FilePath>
+            </File>
+            <File>
+              <FileName>config.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>board\config.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>DeviceDrivers</GroupName>
+          <GroupName>CMSIS</GroupName>
           <Files>
             <File>
-              <FileName>pin.c</FileName>
+              <FileName>core_cm3.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\misc\pin.c</FilePath>
+              <FilePath>CMSIS\core_cm3.c</FilePath>
             </File>
             <File>
-              <FileName>completion.c</FileName>
+              <FileName>system_m2sxxx.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\completion.c</FilePath>
+              <FilePath>CMSIS\system_m2sxxx.c</FilePath>
             </File>
             <File>
-              <FileName>dataqueue.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
-            </File>
-            <File>
-              <FileName>pipe.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
+              <FileName>startup_m2sxxx.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>CMSIS\startup_arm\startup_m2sxxx.s</FilePath>
             </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Drivers</GroupName>
+          <Files>
             <File>
-              <FileName>ringblk_buf.c</FileName>
+              <FileName>drv_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath>
+              <FilePath>drivers\drv_uart.c</FilePath>
             </File>
             <File>
-              <FileName>ringbuffer.c</FileName>
+              <FileName>drv_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
+              <FilePath>drivers\drv_gpio.c</FilePath>
             </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Libraries</GroupName>
+          <Files>
             <File>
-              <FileName>waitqueue.c</FileName>
+              <FileName>sys_config.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
+              <FilePath>libraries\sys_config\sys_config.c</FilePath>
             </File>
             <File>
-              <FileName>workqueue.c</FileName>
+              <FileName>mss_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
+              <FilePath>libraries\mss_gpio\mss_gpio.c</FilePath>
             </File>
             <File>
-              <FileName>serial.c</FileName>
+              <FileName>mss_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\drivers\serial\serial.c</FilePath>
+              <FilePath>libraries\mss_uart\mss_uart.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>finish</GroupName>
+          <GroupName>cpu</GroupName>
           <Files>
             <File>
-              <FileName>cmd.c</FileName>
+              <FileName>backtrace.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\cmd.c</FilePath>
+              <FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_compiler.c</FileName>
+              <FileName>div0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
+              <FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_error.c</FileName>
+              <FileName>showmem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_error.c</FilePath>
+              <FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_heap.c</FileName>
+              <FileName>cpuport.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
+              <FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_init.c</FileName>
+              <FileName>context_rvds.S</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>DeviceDrivers</GroupName>
+          <Files>
+            <File>
+              <FileName>pin.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_init.c</FilePath>
+              <FilePath>..\..\components\drivers\misc\pin.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_node.c</FileName>
+              <FileName>serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_node.c</FilePath>
+              <FilePath>..\..\components\drivers\serial\serial.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_ops.c</FileName>
+              <FileName>completion.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
+              <FilePath>..\..\components\drivers\src\completion.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_parser.c</FileName>
+              <FileName>dataqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
+              <FilePath>..\..\components\drivers\src\dataqueue.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_token.c</FileName>
+              <FileName>pipe.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_token.c</FilePath>
+              <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_var.c</FileName>
+              <FileName>ringblk_buf.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_var.c</FilePath>
+              <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath>
             </File>
             <File>
-              <FileName>finsh_vm.c</FileName>
+              <FileName>ringbuffer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
+              <FilePath>..\..\components\drivers\src\ringbuffer.c</FilePath>
             </File>
             <File>
-              <FileName>msh.c</FileName>
+              <FileName>waitqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\msh.c</FilePath>
+              <FilePath>..\..\components\drivers\src\waitqueue.c</FilePath>
             </File>
             <File>
-              <FileName>msh_file.c</FileName>
+              <FileName>workqueue.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\msh_file.c</FilePath>
+              <FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
             </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>finsh</GroupName>
+          <Files>
             <File>
               <FileName>shell.c</FileName>
               <FileType>1</FileType>
               <FilePath>..\..\components\finsh\shell.c</FilePath>
             </File>
             <File>
-              <FileName>symbol.c</FileName>
+              <FileName>cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\components\finsh\symbol.c</FilePath>
+              <FilePath>..\..\components\finsh\cmd.c</FilePath>
+            </File>
+            <File>
+              <FileName>msh.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\finsh\msh.c</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>cpu</GroupName>
+          <GroupName>libc</GroupName>
           <Files>
             <File>
-              <FileName>cpuport.c</FileName>
+              <FileName>libc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
+              <FilePath>..\..\components\libc\compilers\armlibc\libc.c</FilePath>
             </File>
             <File>
-              <FileName>context_rvds.S</FileName>
-              <FileType>2</FileType>
-              <FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
+              <FileName>mem_std.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
+            </File>
+            <File>
+              <FileName>stubs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
+            </File>
+            <File>
+              <FileName>time.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\libc\compilers\common\time.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -711,20 +661,7 @@
   <RTE>
     <apis/>
     <components/>
-    <files>
-      <file attr="config" category="source" name="bsp\board.c" version="3.1.3">
-        <instance index="0" removed="1">RTE\RTOS\board.c</instance>
-        <component Cbundle="RT-Thread" Cclass="RTOS" Cgroup="kernel" Cvendor="RealThread" Cversion="3.1.3" condition="CMSIS Core with RTOS"/>
-        <package license="License.txt" name="RT-Thread" schemaVersion="1.4" supportContact="https://www.rt-thread.org" url="https://www.rt-thread.org/download/mdk/" vendor="RealThread" version="3.1.3"/>
-        <targetInfos/>
-      </file>
-      <file attr="config" category="header" name="bsp\rtconfig.h" version="3.1.3">
-        <instance index="0" removed="1">RTE\RTOS\rtconfig.h</instance>
-        <component Cbundle="RT-Thread" Cclass="RTOS" Cgroup="kernel" Cvendor="RealThread" Cversion="3.1.3" condition="CMSIS Core with RTOS"/>
-        <package license="License.txt" name="RT-Thread" schemaVersion="1.4" supportContact="https://www.rt-thread.org" url="https://www.rt-thread.org/download/mdk/" vendor="RealThread" version="3.1.3"/>
-        <targetInfos/>
-      </file>
-    </files>
+    <files/>
   </RTE>
 
 </Project>

bsp/smartfusion2/rtconfig.h

@@ -1,49 +1,165 @@
-/* RT-Thread config file */
-#ifndef __RTTHREAD_CFG_H__
-#define __RTTHREAD_CFG_H__
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
 
-#define RT_THREAD_PRIORITY_MAX  8
-#define RT_TICK_PER_SECOND      1000
-#define RT_ALIGN_SIZE           4
-#define RT_NAME_MAX             8
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
 
-#define RT_USING_COMPONENTS_INIT
-#define RT_USING_USER_MAIN
-#define RT_USING_DEVICE
-#define RT_USING_PIN
-#define RT_USING_SERIAL
-
-#define RT_USING_CONSOLE
-#define RT_CONSOLEBUF_SIZE          128
-#define RT_CONSOLE_DEVICE_NAME      "uart1"
-
-#define BSP_USING_GPIO
-#define BSP_USING_UART0
-#define BSP_USING_UART1
+/* RT-Thread Kernel */
 
-#define RT_MAIN_THREAD_STACK_SIZE   512
-#define RT_DEBUG_INIT               0
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 100
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO 4
+#define RT_TIMER_THREAD_STACK_SIZE 512
+#define RT_DEBUG
 
-#define RT_TIMER_THREAD_PRIO        4
-#define RT_TIMER_THREAD_STACK_SIZE  512
+/* Inter-Thread communication */
 
 #define RT_USING_SEMAPHORE
 #define RT_USING_MUTEX
 #define RT_USING_EVENT
 #define RT_USING_MAILBOX
 #define RT_USING_MESSAGEQUEUE
-#define RT_USING_HEAP
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
 #define RT_USING_SMALL_MEM
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart0"
+#define RT_VER_NUM 0x40003
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
 
-#define RT_USING_FINSH
 
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 1024
+#define FINSH_CMD_SIZE 80
 #define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
 #define FINSH_USING_MSH_ONLY
-#define __FINSH_THREAD_PRIORITY     5
-#define FINSH_THREAD_PRIORITY       (RT_THREAD_PRIORITY_MAX / 8 * __FINSH_THREAD_PRIORITY + 1)
-#define FINSH_THREAD_STACK_SIZE     1024
-#define FINSH_HISTORY_LINES         5
-#define FINSH_USING_SYMTAB
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_USING_DMA
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+#define RT_USING_LIBC
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* Network interface device */
 
-#endif
 
+/* light weight TCP/IP stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+
+/* Hardware Drivers Config */
+
+/* On-chip Peripheral Drivers */
+
+/* UART Drivers */
+
+#define BSP_USING_UART0
+#define BSP_USING_UART1
+
+/* GPIO Drivers */
+
+#define BSP_USING_GPIO
+#define SOC_SF2_M2S010
+
+#endif

bsp/smartfusion2/rtconfig.py

@@ -0,0 +1,82 @@
+import os
+import sys
+
+CROSS_TOOL = 'gcc'
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+# device options
+ARCH = 'arm'
+CPU = 'cortex-m3'
+
+if CROSS_TOOL == 'gcc':
+    PLATFORM = 'gcc'
+    EXEC_PATH = 'D:/Program/env/tools/gnu_gcc/arm_gcc/mingw/bin'
+elif CROSS_TOOL == 'keil':
+    PLATFORM = 'armcc'
+    EXEC_PATH = 'D:/Program/Keil_v5'
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+# BUILD = 'debug'
+BUILD = 'release'
+
+if PLATFORM == 'gcc':
+    PREFIX = 'arm-none-eabi-'
+    CC = PREFIX + 'gcc'
+    CXX = PREFIX + 'g++'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -Wall'
+    CFLAGS = DEVICE + ' -std=c99'
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
+    # link script file path
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T CMSIS/startup_gcc/debug-in-microsemi-smartfusion2-envm.ld'
+    
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2 -g'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu ' + CPU 
+    CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    # link scatter file path
+    LFLAGS = DEVICE + ' --scatter "applications/link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
+
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC'
+    LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/ARMCC/LIB'
+
+    CFLAGS += ' -D__MICROLIB '
+    AFLAGS += ' --pd "__MICROLIB SETA 1" '
+    LFLAGS += ' --library_type=microlib '
+    EXEC_PATH += '/arm/armcc/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'

bsp/smartfusion2/template.uvopt

@@ -0,0 +1,187 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>project</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>20000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>1</RunSim>
+        <RunTarget>0</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\obj\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <Books>
+        <Book>
+          <Number>0</Number>
+          <Title>Datasheet</Title>
+          <Path>DATASHTS\Actel\M2Sxxx\SmartFusion2_DS.pdf</Path>
+        </Book>
+        <Book>
+          <Number>1</Number>
+          <Title>Technical Reference Manual</Title>
+          <Path>datashts\arm\cortex_m3\r2p1\DDI0337I_CORTEXM3_R2P1_TRM.PDF</Path>
+        </Book>
+        <Book>
+          <Number>2</Number>
+          <Title>Generic User Guide</Title>
+          <Path>datashts\arm\cortex_m3\r2p1\DUI0552A_CORTEX_M3_DGUG.PDF</Path>
+        </Book>
+      </Books>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <tPdscDbg>0</tPdscDbg>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U10000387 -O207 -S8 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-O207 -O207 -S9 -C0 -FO7  -FN1 -FC800 -FD20000000 -FF0M2Sxxx_256 -FL040000 -FS00</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Source Group 1</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+  </Group>
+
+</ProjectOpt>

bsp/smartfusion2/template.uvoptx

@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>project</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\obj\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>255</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>4</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U10000387 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256.FLM -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Source Group 1</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+  </Group>
+
+</ProjectOpt>

bsp/smartfusion2/template.uvproj

@@ -0,0 +1,412 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>project</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>M2S010</Device>
+          <Vendor>Microsemi</Vendor>
+          <Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x0-0x3FFFF) CLOCK(20000000) CPUTYPE("Cortex-M3")</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-O207 -S9 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000)</FlashDriverDll>
+          <DeviceId>6800</DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile></SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\obj\</OutputDirectory>
+          <OutputName>rtthread</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\obj\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin -o "$L@L.bin" "#L"</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments>-MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments>-MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+            <RestoreSysVw>1</RestoreSysVw>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
+            <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+            <RunToMain>1</RunToMain>
+            <RestoreBreakpoints>1</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>1</RestoreTracepoints>
+            <RestoreSysVw>1</RestoreSysVw>
+            <UsePdscDebugDescription>0</UsePdscDebugDescription>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>6</TargetSelection>
+          <SimDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile></InitializationFile>
+            <Driver>Segger\JL2CM3.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>0</Capability>
+            <DriverSelection>-1</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M3"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x10000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>0</uC99>
+            <useXO>0</useXO>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\applications\link.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Source Group 1</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+</Project>

bsp/smartfusion2/template.uvprojx

@@ -0,0 +1,395 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>project</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>M2S010</Device>
+          <Vendor>Microsemi</Vendor>
+          <PackID>Microsemi.M2Sxxx.1.0.64</PackID>
+          <PackURL>http://cores.actel-ip.com/CMSIS-Pack</PackURL>
+          <Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:M2S010$CMSIS\m2sxxx.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:M2S010$SVD\M2Sxxx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\obj\</OutputDirectory>
+          <OutputName>rtthread</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\obj\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin -o "$L@L.bin" "#L"</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> </SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments></TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>-1</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M3"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>1</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x10000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>0</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\applications\link.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>Source Group 1</GroupName>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>