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+;/*****************************************************************************
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+; * @file: startup_LPC11xx.s
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+; * @purpose: CMSIS Cortex-M0 Core Device Startup File
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+; * for the NXP LPC11xx Device Series
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+; * @version: V1.0
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+; * @date: 25. Nov. 2008
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+; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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+; *
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+; * Copyright (C) 2008 ARM Limited. All rights reserved.
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+; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
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+; * processor based microcontrollers. This file can be freely distributed
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+; * within development tools that are supporting such ARM based processors.
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+; *
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+; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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+; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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+; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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+; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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+; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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+; *
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+; *****************************************************************************/
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+
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+
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+; <h> Stack Configuration
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+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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+; </h>
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+
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+Stack_Size EQU 0x00000100
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+
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+ AREA STACK, NOINIT, READWRITE, ALIGN=3
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+Stack_Mem SPACE Stack_Size
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+__initial_sp
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+
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+
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+; <h> Heap Configuration
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+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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+; </h>
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+
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+Heap_Size EQU 0x00000000
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+
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+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
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+__heap_base
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+Heap_Mem SPACE Heap_Size
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+__heap_limit
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+
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+
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+ PRESERVE8
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+ THUMB
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+
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+ IMPORT rt_hw_hard_fault
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+ IMPORT rt_hw_pend_sv
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+ IMPORT rt_hw_timer_handler
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+
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+; Vector Table Mapped to Address 0 at Reset
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+
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+ AREA RESET, DATA, READONLY
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+ EXPORT __Vectors
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+
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+__Vectors DCD __initial_sp ; Top of Stack
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+ DCD Reset_Handler ; Reset Handler
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+ DCD NMI_Handler ; NMI Handler
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+ DCD rt_hw_hard_fault ; Hard Fault Handler
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+ DCD MemManage_Handler ; MPU Fault Handler
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+ DCD BusFault_Handler ; Bus Fault Handler
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+ DCD UsageFault_Handler ; Usage Fault Handler
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+ DCD 0 ; Reserved
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+ DCD 0 ; Reserved
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+ DCD 0 ; Reserved
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+ DCD 0 ; Reserved
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+ DCD SVC_Handler ; SVCall Handler
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+ DCD DebugMon_Handler ; Debug Monitor Handler
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+ DCD 0 ; Reserved
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+ DCD rt_hw_pend_sv ; PendSV Handler
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+ DCD rt_hw_timer_handler ; SysTick Handler
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+
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+ ; External Interrupts
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+ DCD WAKEUP_IRQHandler ; 15 wakeup sources for all the
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+ DCD WAKEUP_IRQHandler ; I/O pins starting from PIO0 (0:11)
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+ DCD WAKEUP_IRQHandler ; all 40 are routed to the same ISR
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler
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+ DCD WAKEUP_IRQHandler ; PIO1 (0:11)
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+ DCD CAN_IRQHandler ; CAN
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+ DCD SSP1_IRQHandler ; SSP1
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+ DCD I2C_IRQHandler ; I2C
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+ DCD TIMER16_0_IRQHandler ; 16-bit Timer0
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+ DCD TIMER16_1_IRQHandler ; 16-bit Timer1
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+ DCD TIMER32_0_IRQHandler ; 32-bit Timer0
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+ DCD TIMER32_1_IRQHandler ; 32-bit Timer1
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+ DCD SSP0_IRQHandler ; SSP0
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+ DCD UART_IRQHandler ; UART
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+ DCD USB_IRQHandler ; USB IRQ
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+ DCD USB_FIQHandler ; USB FIQ
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+ DCD ADC_IRQHandler ; A/D Converter
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+ DCD WDT_IRQHandler ; Watchdog timer
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+ DCD BOD_IRQHandler ; Brown Out Detect
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+ DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
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+ DCD PIOINT3_IRQHandler ; PIO INT3
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+ DCD PIOINT2_IRQHandler ; PIO INT2
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+ DCD PIOINT1_IRQHandler ; PIO INT1
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+ DCD PIOINT0_IRQHandler ; PIO INT0
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+
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+
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+ IF :LNOT::DEF:NO_CRP
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+ AREA |.ARM.__at_0x02FC|, CODE, READONLY
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+CRP_Key DCD 0xFFFFFFFF
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+ ENDIF
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+
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+
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+ AREA |.text|, CODE, READONLY
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+
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+
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+; Reset Handler
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+
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+Reset_Handler PROC
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+ EXPORT Reset_Handler [WEAK]
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+ IMPORT __main
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+ LDR R0, =__main
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+ BX R0
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+ ENDP
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+
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+
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+; Dummy Exception Handlers (infinite loops which can be modified)
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+
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+NMI_Handler PROC
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+ EXPORT NMI_Handler [WEAK]
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+ B .
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+ ENDP
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+HardFault_Handler\
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+ PROC
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+ EXPORT HardFault_Handler [WEAK]
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+ B .
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+ ENDP
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+MemManage_Handler\
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+ PROC
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+ EXPORT MemManage_Handler [WEAK]
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+ B .
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+ ENDP
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+BusFault_Handler\
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+ PROC
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+ EXPORT BusFault_Handler [WEAK]
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+ B .
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+ ENDP
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+UsageFault_Handler\
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+ PROC
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+ EXPORT UsageFault_Handler [WEAK]
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+ B .
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+ ENDP
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+SVC_Handler PROC
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+ EXPORT SVC_Handler [WEAK]
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+ B .
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+ ENDP
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+DebugMon_Handler\
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+ PROC
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+ EXPORT DebugMon_Handler [WEAK]
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+ B .
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+ ENDP
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+PendSV_Handler PROC
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+ EXPORT PendSV_Handler [WEAK]
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+ B .
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+ ENDP
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+SysTick_Handler PROC
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+ EXPORT SysTick_Handler [WEAK]
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+ B .
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+ ENDP
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+
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+Default_Handler PROC
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+
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+ EXPORT WAKEUP_IRQHandler [WEAK]
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+ EXPORT CAN_IRQHandler [WEAK]
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+ EXPORT SSP1_IRQHandler [WEAK]
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+ EXPORT I2C_IRQHandler [WEAK]
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+ EXPORT TIMER16_0_IRQHandler [WEAK]
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+ EXPORT TIMER16_1_IRQHandler [WEAK]
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+ EXPORT TIMER32_0_IRQHandler [WEAK]
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+ EXPORT TIMER32_1_IRQHandler [WEAK]
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+ EXPORT SSP0_IRQHandler [WEAK]
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+ EXPORT UART_IRQHandler [WEAK]
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+
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+ EXPORT USB_IRQHandler [WEAK]
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+ EXPORT USB_FIQHandler [WEAK]
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+ EXPORT ADC_IRQHandler [WEAK]
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+ EXPORT WDT_IRQHandler [WEAK]
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+ EXPORT BOD_IRQHandler [WEAK]
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+ EXPORT FMC_IRQHandler [WEAK]
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+ EXPORT PIOINT3_IRQHandler [WEAK]
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+ EXPORT PIOINT2_IRQHandler [WEAK]
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+ EXPORT PIOINT1_IRQHandler [WEAK]
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+ EXPORT PIOINT0_IRQHandler [WEAK]
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+
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+
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+WAKEUP_IRQHandler
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+CAN_IRQHandler
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+SSP1_IRQHandler
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+I2C_IRQHandler
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+TIMER16_0_IRQHandler
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+TIMER16_1_IRQHandler
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+TIMER32_0_IRQHandler
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+TIMER32_1_IRQHandler
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+SSP0_IRQHandler
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+UART_IRQHandler
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+USB_IRQHandler
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+USB_FIQHandler
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+ADC_IRQHandler
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+WDT_IRQHandler
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+BOD_IRQHandler
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+FMC_IRQHandler
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+PIOINT3_IRQHandler
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+PIOINT2_IRQHandler
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+PIOINT1_IRQHandler
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+PIOINT0_IRQHandler
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+
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+ B .
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+
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+ ENDP
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+
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+
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+ ALIGN
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+
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+
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+; User Initial Stack & Heap
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+
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+ IF :DEF:__MICROLIB
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+
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+ EXPORT __initial_sp
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+ EXPORT __heap_base
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+ EXPORT __heap_limit
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+
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+ ELSE
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+
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+ IMPORT __use_two_region_memory
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+ EXPORT __user_initial_stackheap
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+__user_initial_stackheap
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+
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+ LDR R0, = Heap_Mem
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+ LDR R1, =(Stack_Mem + Stack_Size)
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+ LDR R2, = (Heap_Mem + Heap_Size)
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+ LDR R3, = Stack_Mem
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+ BX LR
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+
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+ ALIGN
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+
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+ ENDIF
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+
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+
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+ END
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bernard.xiong