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@@ -59,12 +59,31 @@ BOARD_InitPins:
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* END ****************************************************************************************************************/
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void BOARD_InitPins(void)
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{
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- /* PORT0: Peripheral clock is enabled */
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+ /* Enable all PORT clocks */
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CLOCK_EnableClock(kCLOCK_GatePORT0);
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- /* LPUART0 peripheral is released from reset */
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- RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
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- /* PORT0 peripheral is released from reset */
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+ CLOCK_EnableClock(kCLOCK_GatePORT1);
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+ CLOCK_EnableClock(kCLOCK_GatePORT2);
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+ CLOCK_EnableClock(kCLOCK_GatePORT3);
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+
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+ /* Enable all GPIO clocks */
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+ CLOCK_EnableClock(kCLOCK_GateGPIO0);
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+ CLOCK_EnableClock(kCLOCK_GateGPIO1);
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+ CLOCK_EnableClock(kCLOCK_GateGPIO2);
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+ CLOCK_EnableClock(kCLOCK_GateGPIO3);
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+
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+ /* Release all PORT resets */
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RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
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+ RESET_ReleasePeripheralReset(kPORT1_RST_SHIFT_RSTn);
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+ RESET_ReleasePeripheralReset(kPORT2_RST_SHIFT_RSTn);
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+ RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
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+
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+ RESET_ReleasePeripheralReset(kGPIO0_RST_SHIFT_RSTn);
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+ RESET_ReleasePeripheralReset(kGPIO1_RST_SHIFT_RSTn);
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+ RESET_ReleasePeripheralReset(kGPIO2_RST_SHIFT_RSTn);
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+ RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
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+
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+ /* Release LPUART0 resets */
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+ RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
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const port_pin_config_t port0_2_pin78_config = {/* Internal pull-up resistor is enabled */
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kPORT_PullUp,
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@@ -115,6 +134,31 @@ void BOARD_InitPins(void)
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kPORT_UnlockRegister};
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/* PORT0_3 (pin 79) is configured as LPUART0_TXD */
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PORT_SetPinConfig(PORT0, 3U, &port0_3_pin79_config);
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+
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+ const port_pin_config_t port3_12_pin63_config = {/* Internal pull-up resistor is enabled */
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+ kPORT_PullDisable,
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+ /* Low internal pull resistor value is selected. */
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+ kPORT_LowPullResistor,
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+ /* Fast slew rate is configured */
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+ kPORT_FastSlewRate,
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+ /* Passive input filter is disabled */
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+ kPORT_PassiveFilterDisable,
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+ /* Open drain output is disabled */
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+ kPORT_OpenDrainEnable,
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+ /* Low drive strength is configured */
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+ kPORT_LowDriveStrength,
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+ /* Normal drive strength is configured */
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+ kPORT_NormalDriveStrength,
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+ /* Pin is configured as LPUART0_TXD */
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+ kPORT_MuxAsGpio,
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+ /* Digital input enabled */
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+ kPORT_InputBufferEnable,
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+ /* Digital input is not inverted */
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+ kPORT_InputNormal,
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+ /* Pin Control Register fields [15:0] are not locked */
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+ kPORT_UnlockRegister};
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+ /* PORT3_12 (pin 63) is configured as LED_RED */
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+ PORT_SetPinConfig(PORT3, 12U, &port3_12_pin63_config);
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}
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/***********************************************************************************************************************
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* EOF
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