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@@ -6,9 +6,12 @@
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* Change Logs:
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* Date Author Notes
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* 2023-02-23 Jonas first version
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+ * 2023-04-16 shelton update for perfection of drv_usart_v2
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*/
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+#include "drv_common.h"
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#include "drv_usart_v2.h"
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+#include "drv_config.h"
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#ifdef RT_USING_SERIAL_V2
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#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \
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@@ -18,8 +21,7 @@
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#error "Please define at least one BSP_USING_UARTx"
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#endif
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-enum
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-{
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+enum {
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#ifdef BSP_USING_UART1
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UART1_INDEX,
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#endif
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@@ -46,88 +48,56 @@ enum
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#endif
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};
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-static struct at32_usart usart_config[] =
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-{
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+static struct at32_uart uart_config[] = {
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#ifdef BSP_USING_UART1
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- {
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- "uart1",
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- USART1,
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- USART1_IRQn,
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- },
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+ UART1_CONFIG,
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#endif
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#ifdef BSP_USING_UART2
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- {
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- "uart2",
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- USART2,
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- USART2_IRQn,
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- },
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+ UART2_CONFIG,
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#endif
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#ifdef BSP_USING_UART3
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- {
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- "uart3",
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- USART3,
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- USART3_IRQn,
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- },
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+ UART3_CONFIG,
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#endif
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#ifdef BSP_USING_UART4
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- {
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- "uart4",
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- UART4,
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- UART4_IRQn,
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- },
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+ UART4_CONFIG,
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#endif
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#ifdef BSP_USING_UART5
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- {
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- "uart5",
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- UART5,
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- UART5_IRQn,
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- },
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+ UART5_CONFIG,
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#endif
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#ifdef BSP_USING_UART6
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- {
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- "uart6",
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- USART6,
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- USART6_IRQn,
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- },
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+ UART6_CONFIG,
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#endif
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#ifdef BSP_USING_UART7
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- {
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- "uart7",
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- UART7,
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- UART7_IRQn,
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- },
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+ UART7_CONFIG,
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#endif
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#ifdef BSP_USING_UART8
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- {
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- "uart8",
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- UART8,
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- UART8_IRQn,
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- },
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+ UART8_CONFIG,
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#endif
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};
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+#ifdef RT_SERIAL_USING_DMA
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+static void at32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
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+#endif
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+
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static rt_err_t at32_configure(struct rt_serial_device *serial,
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- struct serial_configure *cfg)
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-{
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- struct at32_usart *usart_instance = (struct at32_usart *) serial->parent.user_data;
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+ struct serial_configure *cfg) {
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usart_data_bit_num_type data_bit;
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usart_stop_bit_num_type stop_bit;
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usart_parity_selection_type parity_mode;
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+ usart_hardware_flow_control_type flow_control;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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- RT_ASSERT(usart_instance != RT_NULL);
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+ struct at32_uart *instance = rt_container_of(serial, struct at32_uart, serial);
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+ RT_ASSERT(instance != RT_NULL);
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- at32_msp_usart_init((void *)usart_instance->usart_x);
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+ at32_msp_usart_init((void *)instance->uart_x);
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- usart_receiver_enable(usart_instance->usart_x, TRUE);
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- usart_transmitter_enable(usart_instance->usart_x, TRUE);
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+ usart_receiver_enable(instance->uart_x, TRUE);
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+ usart_transmitter_enable(instance->uart_x, TRUE);
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- usart_hardware_flow_control_set(usart_instance->usart_x, USART_HARDWARE_FLOW_NONE);
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-
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- switch (cfg->data_bits)
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- {
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+ switch (cfg->data_bits) {
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case DATA_BITS_8:
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data_bit = USART_DATA_8BITS;
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break;
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@@ -139,8 +109,7 @@ static rt_err_t at32_configure(struct rt_serial_device *serial,
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break;
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}
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- switch (cfg->stop_bits)
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- {
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+ switch (cfg->stop_bits) {
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case STOP_BITS_1:
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stop_bit = USART_STOP_1_BIT;
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break;
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@@ -152,8 +121,7 @@ static rt_err_t at32_configure(struct rt_serial_device *serial,
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break;
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}
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- switch (cfg->parity)
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- {
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+ switch (cfg->parity) {
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case PARITY_NONE:
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parity_mode = USART_PARITY_NONE;
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break;
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@@ -167,107 +135,275 @@ static rt_err_t at32_configure(struct rt_serial_device *serial,
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parity_mode = USART_PARITY_NONE;
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break;
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}
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- usart_parity_selection_config(usart_instance->usart_x, parity_mode);
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- usart_init(usart_instance->usart_x, cfg->baud_rate, data_bit, stop_bit);
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- usart_enable(usart_instance->usart_x, TRUE);
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+
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+ switch (cfg->flowcontrol) {
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+ case RT_SERIAL_FLOWCONTROL_NONE:
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+ flow_control = USART_HARDWARE_FLOW_NONE;
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+ break;
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+ case RT_SERIAL_FLOWCONTROL_CTSRTS:
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+ flow_control = USART_HARDWARE_FLOW_RTS_CTS;
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+ break;
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+ default:
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+ flow_control = USART_HARDWARE_FLOW_NONE;
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+ break;
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+ }
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+#ifdef RT_SERIAL_USING_DMA
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+ if (!(serial->parent.open_flag & RT_DEVICE_OFLAG_OPEN)) {
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+ instance->last_index = serial->config.rx_bufsz;
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+ }
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+#endif
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+ usart_hardware_flow_control_set(instance->uart_x, flow_control);
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+ usart_parity_selection_config(instance->uart_x, parity_mode);
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+ usart_init(instance->uart_x, cfg->baud_rate, data_bit, stop_bit);
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+ usart_enable(instance->uart_x, TRUE);
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return RT_EOK;
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}
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-static rt_err_t at32_control(struct rt_serial_device *serial, int cmd, void *arg)
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-{
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- struct at32_usart *usart;
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+static rt_err_t at32_control(struct rt_serial_device *serial, int cmd, void *arg) {
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+ struct at32_uart *instance;
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rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
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RT_ASSERT(serial != RT_NULL);
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- usart = (struct at32_usart *) serial->parent.user_data;
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- RT_ASSERT(usart != RT_NULL);
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+
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+ instance = rt_container_of(serial, struct at32_uart, serial);
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+ RT_ASSERT(instance != RT_NULL);
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if (ctrl_arg & (RT_DEVICE_FLAG_RX_BLOCKING | RT_DEVICE_FLAG_RX_NON_BLOCKING))
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{
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- ctrl_arg = RT_DEVICE_FLAG_INT_RX;
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+ if (instance->uart_dma_flag & RT_DEVICE_FLAG_DMA_RX)
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+ ctrl_arg = RT_DEVICE_FLAG_DMA_RX;
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+ else
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+ ctrl_arg = RT_DEVICE_FLAG_INT_RX;
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}
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else if (ctrl_arg & (RT_DEVICE_FLAG_TX_BLOCKING | RT_DEVICE_FLAG_TX_NON_BLOCKING))
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{
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- ctrl_arg = RT_DEVICE_FLAG_INT_TX;
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+ if (instance->uart_dma_flag & RT_DEVICE_FLAG_DMA_TX)
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+ ctrl_arg = RT_DEVICE_FLAG_DMA_TX;
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+ else
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+ ctrl_arg = RT_DEVICE_FLAG_INT_TX;
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}
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- switch (cmd)
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- {
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+ switch (cmd) {
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case RT_DEVICE_CTRL_CLR_INT:
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- nvic_irq_disable(usart->irqn);
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+ nvic_irq_disable(instance->irqn);
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if (ctrl_arg == RT_DEVICE_FLAG_INT_RX)
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- usart_interrupt_enable(usart->usart_x, USART_RDBF_INT, FALSE);
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+ usart_interrupt_enable(instance->uart_x, USART_RDBF_INT, FALSE);
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else if (ctrl_arg == RT_DEVICE_FLAG_INT_TX)
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- usart_interrupt_enable(usart->usart_x, USART_TDBE_INT, FALSE);
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+ usart_interrupt_enable(instance->uart_x, USART_TDBE_INT, FALSE);
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+#ifdef RT_SERIAL_USING_DMA
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+ else if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
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+ {
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+ usart_interrupt_enable(instance->uart_x, USART_RDBF_INT, FALSE);
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+ nvic_irq_disable(instance->dma_rx->dma_irqn);
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+ dma_reset(instance->dma_rx->dma_channel);
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+ }
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+ else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX)
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+ {
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+ usart_interrupt_enable(instance->uart_x, USART_TDBE_INT, FALSE);
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+ nvic_irq_disable(instance->dma_tx->dma_irqn);
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+ dma_reset(instance->dma_tx->dma_channel);
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+ }
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+#endif
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break;
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case RT_DEVICE_CTRL_SET_INT:
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- nvic_irq_enable(usart->irqn, 4, 1);
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+ nvic_irq_enable(instance->irqn, 1, 0);
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if (ctrl_arg == RT_DEVICE_FLAG_INT_RX)
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- usart_interrupt_enable(usart->usart_x, USART_RDBF_INT, TRUE);
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+ usart_interrupt_enable(instance->uart_x, USART_RDBF_INT, TRUE);
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else if (ctrl_arg == RT_DEVICE_FLAG_INT_TX)
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- usart_interrupt_enable(usart->usart_x, USART_TDBE_INT, TRUE);
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+ usart_interrupt_enable(instance->uart_x, USART_TDBE_INT, TRUE);
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break;
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case RT_DEVICE_CTRL_CONFIG:
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- at32_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)ctrl_arg);
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+ if(ctrl_arg & (RT_DEVICE_FLAG_DMA_RX | RT_DEVICE_FLAG_DMA_TX))
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+ {
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+#ifdef RT_SERIAL_USING_DMA
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+ at32_dma_config(serial, ctrl_arg);
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+#endif
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+ }
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+ else
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+ at32_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)ctrl_arg);
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break;
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case RT_DEVICE_CHECK_OPTMODE:
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- {
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- return RT_SERIAL_TX_BLOCKING_BUFFER;
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- }
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+ {
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+ if(ctrl_arg & RT_DEVICE_FLAG_DMA_TX)
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+ return RT_SERIAL_TX_BLOCKING_NO_BUFFER;
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+ else
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+ return RT_SERIAL_TX_BLOCKING_BUFFER;
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+ }
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case RT_DEVICE_CTRL_CLOSE:
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- usart_reset(usart->usart_x);
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+ usart_reset(instance->uart_x);
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break;
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}
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return RT_EOK;
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}
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-static int at32_putc(struct rt_serial_device *serial, char ch)
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-{
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- struct at32_usart *usart;
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+static int at32_putc(struct rt_serial_device *serial, char ch) {
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+ struct at32_uart *instance;
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RT_ASSERT(serial != RT_NULL);
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- usart = (struct at32_usart *) serial->parent.user_data;
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- RT_ASSERT(usart != RT_NULL);
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- usart_data_transmit(usart->usart_x, (uint8_t)ch);
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- while (usart_flag_get(usart->usart_x, USART_TDC_FLAG) == RESET);
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+ instance = rt_container_of(serial, struct at32_uart, serial);
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+ RT_ASSERT(instance != RT_NULL);
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+
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+ usart_data_transmit(instance->uart_x, (uint8_t)ch);
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+ while (usart_flag_get(instance->uart_x, USART_TDC_FLAG) == RESET);
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return 1;
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}
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-static int at32_getc(struct rt_serial_device *serial)
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-{
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+static int at32_getc(struct rt_serial_device *serial) {
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int ch;
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- struct at32_usart *usart;
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+ struct at32_uart *instance;
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RT_ASSERT(serial != RT_NULL);
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- usart = (struct at32_usart *) serial->parent.user_data;
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- RT_ASSERT(usart != RT_NULL);
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+
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+ instance = rt_container_of(serial, struct at32_uart, serial);
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+ RT_ASSERT(instance != RT_NULL);
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ch = -1;
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- if (usart_flag_get(usart->usart_x, USART_RDBF_FLAG) != RESET)
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- {
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- ch = usart_data_receive(usart->usart_x) & 0xff;
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+ if (usart_flag_get(instance->uart_x, USART_RDBF_FLAG) != RESET) {
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+ ch = usart_data_receive(instance->uart_x) & 0xff;
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}
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return ch;
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}
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+#ifdef RT_SERIAL_USING_DMA
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+static void _uart_dma_receive(struct at32_uart *instance, rt_uint8_t *buffer, rt_uint32_t size)
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+{
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+ dma_channel_type* dma_channel = instance->dma_rx->dma_channel;
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+
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+ dma_channel->dtcnt = size;
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+ dma_channel->paddr = (rt_uint32_t)&(instance->uart_x->dt);
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+ dma_channel->maddr = (rt_uint32_t)buffer;
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+ /* enable usart interrupt */
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+ usart_interrupt_enable(instance->uart_x, USART_PERR_INT, TRUE);
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+ usart_interrupt_enable(instance->uart_x, USART_IDLE_INT, TRUE);
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+ /* enable transmit complete interrupt */
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+ dma_interrupt_enable(dma_channel, DMA_FDT_INT, TRUE);
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+
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+ /* enable dma receive */
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+ usart_dma_receiver_enable(instance->uart_x, TRUE);
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+
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+ /* enable dma channel */
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+ dma_channel_enable(dma_channel, TRUE);
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+}
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+
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+static void _uart_dma_transmit(struct at32_uart *instance, rt_uint8_t *buffer, rt_uint32_t size)
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+{
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+ /* wait before transfer complete */
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+ while(instance->dma_tx->dma_done == RT_FALSE);
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+
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+ dma_channel_type *dma_channel = instance->dma_tx->dma_channel;
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+
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+ dma_channel->dtcnt = size;
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+ dma_channel->paddr = (rt_uint32_t)&(instance->uart_x->dt);
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+ dma_channel->maddr = (rt_uint32_t)buffer;
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+
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+ /* enable transmit complete interrupt */
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+ dma_interrupt_enable(dma_channel, DMA_FDT_INT, TRUE);
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+ /* enable dma transmit */
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+ usart_dma_transmitter_enable(instance->uart_x, TRUE);
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+
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+ /* mark dma flag */
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+ instance->dma_tx->dma_done = RT_FALSE;
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+ /* enable dma channel */
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+ dma_channel_enable(dma_channel, TRUE);
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+}
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+
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+static void at32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
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+{
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+ dma_init_type dma_init_struct;
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+ dma_channel_type *dma_channel = NULL;
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+ struct rt_serial_rx_fifo *rx_fifo;
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+ struct at32_uart *instance;
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+ struct dma_config *dma_config;
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+
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+ RT_ASSERT(serial != RT_NULL);
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+
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+ instance = rt_container_of(serial, struct at32_uart, serial);
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+ RT_ASSERT(instance != RT_NULL);
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+
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+ RT_ASSERT(flag == RT_DEVICE_FLAG_DMA_TX || flag == RT_DEVICE_FLAG_DMA_RX);
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+
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+ if (RT_DEVICE_FLAG_DMA_RX == flag)
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+ {
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+ dma_channel = instance->dma_rx->dma_channel;
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+ dma_config = instance->dma_rx;
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+ }
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+ else /* RT_DEVICE_FLAG_DMA_TX == flag */
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+ {
|
|
|
+ dma_channel = instance->dma_tx->dma_channel;
|
|
|
+ dma_config = instance->dma_tx;
|
|
|
+ }
|
|
|
+
|
|
|
+ crm_periph_clock_enable(dma_config->dma_clock, TRUE);
|
|
|
+ dma_default_para_init(&dma_init_struct);
|
|
|
+ dma_init_struct.peripheral_inc_enable = FALSE;
|
|
|
+ dma_init_struct.memory_inc_enable = TRUE;
|
|
|
+ dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
|
|
|
+ dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
|
|
|
+ dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
|
|
|
+
|
|
|
+ if (RT_DEVICE_FLAG_DMA_RX == flag)
|
|
|
+ {
|
|
|
+ dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
|
|
+ dma_init_struct.loop_mode_enable = TRUE;
|
|
|
+ }
|
|
|
+ else if (RT_DEVICE_FLAG_DMA_TX == flag)
|
|
|
+ {
|
|
|
+ dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
|
|
|
+ dma_init_struct.loop_mode_enable = FALSE;
|
|
|
+ }
|
|
|
+
|
|
|
+ dma_reset(dma_channel);
|
|
|
+ dma_init(dma_channel, &dma_init_struct);
|
|
|
+#if defined (SOC_SERIES_AT32F425)
|
|
|
+ dma_flexible_config(dma_config->dma_x, dma_config->flex_channel, \
|
|
|
+ (dma_flexible_request_type)dma_config->request_id);
|
|
|
+#endif
|
|
|
+#if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
|
|
|
+ defined (SOC_SERIES_AT32F423)
|
|
|
+ dmamux_enable(dma_config->dma_x, TRUE);
|
|
|
+ dmamux_init(dma_config->dmamux_channel, (dmamux_requst_id_sel_type)dma_config->request_id);
|
|
|
+#endif
|
|
|
+ /* enable interrupt */
|
|
|
+ if (flag == RT_DEVICE_FLAG_DMA_RX)
|
|
|
+ {
|
|
|
+ rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
|
|
|
+ /* start dma transfer */
|
|
|
+ _uart_dma_receive(instance, rx_fifo->buffer, serial->config.rx_bufsz);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* dma irq should set in dma tx mode */
|
|
|
+ nvic_irq_enable(dma_config->dma_irqn, 0, 0);
|
|
|
+ nvic_irq_enable(instance->irqn, 1, 0);
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
static rt_size_t at32_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, rt_uint32_t tx_flag)
|
|
|
{
|
|
|
+ struct at32_uart *instance;
|
|
|
+
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
RT_ASSERT(buf != RT_NULL);
|
|
|
|
|
|
- at32_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)tx_flag);
|
|
|
+ instance = rt_container_of(serial, struct at32_uart, serial);
|
|
|
+ RT_ASSERT(instance != RT_NULL);
|
|
|
|
|
|
+ if(instance->uart_dma_flag & RT_DEVICE_FLAG_DMA_TX)
|
|
|
+ {
|
|
|
+ _uart_dma_transmit(instance, buf, size);
|
|
|
+ return size;
|
|
|
+ }
|
|
|
+
|
|
|
+ at32_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)tx_flag);
|
|
|
return size;
|
|
|
}
|
|
|
|
|
|
-static const struct rt_uart_ops at32_usart_ops =
|
|
|
-{
|
|
|
+static const struct rt_uart_ops at32_uart_ops = {
|
|
|
at32_configure,
|
|
|
at32_control,
|
|
|
at32_putc,
|
|
@@ -275,173 +411,666 @@ static const struct rt_uart_ops at32_usart_ops =
|
|
|
at32_transmit
|
|
|
};
|
|
|
|
|
|
-static void usart_isr(struct rt_serial_device *serial)
|
|
|
+#ifdef RT_SERIAL_USING_DMA
|
|
|
+void dma_rx_isr(struct rt_serial_device *serial)
|
|
|
{
|
|
|
- struct at32_usart *usart_instance;
|
|
|
+ volatile rt_uint32_t reg_sts = 0, index = 0;
|
|
|
+ rt_size_t recv_len = 0, counter = 0;
|
|
|
+ struct at32_uart *instance;
|
|
|
+ RT_ASSERT(serial != RT_NULL);
|
|
|
+
|
|
|
+ instance = rt_container_of(serial, struct at32_uart, serial);
|
|
|
+ RT_ASSERT(instance != RT_NULL);
|
|
|
+
|
|
|
+ index = instance->dma_rx->channel_index;
|
|
|
+
|
|
|
+ /* clear dma flag */
|
|
|
+ instance->dma_rx->dma_x->clr |= (rt_uint32_t)(DMA_FDT_FLAG << (4 * (index - 1))) | (DMA_HDT_FLAG << (4 * (index - 1)));
|
|
|
|
|
|
+ counter = dma_data_number_get(instance->dma_rx->dma_channel);
|
|
|
+ if (counter <= instance->last_index)
|
|
|
+ recv_len = instance->last_index - counter;
|
|
|
+ else
|
|
|
+ recv_len = serial->config.rx_bufsz + instance->last_index - counter;
|
|
|
+
|
|
|
+ if (recv_len)
|
|
|
+ {
|
|
|
+ instance->last_index = counter;
|
|
|
+ rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+void dma_tx_isr(struct rt_serial_device *serial)
|
|
|
+{
|
|
|
+ volatile rt_uint32_t reg_sts = 0, index = 0;
|
|
|
+ rt_size_t trans_total_index;
|
|
|
+ struct at32_uart *instance;
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
|
|
- usart_instance = (struct at32_usart *) serial->parent.user_data;
|
|
|
- RT_ASSERT(usart_instance != RT_NULL);
|
|
|
+ instance = rt_container_of(serial, struct at32_uart, serial);
|
|
|
+ RT_ASSERT(instance != RT_NULL);
|
|
|
+
|
|
|
+ reg_sts = instance->dma_tx->dma_x->sts;
|
|
|
+ index = instance->dma_tx->channel_index;
|
|
|
|
|
|
- if (usart_flag_get(usart_instance->usart_x, USART_RDBF_FLAG) != RESET)
|
|
|
+ if ((reg_sts & (DMA_FDT_FLAG << (4 * (index - 1)))) != RESET)
|
|
|
+ {
|
|
|
+ /* mark dma flag */
|
|
|
+ instance->dma_tx->dma_done = RT_TRUE;
|
|
|
+ /* clear dma flag */
|
|
|
+ instance->dma_tx->dma_x->clr |= (rt_uint32_t)(DMA_FDT_FLAG << (4 * (index - 1)));
|
|
|
+ /* disable dma tx channel */
|
|
|
+ dma_channel_enable(instance->dma_tx->dma_channel, FALSE);
|
|
|
+
|
|
|
+ trans_total_index = dma_data_number_get(instance->dma_tx->dma_channel);
|
|
|
+
|
|
|
+ if (trans_total_index == 0)
|
|
|
+ {
|
|
|
+ rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DMADONE);
|
|
|
+ }
|
|
|
+ }
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
+static void usart_isr(struct rt_serial_device *serial)
|
|
|
+{
|
|
|
+ struct at32_uart *instance;
|
|
|
+ RT_ASSERT(serial != RT_NULL);
|
|
|
+
|
|
|
+ instance = rt_container_of(serial, struct at32_uart, serial);
|
|
|
+ RT_ASSERT(instance != RT_NULL);
|
|
|
+
|
|
|
+ if (usart_flag_get(instance->uart_x, USART_RDBF_FLAG) != RESET)
|
|
|
{
|
|
|
struct rt_serial_rx_fifo *rx_fifo;
|
|
|
rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
|
|
|
RT_ASSERT(rx_fifo != RT_NULL);
|
|
|
|
|
|
- rt_ringbuffer_putchar(&(rx_fifo->rb), usart_data_receive(usart_instance->usart_x));
|
|
|
+ rt_ringbuffer_putchar(&(rx_fifo->rb), usart_data_receive(instance->uart_x));
|
|
|
|
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
|
|
}
|
|
|
- else
|
|
|
+ else if ((usart_flag_get(instance->uart_x, USART_TDBE_FLAG) != RESET) && (instance->uart_x->ctrl1_bit.tdbeien))
|
|
|
{
|
|
|
- if ((usart_flag_get(usart_instance->usart_x, USART_TDBE_FLAG) != RESET) && usart_instance->usart_x->ctrl1_bit.tdbeien)
|
|
|
+ struct rt_serial_tx_fifo *tx_fifo;
|
|
|
+ tx_fifo = (struct rt_serial_tx_fifo *) serial->serial_tx;
|
|
|
+ RT_ASSERT(tx_fifo != RT_NULL);
|
|
|
+
|
|
|
+ rt_uint8_t put_char = 0;
|
|
|
+ if (rt_ringbuffer_getchar(&(tx_fifo->rb), &put_char))
|
|
|
{
|
|
|
- struct rt_serial_tx_fifo *tx_fifo;
|
|
|
- tx_fifo = (struct rt_serial_tx_fifo *) serial->serial_tx;
|
|
|
- RT_ASSERT(tx_fifo != RT_NULL);
|
|
|
-
|
|
|
- rt_uint8_t put_char = 0;
|
|
|
- if (rt_ringbuffer_getchar(&(tx_fifo->rb), &put_char))
|
|
|
- {
|
|
|
- usart_data_transmit(usart_instance->usart_x, put_char);
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- usart_interrupt_enable(usart_instance->usart_x, USART_TDBE_INT, FALSE);
|
|
|
- usart_interrupt_enable(usart_instance->usart_x, USART_TDC_INT, TRUE);
|
|
|
- }
|
|
|
- usart_flag_clear(usart_instance->usart_x, USART_TDBE_FLAG);
|
|
|
+ usart_data_transmit(instance->uart_x, put_char);
|
|
|
}
|
|
|
- else if (usart_flag_get(usart_instance->usart_x, USART_TDC_FLAG) != RESET)
|
|
|
+ else
|
|
|
{
|
|
|
+ usart_interrupt_enable(instance->uart_x, USART_TDBE_INT, FALSE);
|
|
|
+ usart_interrupt_enable(instance->uart_x, USART_TDC_INT, TRUE);
|
|
|
+ }
|
|
|
+ usart_flag_clear(instance->uart_x, USART_TDBE_FLAG);
|
|
|
+ }
|
|
|
+ else if ((usart_flag_get(instance->uart_x, USART_TDC_FLAG) != RESET) && (instance->uart_x->ctrl1_bit.tdcien))
|
|
|
+ {
|
|
|
+ usart_interrupt_enable(instance->uart_x, USART_TDC_INT, FALSE);
|
|
|
+
|
|
|
+ rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
|
|
|
|
|
|
- usart_interrupt_enable(usart_instance->usart_x, USART_TDC_INT, FALSE);
|
|
|
+ usart_flag_clear(instance->uart_x, USART_TDC_FLAG);
|
|
|
+ }
|
|
|
+#ifdef RT_SERIAL_USING_DMA
|
|
|
+ else if ((usart_flag_get(instance->uart_x, USART_IDLEF_FLAG) != RESET) && (instance->uart_dma_flag) && \
|
|
|
+ (instance->uart_x->ctrl1_bit.idleien))
|
|
|
+ {
|
|
|
+ dma_rx_isr(serial);
|
|
|
+ /* clear idle flag */
|
|
|
+ usart_data_receive(instance->uart_x);
|
|
|
+ }
|
|
|
+#endif
|
|
|
+ else
|
|
|
+ {
|
|
|
+ if (usart_flag_get(instance->uart_x, USART_ROERR_FLAG) != RESET)
|
|
|
+ {
|
|
|
+ usart_flag_clear(instance->uart_x, USART_ROERR_FLAG);
|
|
|
+ }
|
|
|
|
|
|
- rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
|
|
|
+ if (usart_flag_get(instance->uart_x, USART_NERR_FLAG) != RESET)
|
|
|
+ {
|
|
|
+ usart_flag_clear(instance->uart_x, USART_NERR_FLAG);
|
|
|
+ }
|
|
|
|
|
|
- usart_flag_clear(usart_instance->usart_x, USART_TDC_FLAG);
|
|
|
+ if (usart_flag_get(instance->uart_x, USART_FERR_FLAG) != RESET)
|
|
|
+ {
|
|
|
+ usart_flag_clear(instance->uart_x, USART_FERR_FLAG);
|
|
|
}
|
|
|
- if (usart_flag_get(usart_instance->usart_x, USART_CTSCF_FLAG) != RESET)
|
|
|
+
|
|
|
+ if (usart_flag_get(instance->uart_x, USART_PERR_FLAG) != RESET)
|
|
|
{
|
|
|
- usart_flag_clear(usart_instance->usart_x, USART_CTSCF_FLAG);
|
|
|
+ usart_flag_clear(instance->uart_x, USART_PERR_FLAG);
|
|
|
}
|
|
|
|
|
|
- if (usart_flag_get(usart_instance->usart_x, USART_BFF_FLAG) != RESET)
|
|
|
+ if (usart_flag_get(instance->uart_x, USART_CTSCF_FLAG) != RESET)
|
|
|
{
|
|
|
- usart_flag_clear(usart_instance->usart_x, USART_BFF_FLAG);
|
|
|
+ usart_flag_clear(instance->uart_x, USART_CTSCF_FLAG);
|
|
|
}
|
|
|
|
|
|
+ if (usart_flag_get(instance->uart_x, USART_BFF_FLAG) != RESET)
|
|
|
+ {
|
|
|
+ usart_flag_clear(instance->uart_x, USART_BFF_FLAG);
|
|
|
+ }
|
|
|
}
|
|
|
}
|
|
|
|
|
|
#ifdef BSP_USING_UART1
|
|
|
-void USART1_IRQHandler(void)
|
|
|
+void UART1_IRQHandler(void) {
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ usart_isr(&uart_config[UART1_INDEX].serial);
|
|
|
+
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
|
|
|
+void UART1_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ dma_rx_isr(&uart_config[UART1_INDEX].serial);
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
|
|
|
+void UART1_TX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
+ /* enter interrupt */
|
|
|
rt_interrupt_enter();
|
|
|
|
|
|
- usart_isr(&usart_config[UART1_INDEX].serial);
|
|
|
+ dma_tx_isr(&uart_config[UART1_INDEX].serial);
|
|
|
|
|
|
+ /* leave interrupt */
|
|
|
rt_interrupt_leave();
|
|
|
}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
|
|
|
#endif
|
|
|
#ifdef BSP_USING_UART2
|
|
|
-void USART2_IRQHandler(void)
|
|
|
+void UART2_IRQHandler(void) {
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ usart_isr(&uart_config[UART2_INDEX].serial);
|
|
|
+
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
|
|
|
+void UART2_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ dma_rx_isr(&uart_config[UART2_INDEX].serial);
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
|
|
|
+void UART2_TX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
+ /* enter interrupt */
|
|
|
rt_interrupt_enter();
|
|
|
|
|
|
- usart_isr(&usart_config[UART2_INDEX].serial);
|
|
|
+ dma_tx_isr(&uart_config[UART2_INDEX].serial);
|
|
|
|
|
|
+ /* leave interrupt */
|
|
|
rt_interrupt_leave();
|
|
|
}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
|
|
|
#endif
|
|
|
#ifdef BSP_USING_UART3
|
|
|
-void USART3_IRQHandler(void)
|
|
|
+void UART3_IRQHandler(void) {
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ usart_isr(&uart_config[UART3_INDEX].serial);
|
|
|
+
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
|
|
|
+void UART3_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ dma_rx_isr(&uart_config[UART3_INDEX].serial);
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA) */
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
|
|
|
+void UART3_TX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
+ /* enter interrupt */
|
|
|
rt_interrupt_enter();
|
|
|
|
|
|
- usart_isr(&usart_config[UART3_INDEX].serial);
|
|
|
+ dma_tx_isr(&uart_config[UART3_INDEX].serial);
|
|
|
|
|
|
+ /* leave interrupt */
|
|
|
rt_interrupt_leave();
|
|
|
}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA) */
|
|
|
#endif
|
|
|
#ifdef BSP_USING_UART4
|
|
|
-void UART4_IRQHandler(void)
|
|
|
+void UART4_IRQHandler(void) {
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ usart_isr(&uart_config[UART4_INDEX].serial);
|
|
|
+
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
|
|
|
+void UART4_RX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
+ /* enter interrupt */
|
|
|
rt_interrupt_enter();
|
|
|
|
|
|
- usart_isr(&usart_config[UART4_INDEX].serial);
|
|
|
+ dma_rx_isr(&uart_config[UART4_INDEX].serial);
|
|
|
|
|
|
+ /* leave interrupt */
|
|
|
rt_interrupt_leave();
|
|
|
}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA) */
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
|
|
|
+void UART4_TX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ dma_tx_isr(&uart_config[UART4_INDEX].serial);
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART14_TX_USING_DMA) */
|
|
|
#endif
|
|
|
#ifdef BSP_USING_UART5
|
|
|
-void UART5_IRQHandler(void)
|
|
|
+void UART5_IRQHandler(void) {
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ usart_isr(&uart_config[UART5_INDEX].serial);
|
|
|
+
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
|
|
|
+void UART5_RX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
+ /* enter interrupt */
|
|
|
rt_interrupt_enter();
|
|
|
|
|
|
- usart_isr(&usart_config[UART5_INDEX].serial);
|
|
|
+ dma_rx_isr(&uart_config[UART5_INDEX].serial);
|
|
|
|
|
|
+ /* leave interrupt */
|
|
|
rt_interrupt_leave();
|
|
|
}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
|
|
|
+void UART5_TX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ dma_tx_isr(&uart_config[UART5_INDEX].serial);
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
|
|
|
#endif
|
|
|
#ifdef BSP_USING_UART6
|
|
|
-void USART6_IRQHandler(void)
|
|
|
+void UART6_IRQHandler(void) {
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ usart_isr(&uart_config[UART6_INDEX].serial);
|
|
|
+
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)
|
|
|
+void UART6_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ dma_rx_isr(&uart_config[UART6_INDEX].serial);
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
|
|
|
+void UART6_TX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
+ /* enter interrupt */
|
|
|
rt_interrupt_enter();
|
|
|
|
|
|
- usart_isr(&usart_config[UART6_INDEX].serial);
|
|
|
+ dma_tx_isr(&uart_config[UART6_INDEX].serial);
|
|
|
|
|
|
+ /* leave interrupt */
|
|
|
rt_interrupt_leave();
|
|
|
}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
|
|
|
#endif
|
|
|
#ifdef BSP_USING_UART7
|
|
|
-void UART7_IRQHandler(void)
|
|
|
+void UART7_IRQHandler(void) {
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ usart_isr(&uart_config[UART7_INDEX].serial);
|
|
|
+
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA)
|
|
|
+void UART7_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ dma_rx_isr(&uart_config[UART7_INDEX].serial);
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA) */
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA)
|
|
|
+void UART7_TX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
+ /* enter interrupt */
|
|
|
rt_interrupt_enter();
|
|
|
|
|
|
- usart_isr(&usart_config[UART7_INDEX].serial);
|
|
|
+ dma_tx_isr(&uart_config[UART7_INDEX].serial);
|
|
|
|
|
|
+ /* leave interrupt */
|
|
|
rt_interrupt_leave();
|
|
|
}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA) */
|
|
|
#endif
|
|
|
#ifdef BSP_USING_UART8
|
|
|
-void UART8_IRQHandler(void)
|
|
|
+void UART8_IRQHandler(void) {
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ usart_isr(&uart_config[UART8_INDEX].serial);
|
|
|
+
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA)
|
|
|
+void UART8_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ dma_rx_isr(&uart_config[UART8_INDEX].serial);
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA) */
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA)
|
|
|
+void UART8_TX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
+ /* enter interrupt */
|
|
|
rt_interrupt_enter();
|
|
|
|
|
|
- usart_isr(&usart_config[UART8_INDEX].serial);
|
|
|
+ dma_tx_isr(&uart_config[UART8_INDEX].serial);
|
|
|
|
|
|
+ /* leave interrupt */
|
|
|
rt_interrupt_leave();
|
|
|
}
|
|
|
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA) */
|
|
|
#endif
|
|
|
|
|
|
-int rt_hw_usart_init(void)
|
|
|
+#if defined (SOC_SERIES_AT32F421)
|
|
|
+void UART1_TX_RX_DMA_IRQHandler(void)
|
|
|
{
|
|
|
- rt_size_t obj_num;
|
|
|
- int index;
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
|
|
|
+ UART1_TX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
|
|
|
+ UART1_RX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+}
|
|
|
+
|
|
|
+void UART2_TX_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
|
|
|
+ UART2_TX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
|
|
|
+ UART2_RX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined (SOC_SERIES_AT32F425)
|
|
|
+#if defined(BSP_USING_UART3) || defined(BSP_USING_UART4)
|
|
|
+void USART4_3_IRQHandler(void)
|
|
|
+{
|
|
|
+#if defined(BSP_USING_UART3)
|
|
|
+ UART3_IRQHandler();
|
|
|
+#endif
|
|
|
+#if defined(BSP_USING_UART4)
|
|
|
+ UART4_IRQHandler();
|
|
|
+#endif
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
+void UART1_TX_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
|
|
|
+ UART1_TX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
|
|
|
+ UART1_RX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+}
|
|
|
|
|
|
- obj_num = sizeof(usart_config) / sizeof(struct at32_usart);
|
|
|
+void UART3_2_TX_RX_DMA_IRQHandler(void)
|
|
|
+{
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
|
|
|
+ UART2_TX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
|
|
|
+ UART2_RX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
|
|
|
+ UART3_TX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
|
|
|
+ UART3_RX_DMA_IRQHandler();
|
|
|
+#endif
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined (RT_SERIAL_USING_DMA)
|
|
|
+static void _dma_base_channel_check(struct at32_uart *instance)
|
|
|
+{
|
|
|
+ dma_channel_type *rx_channel = instance->dma_rx->dma_channel;
|
|
|
+ dma_channel_type *tx_channel = instance->dma_tx->dma_channel;
|
|
|
+
|
|
|
+ instance->dma_rx->dma_done = RT_TRUE;
|
|
|
+ instance->dma_rx->dma_x = (dma_type *)((rt_uint32_t)rx_channel & ~0xFF);
|
|
|
+ instance->dma_rx->channel_index = ((((rt_uint32_t)rx_channel & 0xFF) - 8) / 0x14) + 1;
|
|
|
+
|
|
|
+ instance->dma_tx->dma_done = RT_TRUE;
|
|
|
+ instance->dma_tx->dma_x = (dma_type *)((rt_uint32_t)tx_channel & ~0xFF);
|
|
|
+ instance->dma_tx->channel_index = ((((rt_uint32_t)tx_channel & 0xFF) - 8) / 0x14) + 1;
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
+static void at32_uart_get_config(void)
|
|
|
+{
|
|
|
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART1
|
|
|
+ uart_config[UART1_INDEX].uart_dma_flag = 0;
|
|
|
+ uart_config[UART1_INDEX].serial.config = config;
|
|
|
+ uart_config[UART1_INDEX].serial.config.rx_bufsz = BSP_UART1_RX_BUFSIZE;
|
|
|
+ uart_config[UART1_INDEX].serial.config.tx_bufsz = BSP_UART1_TX_BUFSIZE;
|
|
|
+#ifdef BSP_UART1_RX_USING_DMA
|
|
|
+ uart_config[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart1_dma_rx = UART1_RX_DMA_CONFIG;
|
|
|
+ uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
|
|
|
+#endif
|
|
|
+#ifdef BSP_UART1_TX_USING_DMA
|
|
|
+ uart_config[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart1_dma_tx = UART1_TX_DMA_CONFIG;
|
|
|
+ uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART2
|
|
|
+ uart_config[UART2_INDEX].uart_dma_flag = 0;
|
|
|
+ uart_config[UART2_INDEX].serial.config = config;
|
|
|
+ uart_config[UART2_INDEX].serial.config.rx_bufsz = BSP_UART2_RX_BUFSIZE;
|
|
|
+ uart_config[UART2_INDEX].serial.config.tx_bufsz = BSP_UART2_TX_BUFSIZE;
|
|
|
+#ifdef BSP_UART2_RX_USING_DMA
|
|
|
+ uart_config[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart2_dma_rx = UART2_RX_DMA_CONFIG;
|
|
|
+ uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
|
|
|
+#endif
|
|
|
+#ifdef BSP_UART2_TX_USING_DMA
|
|
|
+ uart_config[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart2_dma_tx = UART2_TX_DMA_CONFIG;
|
|
|
+ uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART3
|
|
|
+ uart_config[UART3_INDEX].uart_dma_flag = 0;
|
|
|
+ uart_config[UART3_INDEX].serial.config = config;
|
|
|
+ uart_config[UART3_INDEX].serial.config.rx_bufsz = BSP_UART3_RX_BUFSIZE;
|
|
|
+ uart_config[UART3_INDEX].serial.config.tx_bufsz = BSP_UART3_TX_BUFSIZE;
|
|
|
+#ifdef BSP_UART3_RX_USING_DMA
|
|
|
+ uart_config[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart3_dma_rx = UART3_RX_DMA_CONFIG;
|
|
|
+ uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
|
|
|
+#endif
|
|
|
+#ifdef BSP_UART3_TX_USING_DMA
|
|
|
+ uart_config[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart3_dma_tx = UART3_TX_DMA_CONFIG;
|
|
|
+ uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART4
|
|
|
+ uart_config[UART4_INDEX].uart_dma_flag = 0;
|
|
|
+ uart_config[UART4_INDEX].serial.config = config;
|
|
|
+ uart_config[UART4_INDEX].serial.config.rx_bufsz = BSP_UART4_RX_BUFSIZE;
|
|
|
+ uart_config[UART4_INDEX].serial.config.tx_bufsz = BSP_UART4_TX_BUFSIZE;
|
|
|
+#ifdef BSP_UART4_RX_USING_DMA
|
|
|
+ uart_config[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart4_dma_rx = UART4_RX_DMA_CONFIG;
|
|
|
+ uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
|
|
|
+#endif
|
|
|
+#ifdef BSP_UART4_TX_USING_DMA
|
|
|
+ uart_config[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart4_dma_tx = UART4_TX_DMA_CONFIG;
|
|
|
+ uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART5
|
|
|
+ uart_config[UART5_INDEX].uart_dma_flag = 0;
|
|
|
+ uart_config[UART5_INDEX].serial.config = config;
|
|
|
+ uart_config[UART5_INDEX].serial.config.rx_bufsz = BSP_UART5_RX_BUFSIZE;
|
|
|
+ uart_config[UART5_INDEX].serial.config.tx_bufsz = BSP_UART5_TX_BUFSIZE;
|
|
|
+#ifdef BSP_UART5_RX_USING_DMA
|
|
|
+ uart_config[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
|
|
+ static struct dma_config uart5_dma_rx = UART5_RX_DMA_CONFIG;
|
|
|
+ uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
|
|
|
+#endif
|
|
|
+#ifdef BSP_UART5_TX_USING_DMA
|
|
|
+ uart_config[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
|
|
+ static struct dma_config uart5_dma_tx = UART5_TX_DMA_CONFIG;
|
|
|
+ uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
|
|
|
+#endif
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef BSP_USING_UART6
|
|
|
+ uart_config[UART6_INDEX].uart_dma_flag = 0;
|
|
|
+ uart_config[UART6_INDEX].serial.config = config;
|
|
|
+ uart_config[UART6_INDEX].serial.config.rx_bufsz = BSP_UART6_RX_BUFSIZE;
|
|
|
+ uart_config[UART6_INDEX].serial.config.tx_bufsz = BSP_UART6_TX_BUFSIZE;
|
|
|
+#ifdef BSP_UART6_RX_USING_DMA
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+ uart_config[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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+ static struct dma_config uart6_dma_rx = UART6_RX_DMA_CONFIG;
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+ uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
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+#endif
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+#ifdef BSP_UART6_TX_USING_DMA
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+ uart_config[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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+ static struct dma_config uart6_dma_tx = UART6_TX_DMA_CONFIG;
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+ uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
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+#endif
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+#endif
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+
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+#ifdef BSP_USING_UART7
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+ uart_config[UART7_INDEX].uart_dma_flag = 0;
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+ uart_config[UART7_INDEX].serial.config = config;
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+ uart_config[UART7_INDEX].serial.config.rx_bufsz = BSP_UART7_RX_BUFSIZE;
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+ uart_config[UART7_INDEX].serial.config.tx_bufsz = BSP_UART7_TX_BUFSIZE;
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+#ifdef BSP_UART7_RX_USING_DMA
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+ uart_config[UART7_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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+ static struct dma_config uart7_dma_rx = UART7_RX_DMA_CONFIG;
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+ uart_config[UART7_INDEX].dma_rx = &uart7_dma_rx;
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+#endif
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+#ifdef BSP_UART7_TX_USING_DMA
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+ uart_config[UART7_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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+ static struct dma_config uart7_dma_tx = UART7_TX_DMA_CONFIG;
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+ uart_config[UART7_INDEX].dma_tx = &uart7_dma_tx;
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+#endif
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+#endif
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+
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+#ifdef BSP_USING_UART8
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+ uart_config[UART8_INDEX].uart_dma_flag = 0;
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+ uart_config[UART8_INDEX].serial.config = config;
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+ uart_config[UART8_INDEX].serial.config.rx_bufsz = BSP_UART8_RX_BUFSIZE;
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+ uart_config[UART8_INDEX].serial.config.tx_bufsz = BSP_UART8_TX_BUFSIZE;
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+#ifdef BSP_UART8_RX_USING_DMA
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+ uart_config[UART8_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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+ static struct dma_config uart8_dma_rx = UART8_RX_DMA_CONFIG;
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+ uart_config[UART8_INDEX].dma_rx = &uart8_dma_rx;
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+#endif
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+#ifdef BSP_UART8_TX_USING_DMA
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+ uart_config[UART8_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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+ static struct dma_config uart8_dma_tx = UART8_TX_DMA_CONFIG;
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+ uart_config[UART8_INDEX].dma_tx = &uart8_dma_tx;
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+#endif
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+#endif
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+}
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+
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+int rt_hw_usart_init(void) {
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+ rt_size_t obj_num;
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+ int index;
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rt_err_t result = 0;
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- for (index = 0; index < obj_num; index++)
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- {
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- usart_config[index].serial.config = config;
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- usart_config[index].serial.ops = &at32_usart_ops;
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+ obj_num = sizeof(uart_config) / sizeof(struct at32_uart);
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+ at32_uart_get_config();
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+ for (index = 0; index < obj_num; index++) {
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+ uart_config[index].serial.ops = &at32_uart_ops;
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+#if defined (RT_SERIAL_USING_DMA)
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+ /* search dma base and channel index */
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+ _dma_base_channel_check(&uart_config[index]);
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+#endif
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/* register uart device */
|
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- result = rt_hw_serial_register(&usart_config[index].serial,
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- usart_config[index].name,
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|
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- RT_DEVICE_FLAG_RDWR |
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- RT_DEVICE_FLAG_INT_RX |
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|
- RT_DEVICE_FLAG_INT_TX,
|
|
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- &usart_config[index]);
|
|
|
+ result = rt_hw_serial_register(&uart_config[index].serial,
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|
|
+ uart_config[index].name,
|
|
|
+ RT_DEVICE_FLAG_RDWR,
|
|
|
+ &uart_config[index]);
|
|
|
RT_ASSERT(result == RT_EOK);
|
|
|
}
|
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|
|
|
|
return result;
|
|
|
}
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-#endif /* RT_USING_SERIAL_V2 */
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|
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+#endif /* BSP_USING_SERIAL_V2 */
|