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@@ -26,7 +26,6 @@
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#define CHECKSUM_BY_HARDWARE
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#define CHECKSUM_BY_HARDWARE
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#define MII_MODE /* MII mode for STM3210C-EVAL Board (MB784) (check jumpers setting) */
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#define MII_MODE /* MII mode for STM3210C-EVAL Board (MB784) (check jumpers setting) */
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//#define RMII_MODE /* RMII mode for STM3210C-EVAL Board (MB784) (check jumpers setting) */
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//#define RMII_MODE /* RMII mode for STM3210C-EVAL Board (MB784) (check jumpers setting) */
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-#define PHY_ADDRESS 0x01 /* Relative to STM3210C-EVAL Board */
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/** @addtogroup STM32_ETH_Driver
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/** @addtogroup STM32_ETH_Driver
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@@ -134,17 +133,17 @@ void ETH_DeInit(void)
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* parameters in the ETH_InitStruct .
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* parameters in the ETH_InitStruct .
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* @param ETH_InitStruct: pointer to a ETH_InitTypeDef structure that contains
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* @param ETH_InitStruct: pointer to a ETH_InitTypeDef structure that contains
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* the configuration information for the specified ETHERNET peripheral.
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* the configuration information for the specified ETHERNET peripheral.
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- * @param PHYAddress: external PHY address
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* @retval ETH_ERROR: Ethernet initialization failed
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* @retval ETH_ERROR: Ethernet initialization failed
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* ETH_SUCCESS: Ethernet successfully initialized
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* ETH_SUCCESS: Ethernet successfully initialized
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*/
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*/
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-uint32_t ETH_Init(ETH_InitTypeDef* ETH_InitStruct, uint16_t PHYAddress)
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+uint32_t ETH_Init(ETH_InitTypeDef* ETH_InitStruct)
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{
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{
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- uint32_t RegValue = 0, tmpreg = 0;
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+ uint32_t tmpreg = 0;
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__IO uint32_t i = 0;
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__IO uint32_t i = 0;
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RCC_ClocksTypeDef rcc_clocks;
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RCC_ClocksTypeDef rcc_clocks;
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uint32_t hclk = 60000000;
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uint32_t hclk = 60000000;
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__IO uint32_t timeout = 0;
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__IO uint32_t timeout = 0;
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+
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/* Check the parameters */
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/* Check the parameters */
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/* MAC --------------------------*/
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/* MAC --------------------------*/
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assert_param(IS_ETH_AUTONEGOTIATION(ETH_InitStruct->ETH_AutoNegotiation));
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assert_param(IS_ETH_AUTONEGOTIATION(ETH_InitStruct->ETH_AutoNegotiation));
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@@ -193,6 +192,7 @@ uint32_t ETH_Init(ETH_InitTypeDef* ETH_InitStruct, uint16_t PHYAddress)
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assert_param(IS_ETH_TXDMA_BURST_LENGTH(ETH_InitStruct->ETH_TxDMABurstLength));
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assert_param(IS_ETH_TXDMA_BURST_LENGTH(ETH_InitStruct->ETH_TxDMABurstLength));
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assert_param(IS_ETH_DMA_DESC_SKIP_LENGTH(ETH_InitStruct->ETH_DescriptorSkipLength));
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assert_param(IS_ETH_DMA_DESC_SKIP_LENGTH(ETH_InitStruct->ETH_DescriptorSkipLength));
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assert_param(IS_ETH_DMA_ARBITRATION_ROUNDROBIN_RXTX(ETH_InitStruct->ETH_DMAArbitration));
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assert_param(IS_ETH_DMA_ARBITRATION_ROUNDROBIN_RXTX(ETH_InitStruct->ETH_DMAArbitration));
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+
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/*-------------------------------- MAC Config ------------------------------*/
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/*-------------------------------- MAC Config ------------------------------*/
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/*---------------------- ETHERNET MACMIIAR Configuration -------------------*/
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/*---------------------- ETHERNET MACMIIAR Configuration -------------------*/
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/* Get the ETHERNET MACMIIAR value */
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/* Get the ETHERNET MACMIIAR value */
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@@ -220,94 +220,7 @@ uint32_t ETH_Init(ETH_InitTypeDef* ETH_InitStruct, uint16_t PHYAddress)
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}
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}
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/* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */
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/* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */
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ETH->MACMIIAR = (uint32_t)tmpreg;
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ETH->MACMIIAR = (uint32_t)tmpreg;
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- /*-------------------- PHY initialization and configuration ----------------*/
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- /* Put the PHY in reset mode */
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- if(!(ETH_WritePHYRegister(PHYAddress, PHY_BCR, PHY_Reset)))
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- {
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- /* Return ERROR in case of write timeout */
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- return ETH_ERROR;
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- }
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-
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- /* Delay to assure PHY reset */
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- for(i = PHY_ResetDelay; i != 0; i--)
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- {
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- }
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-
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- if(ETH_InitStruct->ETH_AutoNegotiation != ETH_AutoNegotiation_Disable)
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- {
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- /* We wait for linked satus... */
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- do
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- {
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- timeout++;
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- } while (!(ETH_ReadPHYRegister(PHYAddress, PHY_BSR) & PHY_Linked_Status) && (timeout < PHY_READ_TO));
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- /* Return ERROR in case of timeout */
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- if(timeout == PHY_READ_TO)
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- {
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- return ETH_ERROR;
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- }
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- /* Reset Timeout counter */
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- timeout = 0;
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-
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- /* Enable Auto-Negotiation */
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- if(!(ETH_WritePHYRegister(PHYAddress, PHY_BCR, PHY_AutoNegotiation)))
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- {
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- /* Return ERROR in case of write timeout */
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- return ETH_ERROR;
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- }
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-
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- /* Wait until the autonegotiation will be completed */
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- do
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- {
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- timeout++;
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- } while (!(ETH_ReadPHYRegister(PHYAddress, PHY_BSR) & PHY_AutoNego_Complete) && (timeout < (uint32_t)PHY_READ_TO));
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- /* Return ERROR in case of timeout */
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- if(timeout == PHY_READ_TO)
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- {
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- return ETH_ERROR;
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- }
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- /* Reset Timeout counter */
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- timeout = 0;
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-
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- /* Read the result of the autonegotiation */
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- RegValue = ETH_ReadPHYRegister(PHYAddress, PHY_SR);
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- /* Configure the MAC with the Duplex Mode fixed by the autonegotiation process */
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- if((RegValue & PHY_Duplex_Status) != (uint32_t)RESET)
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- {
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- /* Set Ethernet duplex mode to FullDuplex following the autonegotiation */
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- ETH_InitStruct->ETH_Mode = ETH_Mode_FullDuplex;
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-
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- }
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- else
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- {
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- /* Set Ethernet duplex mode to HalfDuplex following the autonegotiation */
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- ETH_InitStruct->ETH_Mode = ETH_Mode_HalfDuplex;
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- }
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- /* Configure the MAC with the speed fixed by the autonegotiation process */
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- if(RegValue & PHY_Speed_Status)
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- {
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- /* Set Ethernet speed to 10M following the autonegotiation */
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- ETH_InitStruct->ETH_Speed = ETH_Speed_10M;
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- }
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- else
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- {
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- /* Set Ethernet speed to 100M following the autonegotiation */
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- ETH_InitStruct->ETH_Speed = ETH_Speed_100M;
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- }
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- }
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- else
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- {
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- if(!ETH_WritePHYRegister(PHYAddress, PHY_BCR, ((uint16_t)(ETH_InitStruct->ETH_Mode >> 3) |
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- (uint16_t)(ETH_InitStruct->ETH_Speed >> 1))))
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- {
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- /* Return ERROR in case of write timeout */
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- return ETH_ERROR;
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- }
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- /* Delay to assure PHY configuration */
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- for(i = PHY_ConfigDelay; i != 0; i--)
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- {
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- }
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- }
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/*------------------------ ETHERNET MACCR Configuration --------------------*/
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/*------------------------ ETHERNET MACCR Configuration --------------------*/
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/* Get the ETHERNET MACCR value */
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/* Get the ETHERNET MACCR value */
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tmpreg = ETH->MACCR;
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tmpreg = ETH->MACCR;
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@@ -3139,77 +3052,6 @@ void ETH_IRQHandler(void)
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rt_interrupt_leave();
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rt_interrupt_leave();
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}
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}
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-#define MICR 0x11
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-#define MISR 0x12
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-
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-void EXTI9_5_IRQHandler(void)
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-{
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- volatile rt_uint16_t status;
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-
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- /* enter interrupt */
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- rt_interrupt_enter();
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-
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- status = ETH_ReadPHYRegister(PHY_ADDRESS, MISR);
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- if (status & (1 << 13))
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- {
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- /* change of link */
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- status = ETH_ReadPHYRegister(PHY_ADDRESS, PHY_SR);
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- if (status & 0x01) /* link established */
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- {
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- netif_set_link_up(stm32_eth_device.parent.netif);
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- }
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- else
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- {
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- netif_set_link_down(stm32_eth_device.parent.netif);
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- }
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- }
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-
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- /* Clear the Key Button EXTI line pending bit */
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- EXTI_ClearITPendingBit(EXTI_Line5);
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-
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- /* leave interrupt */
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- rt_interrupt_leave();
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-}
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-
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-void rt_eth_phy_init(void)
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-{
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- GPIO_InitTypeDef GPIO_InitStructure;
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- EXTI_InitTypeDef EXTI_InitStructure;
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- NVIC_InitTypeDef NVIC_InitStructure;
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-
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- /* Configure PC5 as input for PHY interrupt */
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- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
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- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
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- GPIO_Init(GPIOC, &GPIO_InitStructure);
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-
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- /* Connect PHY Interrupt Line to GPIOC Pin 5 */
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- GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource5);
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-
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- /* Configure PHY Interrupt Line to generate an interrupt on falling edge */
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- EXTI_InitStructure.EXTI_Line = EXTI_Line5;
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- EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
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- EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
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- EXTI_InitStructure.EXTI_LineCmd = ENABLE;
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- EXTI_Init(&EXTI_InitStructure);
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-
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- /* set PHY interrupt */
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- ETH_WritePHYRegister(PHY_ADDRESS, MICR, 0x0003);
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- ETH_WritePHYRegister(PHY_ADDRESS, MISR, 0x0060);
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-
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- /* Clear PHY Interrupt Line pending bit */
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- EXTI_ClearITPendingBit(EXTI_Line5);
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-
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-
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- /* Enable the EXTI0 Interrupt */
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- NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn;
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- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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- NVIC_Init(&NVIC_InitStructure);
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-
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-}
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-
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/* RT-Thread Device Interface */
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/* RT-Thread Device Interface */
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/* initialize the interface */
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/* initialize the interface */
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@@ -3267,7 +3109,7 @@ static rt_err_t rt_stm32_eth_init(rt_device_t dev)
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ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
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ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
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/* Configure ETHERNET */
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/* Configure ETHERNET */
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- Value = ETH_Init(Ð_InitStructure, PHY_ADDRESS);
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+ Value = ETH_Init(Ð_InitStructure);
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/* Enable DMA Receive interrupt (need to enable in this case Normal interrupt) */
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/* Enable DMA Receive interrupt (need to enable in this case Normal interrupt) */
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ETH_DMAITConfig(ETH_DMA_IT_NIS | ETH_DMA_IT_R | ETH_DMA_IT_T, ENABLE);
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ETH_DMAITConfig(ETH_DMA_IT_NIS | ETH_DMA_IT_R | ETH_DMA_IT_T, ENABLE);
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@@ -3674,21 +3516,3 @@ void rt_hw_stm32_eth_init()
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eth_device_init(&(stm32_eth_device.parent), "e0");
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eth_device_init(&(stm32_eth_device.parent), "e0");
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}
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}
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-#include <finsh.h>
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-void phy(void)
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-{
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- rt_uint16_t v;
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-
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- v = ETH_ReadPHYRegister(PHY_ADDRESS, PHY_BCR);
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- rt_kprintf("PHY BCR: 0x%04x\n", v);
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- v = ETH_ReadPHYRegister(PHY_ADDRESS, PHY_BSR);
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- rt_kprintf("PHY BSR: 0x%04x\n", v);
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- v = ETH_ReadPHYRegister(PHY_ADDRESS, PHY_SR);
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- rt_kprintf("PHY SR: 0x%04x\n", v);
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- v = ETH_ReadPHYRegister(PHY_ADDRESS, 0x11);
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- rt_kprintf("PHY MICR: 0x%04x\n", v);
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- v = ETH_ReadPHYRegister(PHY_ADDRESS, 0x12);
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- rt_kprintf("PHY MISR: 0x%04x\n", v);
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-}
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-FINSH_FUNCTION_EXPORT(phy, read phy);
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-
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