Merge pull request #2450 from jesven/fix_lf

Fix lf

bsp/stm32/stm32f767-st-nucleo/README.md

@@ -1,110 +1,110 @@
-# STM32F767 NUCLEO-F767ZI开发板 BSP 说明
-## 简介
-
-本文档为 NUCLEO-F767ZI 开发板的 BSP (板级支持包) 说明。
-
-主要内容如下：
-
-- 开发板资源介绍
-- BSP 快速上手
-- 进阶使用方法
-
-通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
-
-## 开发板介绍
-
-NUCLEO-F767ZI 是st推出的一款基于 ARM Cortex-M7 内核的开发板，最高主频为 216Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32F767 的芯片性能。
-
-开发板外观如下图所示：
-
-![board](figures/en.high-perf_nucleo-144_mbed.jpg)
-
-该开发板常用 **板载资源** 如下：
-
-- MCU：STM32f767，主频 216MHz，2MB FLASH ，512KB RAM ，16K CACHE
-
-- 常用外设
-  - LED ：3个，LED1 (绿色，PB0),LED2（蓝色，PB7），LED3（红色，PB14）
-  - 按键：2个，B1（用户按键，PC13），B2（复位引脚）
-- 常用接口：USB 转串口3、以太网接口
-- 调试接口：ST-LINK
-
-开发板更多详细信息请参考ST [NUCLEO-F767ZI开发板介绍](https://www.st.com/en/evaluation-tools/nucleo-f767zi.html)。
-
-## 外设支持
-
-本 BSP 目前对外设的支持情况如下：
-
-| **板载外设**      | **支持情况** | **备注**                              |
-| :-----------------| :----------: | :-------------------------------------|
-| USB 转串口3        |     支持     |                                       |
-| 以太网            |   暂不支持   | 即将支持                              |
-| **片上外设**      | **支持情况** | **备注**                              |
-| GPIO              |     支持     | PA0, PA1... PK15 ---> PIN: 0, 1...144 |
-| UART              |     支持     | UART3                                 |
-| **扩展模块**      | **支持情况** | **备注**                              |
-| 暂无              |   暂不支持   | 暂不支持                              |
-
-## 使用说明
-
-使用说明分为如下两个章节：
-
-- 快速上手
-
-    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
-
-- 进阶使用
-
-    本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
-
-
-### 快速上手
-
-本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
-
-#### 硬件连接
-
-使用数据线连接开发板到 PC，打开电源开关。
-
-#### 编译下载
-
-双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
-
-> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板
-
-#### 运行结果
-
-下载程序成功之后，系统会自动运行，LED 闪烁。
-
-连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
-
-```bash
- \ | /
-- RT -     Thread Operating System
- / | \     4.0.0 build Jan  9 2019
- 2006 - 2018 Copyright by rt-thread team
-msh >
-```
-### 进阶使用
-
-此 BSP 默认只开启了 GPIO 和 串口3 的功能，如果需使用 Ethernet 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
-
-1. 在 bsp 下打开 env 工具。
-
-2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
-
-3. 输入`pkgs --update`命令更新软件包。
-
-4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
-
-本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
-
-## 注意事项
-
-暂无
-
-## 联系人信息
-
-维护人:
-
--  [e31207077](https://github.com/e31207077), 邮箱：<e31207077@yahoo.com.tw>
+# STM32F767 NUCLEO-F767ZI开发板 BSP 说明
+## 简介
+
+本文档为 NUCLEO-F767ZI 开发板的 BSP (板级支持包) 说明。
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+NUCLEO-F767ZI 是st推出的一款基于 ARM Cortex-M7 内核的开发板，最高主频为 216Mhz，该开发板具有丰富的板载资源，可以充分发挥 STM32F767 的芯片性能。
+
+开发板外观如下图所示：
+
+![board](figures/en.high-perf_nucleo-144_mbed.jpg)
+
+该开发板常用 **板载资源** 如下：
+
+- MCU：STM32f767，主频 216MHz，2MB FLASH ，512KB RAM ，16K CACHE
+
+- 常用外设
+  - LED ：3个，LED1 (绿色，PB0),LED2（蓝色，PB7），LED3（红色，PB14）
+  - 按键：2个，B1（用户按键，PC13），B2（复位引脚）
+- 常用接口：USB 转串口3、以太网接口
+- 调试接口：ST-LINK
+
+开发板更多详细信息请参考ST [NUCLEO-F767ZI开发板介绍](https://www.st.com/en/evaluation-tools/nucleo-f767zi.html)。
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **板载外设**      | **支持情况** | **备注**                              |
+| :-----------------| :----------: | :-------------------------------------|
+| USB 转串口3        |     支持     |                                       |
+| 以太网            |   暂不支持   | 即将支持                              |
+| **片上外设**      | **支持情况** | **备注**                              |
+| GPIO              |     支持     | PA0, PA1... PK15 ---> PIN: 0, 1...144 |
+| UART              |     支持     | UART3                                 |
+| **扩展模块**      | **支持情况** | **备注**                              |
+| 暂无              |   暂不支持   | 暂不支持                              |
+
+## 使用说明
+
+使用说明分为如下两个章节：
+
+- 快速上手
+
+    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
+
+- 进阶使用
+
+    本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
+
+
+### 快速上手
+
+本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用数据线连接开发板到 PC，打开电源开关。
+
+#### 编译下载
+
+双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
+
+> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板
+
+#### 运行结果
+
+下载程序成功之后，系统会自动运行，LED 闪烁。
+
+连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
+
+```bash
+ \ | /
+- RT -     Thread Operating System
+ / | \     4.0.0 build Jan  9 2019
+ 2006 - 2018 Copyright by rt-thread team
+msh >
+```
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 串口3 的功能，如果需使用 Ethernet 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。
+
+本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。
+
+## 注意事项
+
+暂无
+
+## 联系人信息
+
+维护人:
+
+-  [e31207077](https://github.com/e31207077), 邮箱：<e31207077@yahoo.com.tw>

bsp/stm32/stm32f767-st-nucleo/SConstruct

@@ -1,47 +1,47 @@
-import os
-import sys
-import rtconfig
-
-if os.getenv('RTT_ROOT'):
-    RTT_ROOT = os.getenv('RTT_ROOT')
-else:
-    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
-
-sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
-try:
-    from building import *
-except:
-    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
-    print(RTT_ROOT)
-    exit(-1)
-
-TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
-
-env = Environment(tools = ['mingw'],
-    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-    AR = rtconfig.AR, ARFLAGS = '-rc',
-    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
-env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
-
-if rtconfig.PLATFORM == 'iar':
-    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
-    env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
-
-Export('RTT_ROOT')
-Export('rtconfig')
-
-# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
-
-SDK_ROOT = os.path.abspath('./')
-
-# include drivers
-objs.extend(SConscript(os.path.dirname(SDK_ROOT) + '/libraries/STM32F7xx_HAL/SConscript'))
-
-# include libraries
-objs.extend(SConscript(os.path.dirname(SDK_ROOT) + '/libraries/HAL_Drivers/SConscript'))
-
-# make a building
-DoBuilding(TARGET, objs)
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+SDK_ROOT = os.path.abspath('./')
+
+# include drivers
+objs.extend(SConscript(os.path.dirname(SDK_ROOT) + '/libraries/STM32F7xx_HAL/SConscript'))
+
+# include libraries
+objs.extend(SConscript(os.path.dirname(SDK_ROOT) + '/libraries/HAL_Drivers/SConscript'))
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/stm32/stm32f767-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc

@@ -1,324 +1,324 @@
-#MicroXplorer Configuration settings - do not modify
-ETH.IPParameters=MediaInterface,PHY_Name,PHY_Value,PhyAddress
-ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
-ETH.PHY_Name=LAN8742A_PHY_ADDRESS
-ETH.PHY_Value=0
-ETH.PhyAddress=0
-File.Version=6
-KeepUserPlacement=true
-Mcu.Family=STM32F7
-Mcu.IP0=CORTEX_M7
-Mcu.IP1=ETH
-Mcu.IP2=NVIC
-Mcu.IP3=RCC
-Mcu.IP4=SYS
-Mcu.IP5=USART3
-Mcu.IP6=USB_OTG_FS
-Mcu.IPNb=7
-Mcu.Name=STM32F767ZITx
-Mcu.Package=LQFP144
-Mcu.Pin0=PC13
-Mcu.Pin1=PC14/OSC32_IN
-Mcu.Pin10=PC5
-Mcu.Pin11=PB13
-Mcu.Pin12=PB14
-Mcu.Pin13=PD8
-Mcu.Pin14=PD9
-Mcu.Pin15=PG6
-Mcu.Pin16=PG7
-Mcu.Pin17=PA8
-Mcu.Pin18=PA9
-Mcu.Pin19=PA10
-Mcu.Pin2=PC15/OSC32_OUT
-Mcu.Pin20=PA11
-Mcu.Pin21=PA12
-Mcu.Pin22=PA13
-Mcu.Pin23=PA14
-Mcu.Pin24=PG11
-Mcu.Pin25=PG13
-Mcu.Pin26=PB3
-Mcu.Pin27=PB7
-Mcu.Pin28=VP_SYS_VS_Systick
-Mcu.Pin3=PH0/OSC_IN
-Mcu.Pin4=PH1/OSC_OUT
-Mcu.Pin5=PC1
-Mcu.Pin6=PA1
-Mcu.Pin7=PA2
-Mcu.Pin8=PA7
-Mcu.Pin9=PC4
-Mcu.PinsNb=29
-Mcu.ThirdPartyNb=0
-Mcu.UserConstants=
-Mcu.UserName=STM32F767ZITx
-MxCube.Version=5.0.1
-MxDb.Version=DB.5.0.1
-NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
-NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true
-PA1.GPIOParameters=GPIO_Label
-PA1.GPIO_Label=RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0]
-PA1.Locked=true
-PA1.Mode=RMII
-PA1.Signal=ETH_REF_CLK
-PA10.GPIOParameters=GPIO_Label
-PA10.GPIO_Label=USB_ID
-PA10.Locked=true
-PA10.Signal=USB_OTG_FS_ID
-PA11.GPIOParameters=GPIO_Label
-PA11.GPIO_Label=USB_DM
-PA11.Locked=true
-PA11.Mode=Device_Only
-PA11.Signal=USB_OTG_FS_DM
-PA12.GPIOParameters=GPIO_Label
-PA12.GPIO_Label=USB_DP
-PA12.Locked=true
-PA12.Mode=Device_Only
-PA12.Signal=USB_OTG_FS_DP
-PA13.GPIOParameters=GPIO_Label
-PA13.GPIO_Label=TMS
-PA13.Locked=true
-PA13.Mode=Serial_Wire
-PA13.Signal=SYS_JTMS-SWDIO
-PA14.GPIOParameters=GPIO_Label
-PA14.GPIO_Label=TCK
-PA14.Locked=true
-PA14.Mode=Serial_Wire
-PA14.Signal=SYS_JTCK-SWCLK
-PA2.GPIOParameters=GPIO_Label
-PA2.GPIO_Label=RMII_MDIO [LAN8742A-CZ-TR_MDIO]
-PA2.Locked=true
-PA2.Mode=RMII
-PA2.Signal=ETH_MDIO
-PA7.GPIOParameters=GPIO_Label
-PA7.GPIO_Label=RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV]
-PA7.Locked=true
-PA7.Mode=RMII
-PA7.Signal=ETH_CRS_DV
-PA8.GPIOParameters=GPIO_Label
-PA8.GPIO_Label=USB_SOF [TP1]
-PA8.Locked=true
-PA8.Mode=Activate_SOF_FS
-PA8.Signal=USB_OTG_FS_SOF
-PA9.GPIOParameters=GPIO_Label
-PA9.GPIO_Label=USB_VBUS
-PA9.Locked=true
-PA9.Mode=Activate_VBUS
-PA9.Signal=USB_OTG_FS_VBUS
-PB13.GPIOParameters=GPIO_Label
-PB13.GPIO_Label=RMII_TXD1 [LAN8742A-CZ-TR_TXD1]
-PB13.Locked=true
-PB13.Mode=RMII
-PB13.Signal=ETH_TXD1
-PB14.GPIOParameters=GPIO_Label
-PB14.GPIO_Label=LD3 [Red]
-PB14.Locked=true
-PB14.Signal=GPIO_Output
-PB3.GPIOParameters=GPIO_Label
-PB3.GPIO_Label=SWO
-PB3.Locked=true
-PB3.Signal=SYS_JTDO-SWO
-PB7.GPIOParameters=GPIO_Label
-PB7.GPIO_Label=LD2 [Blue]
-PB7.Locked=true
-PB7.Signal=GPIO_Output
-PC1.GPIOParameters=GPIO_Label
-PC1.GPIO_Label=RMII_MDC [LAN8742A-CZ-TR_MDC]
-PC1.Locked=true
-PC1.Mode=RMII
-PC1.Signal=ETH_MDC
-PC13.GPIOParameters=GPIO_Label
-PC13.GPIO_Label=USER_Btn [B1]
-PC13.Locked=true
-PC13.Signal=GPXTI13
-PC14/OSC32_IN.Locked=true
-PC14/OSC32_IN.Mode=LSE-External-Oscillator
-PC14/OSC32_IN.Signal=RCC_OSC32_IN
-PC15/OSC32_OUT.Locked=true
-PC15/OSC32_OUT.Mode=LSE-External-Oscillator
-PC15/OSC32_OUT.Signal=RCC_OSC32_OUT
-PC4.GPIOParameters=GPIO_Label
-PC4.GPIO_Label=RMII_RXD0 [LAN8742A-CZ-TR_RXD0]
-PC4.Locked=true
-PC4.Mode=RMII
-PC4.Signal=ETH_RXD0
-PC5.GPIOParameters=GPIO_Label
-PC5.GPIO_Label=RMII_RXD1 [LAN8742A-CZ-TR_RXD1]
-PC5.Locked=true
-PC5.Mode=RMII
-PC5.Signal=ETH_RXD1
-PCC.Checker=false
-PCC.Line=STM32F7x7
-PCC.MCU=STM32F767ZITx
-PCC.PartNumber=STM32F767ZITx
-PCC.Seq0=0
-PCC.Series=STM32F7
-PCC.Temperature=25
-PCC.Vdd=3.6
-PD8.GPIOParameters=GPIO_Label
-PD8.GPIO_Label=STLK_RX [STM32F103CBT6_PA3]
-PD8.Locked=true
-PD8.Mode=Asynchronous
-PD8.Signal=USART3_TX
-PD9.GPIOParameters=GPIO_Label
-PD9.GPIO_Label=STLK_TX [STM32F103CBT6_PA2]
-PD9.Locked=true
-PD9.Mode=Asynchronous
-PD9.Signal=USART3_RX
-PG11.GPIOParameters=GPIO_Label
-PG11.GPIO_Label=RMII_TX_EN [LAN8742A-CZ-TR_TXEN]
-PG11.Locked=true
-PG11.Mode=RMII
-PG11.Signal=ETH_TX_EN
-PG13.GPIOParameters=GPIO_Label
-PG13.GPIO_Label=RMII_TXD0 [LAN8742A-CZ-TR_TXD0]
-PG13.Locked=true
-PG13.Mode=RMII
-PG13.Signal=ETH_TXD0
-PG6.GPIOParameters=GPIO_Label
-PG6.GPIO_Label=USB_PowerSwitchOn [STMPS2151STR_EN]
-PG6.Locked=true
-PG6.Signal=GPIO_Output
-PG7.GPIOParameters=GPIO_Label
-PG7.GPIO_Label=USB_OverCurrent [STMPS2151STR_FAULT]
-PG7.Locked=true
-PG7.Signal=GPIO_Input
-PH0/OSC_IN.GPIOParameters=GPIO_Label
-PH0/OSC_IN.GPIO_Label=MCO [STM32F103CBT6_PA8]
-PH0/OSC_IN.Locked=true
-PH0/OSC_IN.Mode=HSE-External-Clock-Source
-PH0/OSC_IN.Signal=RCC_OSC_IN
-PH1/OSC_OUT.Locked=true
-PH1/OSC_OUT.Mode=HSE-External-Clock-Source
-PH1/OSC_OUT.Signal=RCC_OSC_OUT
-PinOutPanel.RotationAngle=0
-ProjectManager.AskForMigrate=true
-ProjectManager.BackupPrevious=false
-ProjectManager.CompilerOptimize=6
-ProjectManager.ComputerToolchain=false
-ProjectManager.CoupleFile=false
-ProjectManager.CustomerFirmwarePackage=
-ProjectManager.DefaultFWLocation=true
-ProjectManager.DeletePrevious=true
-ProjectManager.DeviceId=STM32F767ZITx
-ProjectManager.FirmwarePackage=STM32Cube FW_F7 V1.14.0
-ProjectManager.FreePins=false
-ProjectManager.HalAssertFull=false
-ProjectManager.HeapSize=0x200
-ProjectManager.KeepUserCode=true
-ProjectManager.LastFirmware=true
-ProjectManager.LibraryCopy=0
-ProjectManager.MainLocation=Src
-ProjectManager.NoMain=false
-ProjectManager.PreviousToolchain=
-ProjectManager.ProjectBuild=false
-ProjectManager.ProjectFileName=CubeMX_Config.ioc
-ProjectManager.ProjectName=CubeMX_Config
-ProjectManager.StackSize=0x400
-ProjectManager.TargetToolchain=EWARM V8
-ProjectManager.ToolChainLocation=
-ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_ETH_Init-ETH-false-HAL-true,5-MX_USART3_UART_Init-USART3-false-HAL-true,6-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true
-RCC.48MHZClocksFreq_Value=24000000
-RCC.ADC12outputFreq_Value=72000000
-RCC.ADC34outputFreq_Value=72000000
-RCC.AHBFreq_Value=216000000
-RCC.APB1CLKDivider=RCC_HCLK_DIV4
-RCC.APB1Freq_Value=54000000
-RCC.APB1TimFreq_Value=108000000
-RCC.APB2CLKDivider=RCC_HCLK_DIV2
-RCC.APB2Freq_Value=108000000
-RCC.APB2TimFreq_Value=216000000
-RCC.CECFreq_Value=32786.88524590164
-RCC.CortexFreq_Value=216000000
-RCC.DFSDMAudioFreq_Value=96000000
-RCC.DFSDMFreq_Value=108000000
-RCC.EthernetFreq_Value=216000000
-RCC.FCLKCortexFreq_Value=216000000
-RCC.FamilyName=M
-RCC.HCLKFreq_Value=216000000
-RCC.HSE_VALUE=8000000
-RCC.HSI_VALUE=16000000
-RCC.I2C1Freq_Value=54000000
-RCC.I2C2Freq_Value=54000000
-RCC.I2C3Freq_Value=54000000
-RCC.I2C4Freq_Value=54000000
-RCC.I2SClocksFreq_Value=48000000
-RCC.I2SFreq_Value=96000000
-RCC.IPParameters=48MHZClocksFreq_Value,ADC12outputFreq_Value,ADC34outputFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SClocksFreq_Value,I2SFreq_Value,LCDTFTFreq_Value,LCDTFToutputFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLMCOFreq_Value,PLLMUL,PLLN,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PRESCALERUSB,RNGFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,SYSCLKSourceVirtual,TIM15Freq_Value,TIM16Freq_Value,TIM17Freq_Value,TIM1Freq_Value,TIM20Freq_Value,TIM2Freq_Value,TIM3Freq_Value,TIM8Freq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutput2Freq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VcooutputI2S,WatchDogFreq_Value
-RCC.LCDTFTFreq_Value=48000000
-RCC.LCDTFToutputFreq_Value=96000000
-RCC.LPTIM1Freq_Value=54000000
-RCC.LSI_VALUE=32000
-RCC.MCO1PinFreq_Value=16000000
-RCC.MCO2PinFreq_Value=216000000
-RCC.MCOFreq_Value=72000000
-RCC.PLLCLKFreq_Value=216000000
-RCC.PLLI2SPCLKFreq_Value=96000000
-RCC.PLLI2SQCLKFreq_Value=96000000
-RCC.PLLI2SRCLKFreq_Value=96000000
-RCC.PLLI2SRoutputFreq_Value=96000000
-RCC.PLLM=8
-RCC.PLLMCOFreq_Value=72000000
-RCC.PLLMUL=RCC_PLL_MUL9
-RCC.PLLN=432
-RCC.PLLQ=9
-RCC.PLLQCLKFreq_Value=48000000
-RCC.PLLQoutputFreq_Value=48000000
-RCC.PLLRFreq_Value=216000000
-RCC.PLLSAIPCLKFreq_Value=96000000
-RCC.PLLSAIQCLKFreq_Value=96000000
-RCC.PLLSAIRCLKFreq_Value=96000000
-RCC.PLLSAIoutputFreq_Value=96000000
-RCC.PRESCALERUSB=RCC_USBCLKSOURCE_PLL_DIV1_5
-RCC.RNGFreq_Value=48000000
-RCC.RTCFreq_Value=32000
-RCC.RTCHSEDivFreq_Value=4000000
-RCC.SAI1Freq_Value=96000000
-RCC.SAI2Freq_Value=96000000
-RCC.SDMMC2Freq_Value=216000000
-RCC.SDMMCFreq_Value=216000000
-RCC.SPDIFRXFreq_Value=96000000
-RCC.SYSCLKFreq_VALUE=216000000
-RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
-RCC.SYSCLKSourceVirtual=RCC_SYSCLKSOURCE_PLLCLK
-RCC.TIM15Freq_Value=72000000
-RCC.TIM16Freq_Value=72000000
-RCC.TIM17Freq_Value=72000000
-RCC.TIM1Freq_Value=72000000
-RCC.TIM20Freq_Value=72000000
-RCC.TIM2Freq_Value=72000000
-RCC.TIM3Freq_Value=72000000
-RCC.TIM8Freq_Value=72000000
-RCC.UART4Freq_Value=54000000
-RCC.UART5Freq_Value=54000000
-RCC.UART7Freq_Value=54000000
-RCC.UART8Freq_Value=54000000
-RCC.USART1Freq_Value=108000000
-RCC.USART2Freq_Value=54000000
-RCC.USART3Freq_Value=54000000
-RCC.USART6Freq_Value=108000000
-RCC.USBFreq_Value=48000000
-RCC.VCOI2SOutputFreq_Value=192000000
-RCC.VCOInputFreq_Value=1000000
-RCC.VCOOutput2Freq_Value=8000000
-RCC.VCOOutputFreq_Value=432000000
-RCC.VCOSAIOutputFreq_Value=192000000
-RCC.VcooutputI2S=48000000
-RCC.WatchDogFreq_Value=32000
-SH.GPXTI13.0=GPIO_EXTI13
-SH.GPXTI13.ConfNb=1
-USART3.IPParameters=VirtualMode-Asynchronous
-USART3.VirtualMode-Asynchronous=VM_ASYNC
-USB_OTG_FS.IPParameters=VirtualMode
-USB_OTG_FS.VirtualMode=Device_Only
-VP_SYS_VS_Systick.Mode=SysTick
-VP_SYS_VS_Systick.Signal=SYS_VS_Systick
-board=NUCLEO-F767ZI
-boardIOC=true
+#MicroXplorer Configuration settings - do not modify
+ETH.IPParameters=MediaInterface,PHY_Name,PHY_Value,PhyAddress
+ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
+ETH.PHY_Name=LAN8742A_PHY_ADDRESS
+ETH.PHY_Value=0
+ETH.PhyAddress=0
+File.Version=6
+KeepUserPlacement=true
+Mcu.Family=STM32F7
+Mcu.IP0=CORTEX_M7
+Mcu.IP1=ETH
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=USART3
+Mcu.IP6=USB_OTG_FS
+Mcu.IPNb=7
+Mcu.Name=STM32F767ZITx
+Mcu.Package=LQFP144
+Mcu.Pin0=PC13
+Mcu.Pin1=PC14/OSC32_IN
+Mcu.Pin10=PC5
+Mcu.Pin11=PB13
+Mcu.Pin12=PB14
+Mcu.Pin13=PD8
+Mcu.Pin14=PD9
+Mcu.Pin15=PG6
+Mcu.Pin16=PG7
+Mcu.Pin17=PA8
+Mcu.Pin18=PA9
+Mcu.Pin19=PA10
+Mcu.Pin2=PC15/OSC32_OUT
+Mcu.Pin20=PA11
+Mcu.Pin21=PA12
+Mcu.Pin22=PA13
+Mcu.Pin23=PA14
+Mcu.Pin24=PG11
+Mcu.Pin25=PG13
+Mcu.Pin26=PB3
+Mcu.Pin27=PB7
+Mcu.Pin28=VP_SYS_VS_Systick
+Mcu.Pin3=PH0/OSC_IN
+Mcu.Pin4=PH1/OSC_OUT
+Mcu.Pin5=PC1
+Mcu.Pin6=PA1
+Mcu.Pin7=PA2
+Mcu.Pin8=PA7
+Mcu.Pin9=PC4
+Mcu.PinsNb=29
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32F767ZITx
+MxCube.Version=5.0.1
+MxDb.Version=DB.5.0.1
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true
+PA1.GPIOParameters=GPIO_Label
+PA1.GPIO_Label=RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0]
+PA1.Locked=true
+PA1.Mode=RMII
+PA1.Signal=ETH_REF_CLK
+PA10.GPIOParameters=GPIO_Label
+PA10.GPIO_Label=USB_ID
+PA10.Locked=true
+PA10.Signal=USB_OTG_FS_ID
+PA11.GPIOParameters=GPIO_Label
+PA11.GPIO_Label=USB_DM
+PA11.Locked=true
+PA11.Mode=Device_Only
+PA11.Signal=USB_OTG_FS_DM
+PA12.GPIOParameters=GPIO_Label
+PA12.GPIO_Label=USB_DP
+PA12.Locked=true
+PA12.Mode=Device_Only
+PA12.Signal=USB_OTG_FS_DP
+PA13.GPIOParameters=GPIO_Label
+PA13.GPIO_Label=TMS
+PA13.Locked=true
+PA13.Mode=Serial_Wire
+PA13.Signal=SYS_JTMS-SWDIO
+PA14.GPIOParameters=GPIO_Label
+PA14.GPIO_Label=TCK
+PA14.Locked=true
+PA14.Mode=Serial_Wire
+PA14.Signal=SYS_JTCK-SWCLK
+PA2.GPIOParameters=GPIO_Label
+PA2.GPIO_Label=RMII_MDIO [LAN8742A-CZ-TR_MDIO]
+PA2.Locked=true
+PA2.Mode=RMII
+PA2.Signal=ETH_MDIO
+PA7.GPIOParameters=GPIO_Label
+PA7.GPIO_Label=RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV]
+PA7.Locked=true
+PA7.Mode=RMII
+PA7.Signal=ETH_CRS_DV
+PA8.GPIOParameters=GPIO_Label
+PA8.GPIO_Label=USB_SOF [TP1]
+PA8.Locked=true
+PA8.Mode=Activate_SOF_FS
+PA8.Signal=USB_OTG_FS_SOF
+PA9.GPIOParameters=GPIO_Label
+PA9.GPIO_Label=USB_VBUS
+PA9.Locked=true
+PA9.Mode=Activate_VBUS
+PA9.Signal=USB_OTG_FS_VBUS
+PB13.GPIOParameters=GPIO_Label
+PB13.GPIO_Label=RMII_TXD1 [LAN8742A-CZ-TR_TXD1]
+PB13.Locked=true
+PB13.Mode=RMII
+PB13.Signal=ETH_TXD1
+PB14.GPIOParameters=GPIO_Label
+PB14.GPIO_Label=LD3 [Red]
+PB14.Locked=true
+PB14.Signal=GPIO_Output
+PB3.GPIOParameters=GPIO_Label
+PB3.GPIO_Label=SWO
+PB3.Locked=true
+PB3.Signal=SYS_JTDO-SWO
+PB7.GPIOParameters=GPIO_Label
+PB7.GPIO_Label=LD2 [Blue]
+PB7.Locked=true
+PB7.Signal=GPIO_Output
+PC1.GPIOParameters=GPIO_Label
+PC1.GPIO_Label=RMII_MDC [LAN8742A-CZ-TR_MDC]
+PC1.Locked=true
+PC1.Mode=RMII
+PC1.Signal=ETH_MDC
+PC13.GPIOParameters=GPIO_Label
+PC13.GPIO_Label=USER_Btn [B1]
+PC13.Locked=true
+PC13.Signal=GPXTI13
+PC14/OSC32_IN.Locked=true
+PC14/OSC32_IN.Mode=LSE-External-Oscillator
+PC14/OSC32_IN.Signal=RCC_OSC32_IN
+PC15/OSC32_OUT.Locked=true
+PC15/OSC32_OUT.Mode=LSE-External-Oscillator
+PC15/OSC32_OUT.Signal=RCC_OSC32_OUT
+PC4.GPIOParameters=GPIO_Label
+PC4.GPIO_Label=RMII_RXD0 [LAN8742A-CZ-TR_RXD0]
+PC4.Locked=true
+PC4.Mode=RMII
+PC4.Signal=ETH_RXD0
+PC5.GPIOParameters=GPIO_Label
+PC5.GPIO_Label=RMII_RXD1 [LAN8742A-CZ-TR_RXD1]
+PC5.Locked=true
+PC5.Mode=RMII
+PC5.Signal=ETH_RXD1
+PCC.Checker=false
+PCC.Line=STM32F7x7
+PCC.MCU=STM32F767ZITx
+PCC.PartNumber=STM32F767ZITx
+PCC.Seq0=0
+PCC.Series=STM32F7
+PCC.Temperature=25
+PCC.Vdd=3.6
+PD8.GPIOParameters=GPIO_Label
+PD8.GPIO_Label=STLK_RX [STM32F103CBT6_PA3]
+PD8.Locked=true
+PD8.Mode=Asynchronous
+PD8.Signal=USART3_TX
+PD9.GPIOParameters=GPIO_Label
+PD9.GPIO_Label=STLK_TX [STM32F103CBT6_PA2]
+PD9.Locked=true
+PD9.Mode=Asynchronous
+PD9.Signal=USART3_RX
+PG11.GPIOParameters=GPIO_Label
+PG11.GPIO_Label=RMII_TX_EN [LAN8742A-CZ-TR_TXEN]
+PG11.Locked=true
+PG11.Mode=RMII
+PG11.Signal=ETH_TX_EN
+PG13.GPIOParameters=GPIO_Label
+PG13.GPIO_Label=RMII_TXD0 [LAN8742A-CZ-TR_TXD0]
+PG13.Locked=true
+PG13.Mode=RMII
+PG13.Signal=ETH_TXD0
+PG6.GPIOParameters=GPIO_Label
+PG6.GPIO_Label=USB_PowerSwitchOn [STMPS2151STR_EN]
+PG6.Locked=true
+PG6.Signal=GPIO_Output
+PG7.GPIOParameters=GPIO_Label
+PG7.GPIO_Label=USB_OverCurrent [STMPS2151STR_FAULT]
+PG7.Locked=true
+PG7.Signal=GPIO_Input
+PH0/OSC_IN.GPIOParameters=GPIO_Label
+PH0/OSC_IN.GPIO_Label=MCO [STM32F103CBT6_PA8]
+PH0/OSC_IN.Locked=true
+PH0/OSC_IN.Mode=HSE-External-Clock-Source
+PH0/OSC_IN.Signal=RCC_OSC_IN
+PH1/OSC_OUT.Locked=true
+PH1/OSC_OUT.Mode=HSE-External-Clock-Source
+PH1/OSC_OUT.Signal=RCC_OSC_OUT
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32F767ZITx
+ProjectManager.FirmwarePackage=STM32Cube FW_F7 V1.14.0
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=0
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CubeMX_Config.ioc
+ProjectManager.ProjectName=CubeMX_Config
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=EWARM V8
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_ETH_Init-ETH-false-HAL-true,5-MX_USART3_UART_Init-USART3-false-HAL-true,6-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true
+RCC.48MHZClocksFreq_Value=24000000
+RCC.ADC12outputFreq_Value=72000000
+RCC.ADC34outputFreq_Value=72000000
+RCC.AHBFreq_Value=216000000
+RCC.APB1CLKDivider=RCC_HCLK_DIV4
+RCC.APB1Freq_Value=54000000
+RCC.APB1TimFreq_Value=108000000
+RCC.APB2CLKDivider=RCC_HCLK_DIV2
+RCC.APB2Freq_Value=108000000
+RCC.APB2TimFreq_Value=216000000
+RCC.CECFreq_Value=32786.88524590164
+RCC.CortexFreq_Value=216000000
+RCC.DFSDMAudioFreq_Value=96000000
+RCC.DFSDMFreq_Value=108000000
+RCC.EthernetFreq_Value=216000000
+RCC.FCLKCortexFreq_Value=216000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=216000000
+RCC.HSE_VALUE=8000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=54000000
+RCC.I2C2Freq_Value=54000000
+RCC.I2C3Freq_Value=54000000
+RCC.I2C4Freq_Value=54000000
+RCC.I2SClocksFreq_Value=48000000
+RCC.I2SFreq_Value=96000000
+RCC.IPParameters=48MHZClocksFreq_Value,ADC12outputFreq_Value,ADC34outputFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SClocksFreq_Value,I2SFreq_Value,LCDTFTFreq_Value,LCDTFToutputFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLMCOFreq_Value,PLLMUL,PLLN,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PRESCALERUSB,RNGFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,SYSCLKSourceVirtual,TIM15Freq_Value,TIM16Freq_Value,TIM17Freq_Value,TIM1Freq_Value,TIM20Freq_Value,TIM2Freq_Value,TIM3Freq_Value,TIM8Freq_Value,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutput2Freq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value,VcooutputI2S,WatchDogFreq_Value
+RCC.LCDTFTFreq_Value=48000000
+RCC.LCDTFToutputFreq_Value=96000000
+RCC.LPTIM1Freq_Value=54000000
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.MCO2PinFreq_Value=216000000
+RCC.MCOFreq_Value=72000000
+RCC.PLLCLKFreq_Value=216000000
+RCC.PLLI2SPCLKFreq_Value=96000000
+RCC.PLLI2SQCLKFreq_Value=96000000
+RCC.PLLI2SRCLKFreq_Value=96000000
+RCC.PLLI2SRoutputFreq_Value=96000000
+RCC.PLLM=8
+RCC.PLLMCOFreq_Value=72000000
+RCC.PLLMUL=RCC_PLL_MUL9
+RCC.PLLN=432
+RCC.PLLQ=9
+RCC.PLLQCLKFreq_Value=48000000
+RCC.PLLQoutputFreq_Value=48000000
+RCC.PLLRFreq_Value=216000000
+RCC.PLLSAIPCLKFreq_Value=96000000
+RCC.PLLSAIQCLKFreq_Value=96000000
+RCC.PLLSAIRCLKFreq_Value=96000000
+RCC.PLLSAIoutputFreq_Value=96000000
+RCC.PRESCALERUSB=RCC_USBCLKSOURCE_PLL_DIV1_5
+RCC.RNGFreq_Value=48000000
+RCC.RTCFreq_Value=32000
+RCC.RTCHSEDivFreq_Value=4000000
+RCC.SAI1Freq_Value=96000000
+RCC.SAI2Freq_Value=96000000
+RCC.SDMMC2Freq_Value=216000000
+RCC.SDMMCFreq_Value=216000000
+RCC.SPDIFRXFreq_Value=96000000
+RCC.SYSCLKFreq_VALUE=216000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.SYSCLKSourceVirtual=RCC_SYSCLKSOURCE_PLLCLK
+RCC.TIM15Freq_Value=72000000
+RCC.TIM16Freq_Value=72000000
+RCC.TIM17Freq_Value=72000000
+RCC.TIM1Freq_Value=72000000
+RCC.TIM20Freq_Value=72000000
+RCC.TIM2Freq_Value=72000000
+RCC.TIM3Freq_Value=72000000
+RCC.TIM8Freq_Value=72000000
+RCC.UART4Freq_Value=54000000
+RCC.UART5Freq_Value=54000000
+RCC.UART7Freq_Value=54000000
+RCC.UART8Freq_Value=54000000
+RCC.USART1Freq_Value=108000000
+RCC.USART2Freq_Value=54000000
+RCC.USART3Freq_Value=54000000
+RCC.USART6Freq_Value=108000000
+RCC.USBFreq_Value=48000000
+RCC.VCOI2SOutputFreq_Value=192000000
+RCC.VCOInputFreq_Value=1000000
+RCC.VCOOutput2Freq_Value=8000000
+RCC.VCOOutputFreq_Value=432000000
+RCC.VCOSAIOutputFreq_Value=192000000
+RCC.VcooutputI2S=48000000
+RCC.WatchDogFreq_Value=32000
+SH.GPXTI13.0=GPIO_EXTI13
+SH.GPXTI13.ConfNb=1
+USART3.IPParameters=VirtualMode-Asynchronous
+USART3.VirtualMode-Asynchronous=VM_ASYNC
+USB_OTG_FS.IPParameters=VirtualMode
+USB_OTG_FS.VirtualMode=Device_Only
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=NUCLEO-F767ZI
+boardIOC=true

components/lwp/SConscript

@@ -3,9 +3,9 @@ from building import *
 
 cwd     = GetCurrentDir()
 src     = []
-CPPPATH = []
+CPPPATH = [cwd]
 
-support_arch  = {"arm": ["cortex-m3", "cortex-m4", "cortex-m7", "arm9", "cortex-a9"]}
+support_arch  = {"arm": ["cortex-m3", "cortex-m4", "cortex-m7", "arm926", "cortex-a9"]}
 platform_file = {'armcc': 'rvds.S', 'gcc': 'gcc.S', 'iar': 'iar.S'}
 
 if rtconfig.PLATFORM in platform_file.keys():	# support platforms

libcpu/arm/arm926/context_gcc.S

@@ -10,6 +10,7 @@
 
 #define NOINT   0xC0
 
+.text
 ;/*
 ; * rt_base_t rt_hw_interrupt_disable();
 ; */

libcpu/arm/arm926/cpuport.c

@@ -23,30 +23,30 @@ rt_inline rt_uint32_t cp15_rd(void)
 {
     rt_uint32_t i;
 
-    __asm volatile("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
+    __asm volatile("mrc p15, 0, %0, c1, c0, 0":"=r"(i));
     return i;
 }
 
 rt_inline void cache_enable(rt_uint32_t bit)
 {
     __asm volatile(\
-                         "mrc  p15,0,r0,c1,c0,0\n\t"    \
-                         "orr  r0,r0,%0\n\t"            \
-                         "mcr  p15,0,r0,c1,c0,0"        \
-                         :                              \
-                         :"r" (bit)                     \
-                         :"memory");
+                   "mrc  p15,0,r0,c1,c0,0\n\t"    \
+                   "orr  r0,r0,%0\n\t"            \
+                   "mcr  p15,0,r0,c1,c0,0"        \
+                   :                              \
+                   : "r"(bit)                     \
+                   : "memory");
 }
 
 rt_inline void cache_disable(rt_uint32_t bit)
 {
     __asm volatile(\
-                         "mrc  p15,0,r0,c1,c0,0\n\t"    \
-                         "bic  r0,r0,%0\n\t"            \
-                         "mcr  p15,0,r0,c1,c0,0"        \
-                         :                              \
-                         :"r" (bit)                     \
-                         :"memory");
+                   "mrc  p15,0,r0,c1,c0,0\n\t"    \
+                   "bic  r0,r0,%0\n\t"            \
+                   "mcr  p15,0,r0,c1,c0,0"        \
+                   :                              \
+                   : "r"(bit)                     \
+                   : "memory");
 }
 #endif
 
@@ -152,7 +152,7 @@ void rt_hw_cpu_reset()
     rt_kprintf("Restarting system...\n");
     machine_reset();
 
-    while(1);    /* loop forever and wait for reset to happen */
+    while (1);   /* loop forever and wait for reset to happen */
 
     /* NEVER REACHED */
 }
@@ -206,21 +206,7 @@ int __rt_ffs(int value)
 #elif defined(__GNUC__) || defined(__ICCARM__)
 int __rt_ffs(int value)
 {
-    register rt_uint32_t x;
-
-    if (value == 0)
-        return value;
-
-    __asm
-    (
-        "rsb %[temp], %[val], #0\n"
-        "and %[temp], %[temp], %[val]\n"
-        "clz %[temp], %[temp]\n"
-        "rsb %[temp], %[temp], #32\n"
-        :[temp] "=r"(x)
-        :[val] "r"(value)
-    );
-    return x;
+    return __builtin_ffs(value);
 }
 #endif
 

libcpu/arm/arm926/machine.c

@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-02-08     RT-Thread    the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+RT_WEAK void machine_reset(void)
+{
+    rt_kprintf("reboot system...\n");
+    rt_hw_interrupt_disable();
+    while (1);
+}
+
+RT_WEAK void machine_shutdown(void)
+{
+    rt_kprintf("shutdown...\n");
+    rt_hw_interrupt_disable();
+    while (1);
+}
+

libcpu/arm/arm926/mmu.c

@@ -140,7 +140,7 @@ void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size)
 
     ptr = buffer & ~(CACHE_LINE_SIZE - 1);
 
-    while(ptr < buffer + size)
+    while (ptr < buffer + size)
     {
         __asm volatile { MCR p15, 0, ptr, c7, c14, 1 }
         ptr += CACHE_LINE_SIZE;
@@ -211,18 +211,18 @@ void mmu_setttbase(register rt_uint32_t i)
      * set by page table entry
      */
     value = 0;
-    asm volatile ("mcr p15, 0, %0, c8, c7, 0"::"r"(value));
+    asm volatile("mcr p15, 0, %0, c8, c7, 0"::"r"(value));
 
     value = 0x55555555;
-    asm volatile ("mcr p15, 0, %0, c3, c0, 0"::"r"(value));
+    asm volatile("mcr p15, 0, %0, c3, c0, 0"::"r"(value));
 
-    asm volatile ("mcr p15, 0, %0, c2, c0, 0"::"r"(i));
+    asm volatile("mcr p15, 0, %0, c2, c0, 0"::"r"(i));
 
 }
 
 void mmu_set_domain(register rt_uint32_t i)
 {
-    asm volatile ("mcr p15,0, %0, c3, c0,  0": :"r" (i));
+    asm volatile("mcr p15,0, %0, c3, c0,  0": :"r"(i));
 }
 
 void mmu_enable()
@@ -321,7 +321,7 @@ void mmu_disable_alignfault()
 
 void mmu_clean_invalidated_cache_index(int index)
 {
-    asm volatile ("mcr p15, 0, %0, c7, c14, 2": :"r" (index));
+    asm volatile("mcr p15, 0, %0, c7, c14, 2": :"r"(index));
 }
 
 void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size)
@@ -330,9 +330,9 @@ void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size)
 
     ptr = buffer & ~(CACHE_LINE_SIZE - 1);
 
-    while(ptr < buffer + size)
+    while (ptr < buffer + size)
     {
-        asm volatile ("mcr p15, 0, %0, c7, c14, 1": :"r" (ptr));
+        asm volatile("mcr p15, 0, %0, c7, c14, 1": :"r"(ptr));
 
         ptr += CACHE_LINE_SIZE;
     }
@@ -347,7 +347,7 @@ void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size)
 
     while (ptr < buffer + size)
     {
-        asm volatile ("mcr p15, 0, %0, c7, c10, 1": :"r" (ptr));
+        asm volatile("mcr p15, 0, %0, c7, c10, 1": :"r"(ptr));
 
         ptr += CACHE_LINE_SIZE;
     }
@@ -361,7 +361,7 @@ void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size)
 
     while (ptr < buffer + size)
     {
-        asm volatile ("mcr p15, 0, %0, c7, c6, 1": :"r" (ptr));
+        asm volatile("mcr p15, 0, %0, c7, c6, 1": :"r"(ptr));
 
         ptr += CACHE_LINE_SIZE;
     }
@@ -369,19 +369,19 @@ void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size)
 
 void mmu_invalidate_tlb()
 {
-    asm volatile ("mcr p15, 0, %0, c8, c7, 0": :"r" (0));
+    asm volatile("mcr p15, 0, %0, c8, c7, 0": :"r"(0));
 
 }
 
 void mmu_invalidate_icache()
 {
-    asm volatile ("mcr p15, 0, %0, c7, c5, 0": :"r" (0));
+    asm volatile("mcr p15, 0, %0, c7, c5, 0": :"r"(0));
 
 }
 
 void mmu_invalidate_dcache_all()
 {
-    asm volatile ("mcr p15, 0, %0, c7, c6, 0": :"r" (0));
+    asm volatile("mcr p15, 0, %0, c7, c6, 0": :"r"(0));
 
 }
 #endif
@@ -389,10 +389,10 @@ void mmu_invalidate_dcache_all()
 /* level1 page table */
 #if defined(__ICCARM__)
 #pragma data_alignment=(16*1024)
-static volatile rt_uint32_t _page_table[4*1024];
+static volatile rt_uint32_t _page_table[4 * 1024];
 #else
-static volatile rt_uint32_t _page_table[4*1024] \
-    __attribute__((aligned(16*1024)));
+static volatile rt_uint32_t _page_table[4 * 1024] \
+__attribute__((aligned(16 * 1024)));
 #endif
 
 void mmu_setmtt(rt_uint32_t vaddrStart, rt_uint32_t vaddrEnd,
@@ -401,11 +401,11 @@ void mmu_setmtt(rt_uint32_t vaddrStart, rt_uint32_t vaddrEnd,
     volatile rt_uint32_t *pTT;
     volatile int nSec;
     int i = 0;
-    pTT=(rt_uint32_t *)_page_table+(vaddrStart>>20);
-    nSec=(vaddrEnd>>20)-(vaddrStart>>20);
-    for(i=0; i<=nSec; i++)
+    pTT = (rt_uint32_t *)_page_table + (vaddrStart >> 20);
+    nSec = (vaddrEnd >> 20) - (vaddrStart >> 20);
+    for (i = 0; i <= nSec; i++)
     {
-        *pTT = attr |(((paddrStart>>20)+i)<<20);
+        *pTT = attr | (((paddrStart >> 20) + i) << 20);
         pTT++;
     }
 }

libcpu/arm/arm926/mmu.h

@@ -5,6 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
+ * 2018-02-08     RT-Thread    the first version
  */
 
 #ifndef __MMU_H__
@@ -45,5 +46,7 @@ struct mem_desc
 };
 
 void rt_hw_mmu_init(struct mem_desc *mdesc, rt_uint32_t size);
-
+void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size);
+void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size);
+void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size);
 #endif

libcpu/arm/arm926/stack.c

@@ -38,7 +38,7 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
 
     stack_addr += sizeof(rt_uint32_t);
     stack_addr  = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8);
-    stk      = (rt_uint32_t *)stack_addr;
+    stk  = (rt_uint32_t *)stack_addr;
 
     *(--stk) = (rt_uint32_t)tentry;         /* entry point */
     *(--stk) = (rt_uint32_t)texit;          /* lr */

libcpu/arm/arm926/start_gcc.S

@@ -11,295 +11,320 @@
  * 2015-06-04     aozima     Align stack address to 8 byte.
  */
 
-#include "rt_low_level_init.h"
-
-#define S_FRAME_SIZE    (18*4)   //72
-
-@#define S_SPSR          (17*4)   //SPSR
-@#define S_CPSR          (16*4)   //CPSR
-#define S_PC            (15*4)   //R15
-@#define S_LR            (14*4)   //R14
-@#define S_SP            (13*4)   //R13
-
-@#define S_IP            (12*4)   //R12
-@#define S_FP            (11*4)   //R11
-@#define S_R10           (10*4)
-@#define S_R9            (9*4)
-@#define S_R8            (8*4)
-@#define S_R7            (7*4)
-@#define S_R6            (6*4)
-@#define S_R5            (5*4)
-@#define S_R4            (4*4)
-@#define S_R3            (3*4)
-@#define S_R2            (2*4)
-@#define S_R1            (1*4)
-@#define S_R0            (0*4)
-
-#define MODE_SYS        0x1F
-#define MODE_FIQ        0x11
-#define MODE_IRQ        0x12
-#define MODE_SVC        0x13
-#define MODE_ABT        0x17
-#define MODE_UND        0x1B
-#define MODEMASK        0x1F
-
-#define NOINT           0xC0
-
-@;----------------------- Stack and Heap Definitions ---------------------------
-    .section .nobss, "w"
-
-    .space UND_STK_SIZE
+.equ MODE_USR,        0x10
+.equ MODE_FIQ,        0x11
+.equ MODE_IRQ,        0x12
+.equ MODE_SVC,        0x13
+.equ MODE_ABT,        0x17
+.equ MODE_UND,        0x1B
+.equ MODE_SYS,        0x1F
+.equ MODEMASK,        0x1F
+.equ NOINT,           0xC0
+
+.equ I_BIT,           0x80
+.equ F_BIT,           0x40
+
+.equ UND_STACK_SIZE,  0x00000100
+.equ SVC_STACK_SIZE,  0x00000100
+.equ ABT_STACK_SIZE,  0x00000100
+.equ FIQ_STACK_SIZE,  0x00000100
+.equ IRQ_STACK_SIZE,  0x00000100
+.equ SYS_STACK_SIZE,  0x00000100
+
+ /*
+ ***************************************
+ * Interrupt vector table
+ ***************************************
+ */
+.section .vectors
+.code 32
+
+.global system_vectors
+system_vectors:
+    ldr pc, _vector_reset
+    ldr pc, _vector_undef
+    ldr pc, _vector_swi
+    ldr pc, _vector_pabt
+    ldr pc, _vector_dabt
+    ldr pc, _vector_resv
+    ldr pc, _vector_irq
+    ldr pc, _vector_fiq
+
+_vector_reset:
+    .word reset
+_vector_undef:
+    .word vector_undef
+_vector_swi:
+    .word vector_swi
+_vector_pabt:
+    .word vector_pabt
+_vector_dabt:
+    .word vector_dabt
+_vector_resv:
+    .word vector_resv
+_vector_irq:
+    .word vector_irq
+_vector_fiq:
+    .word vector_fiq
+
+.balignl    16,0xdeadbeef
+
+ /*
+ ***************************************
+ *  Stack and Heap Definitions 
+ ***************************************
+ */
+    .section .data
+    .space UND_STACK_SIZE
     .align 3
-    .global UND_STACK_START
-UND_STACK_START:
+    .global und_stack_start
+und_stack_start:
 
-    .space ABT_STK_SIZE
+    .space ABT_STACK_SIZE
     .align 3
-    .global ABT_STACK_START
-ABT_STACK_START:
+    .global abt_stack_start
+abt_stack_start:
 
-    .space FIQ_STK_SIZE
+    .space FIQ_STACK_SIZE
     .align 3
-    .global FIQ_STACK_START
-FIQ_STACK_START:
+    .global fiq_stack_start
+fiq_stack_start:
 
-    .space IRQ_STK_SIZE
+    .space IRQ_STACK_SIZE
     .align 3
-    .global IRQ_STACK_START
-IRQ_STACK_START:
+    .global irq_stack_start
+irq_stack_start:
 
-    .skip SYS_STK_SIZE
+    .skip SYS_STACK_SIZE
     .align 3
-    .global SYS_STACK_START
-SYS_STACK_START:
+    .global sys_stack_start
+sys_stack_start:
 
-    .space SVC_STK_SIZE
+    .space SVC_STACK_SIZE
     .align 3
-    .global SVC_STACK_START
-SVC_STACK_START:
-
-@;--------------Jump vector table-----------------------------------------------
-    .section .init, "ax"
-    .arm
-
-    .global start
-start:
-    LDR     PC, vector_reset
-    LDR     PC, vector_undef
-    LDR     PC, vector_swi
-    LDR     PC, vector_pabt
-    LDR     PC, vector_dabt
-    LDR     PC, vector_resv
-    LDR     PC, vector_irq
-    LDR     PC, vector_fiq
-
-vector_reset:
-    .word  Reset_Handler
-vector_undef:
-    .word  Undef_Handler
-vector_swi:
-    .word  SWI_Handler
-vector_pabt:
-    .word  PAbt_Handler
-vector_dabt:
-    .word  DAbt_Handler
-vector_resv:
-    .word  Resv_Handler
-vector_irq:
-    .word  IRQ_Handler
-vector_fiq:
-    .word  FIQ_Handler
-
-    .balignl     16,0xdeadbeef
-
-@;----------------- Reset Handler ---------------------------------------------
-    .global rt_low_level_init
-    .global main
-    .global Reset_Handler
-Reset_Handler:
-    @; Set the cpu to SVC32 mode
-    MRS     R0, CPSR
-    BIC     R0, R0, #MODEMASK
-    ORR     R0, R0, #MODE_SVC|NOINT
-    MSR     CPSR_cxsf, R0
+    .global svc_stack_start
+svc_stack_start:
+
+/*
+ ***************************************
+ * Startup Code 
+ ***************************************
+ */
+    .section .text
+    .global reset
+reset:
+    /* Enter svc mode and mask interrupts */
+    mrs r0, cpsr
+    bic r0, r0, #MODEMASK
+    orr r0, r0, #MODE_SVC|NOINT
+    msr cpsr_cxsf, r0
+
+    /* init cpu  */
+    bl  cpu_init_crit
+    
+    /* todo:copyself to link address */
+    
+    /* Copy vector to the correct address */
+    ldr r0, =system_vectors
+    mrc p15, 0, r2, c1, c0, 0
+    ands r2, r2, #(1 << 13)
+    ldreq r1, =0x00000000
+    ldrne r1, =0xffff0000
+    ldmia r0!, {r2-r8, r10}
+    stmia r1!, {r2-r8, r10}
+    ldmia r0!, {r2-r8, r10}
+    stmia r1!, {r2-r8, r10}
+
+    /* turn off the watchdog */
+    ldr r0, =0x01C20CB8
+    mov     r1, #0x0
+    str     r1, [r0]
+
+    /* mask all IRQs source */
+    ldr r1, =0xffffffff
+    ldr r0, =0x01C20430
+    str r1, [r0], #0x04
+    str r1, [r0]
+    
+    /* Call low level init function */
+    ldr     sp, =svc_stack_start
+    ldr     r0, =rt_low_level_init
+    blx     r0
+    
+    /* init stack */
+    bl stack_setup
     
-    @; Set CO-Processor
-    @; little-end锛宒isbale I/D Cache MMU, vector table is 0x00000000
-    MRC     P15, 0, R0, C1, C0, 0   @; Read CP15
-    LDR     R1, =0x00003085         @; set clear bits
-    BIC     R0, R0, R1
-    MCR     P15, 0, R0, C1, C0, 0   @; Write CP15
-
-    @; Call low level init function,
-    @; disable and clear all IRQs, Init MMU, Init interrupt controller, etc.
-    LDR     SP, =SVC_STACK_START
-    LDR     R0, =rt_low_level_init
-    BLX     R0
-
-Setup_Stack:
-    @; Setup Stack for each mode
-    MRS     R0, CPSR
-    BIC     R0, R0, #MODEMASK
-
-    ORR     R1, R0, #MODE_UND|NOINT
-    MSR     CPSR_cxsf, R1            @; Undef mode
-    LDR     SP, =UND_STACK_START
-
-    ORR     R1, R0, #MODE_ABT|NOINT
-    MSR     CPSR_cxsf, R1            @; Abort mode
-    LDR     SP, =ABT_STACK_START
-
-    ORR     R1, R0, #MODE_IRQ|NOINT
-    MSR     CPSR_cxsf, R1            @; IRQ mode
-    LDR     SP, =IRQ_STACK_START
-
-    ORR     R1, R0, #MODE_FIQ|NOINT
-    MSR     CPSR_cxsf, R1            @; FIQ mode
-    LDR     SP, =FIQ_STACK_START
-
-    ORR     R1, R0, #MODE_SYS|NOINT
-    MSR     CPSR_cxsf,R1             @; SYS/User mode
-    LDR     SP, =SYS_STACK_START
-
-    ORR     R1, R0, #MODE_SVC|NOINT
-    MSR     CPSR_cxsf, R1            @; SVC mode
-    LDR     SP, =SVC_STACK_START
-
-    @; clear .bss
-    MOV     R0, #0                   @; get a zero
-    LDR     R1, =__bss_start__       @; bss start
-    LDR     R2, =__bss_end__         @; bss end
+    /* clear bss */
+    mov     r0, #0
+    ldr     r1, =__bss_start
+    ldr     r2, =__bss_end
 
 bss_clear_loop:
-    CMP     R1, R2                   @; check if data to clear
-    STRLO   R0, [R1], #4             @; clear 4 bytes
-    BLO     bss_clear_loop           @; loop until done
-
-    @; call C++ constructors of global objects
-    LDR     R0, =__ctors_start__
-    LDR     R1, =__ctors_end__
+    cmp     r1, r2
+    strlo   r0, [r1], #4
+    blo     bss_clear_loop
+       
+    /* call c++ constructors of global objects */
+    /*
+    ldr     r0, =__ctors_start__
+    ldr     r1, =__ctors_end__
 
 ctor_loop:
-    CMP     R0, R1
-    BEQ     ctor_end
-    LDR     R2, [R0], #4
-    STMFD   SP!, {R0-R1}
-    MOV     LR, PC
-    BX      R2
-    LDMFD   SP!, {R0-R1}
-    B       ctor_loop
+    cmp     r0, r1
+    beq     ctor_end
+    ldr     r2, [r0], #4
+    stmfd   sp!, {r0-r1}
+    mov     lr, pc
+    bx      r2
+    ldmfd   sp!, {r0-r1}
+    b       ctor_loop
 ctor_end:
+    */
+    /* start RT-Thread Kernel */
+    ldr     pc, _rtthread_startup
+_rtthread_startup:
+    .word  rtthread_startup
+
+
+
+cpu_init_crit:
+    /* invalidate I/D caches */
+    mov r0, #0
+    mcr p15, 0, r0, c7, c7, 0
+    mcr p15, 0, r0, c8, c7, 0
+
+    /* disable MMU stuff and caches */
+    mrc p15, 0, r0, c1, c0, 0
+    bic r0, r0, #0x00002300
+    bic r0, r0, #0x00000087
+    orr r0, r0, #0x00000002
+    orr r0, r0, #0x00001000
+    mcr p15, 0, r0, c1, c0, 0
+
+    bx lr
+ 
+stack_setup:
+    /* Setup Stack for each mode */
+    mrs     r0, cpsr
+    bic     r0, r0, #MODEMASK
+
+    orr     r1, r0, #MODE_UND|NOINT
+    msr     cpsr_cxsf, r1
+    ldr     sp, =und_stack_start
+
+    orr     r1, r0, #MODE_ABT|NOINT
+    msr     cpsr_cxsf, r1
+    ldr     sp, =abt_stack_start
+
+    orr     r1, r0, #MODE_IRQ|NOINT
+    msr     cpsr_cxsf, r1
+    ldr     sp, =irq_stack_start
+
+    orr     r1, r0, #MODE_FIQ|NOINT
+    msr     cpsr_cxsf, r1
+    ldr     sp, =fiq_stack_start
+
+    orr     r1, r0, #MODE_SYS|NOINT
+    msr     cpsr_cxsf,r1
+    ldr     sp, =sys_stack_start
+
+    orr     r1, r0, #MODE_SVC|NOINT
+    msr     cpsr_cxsf, r1
+    ldr     sp, =svc_stack_start
+
+    bx      lr
+ 
+/*
+ ***************************************
+ * exception handlers 
+ ***************************************
+ */
+    /* Interrupt */
+vector_fiq:
+    stmfd   sp!,{r0-r7,lr}
+    bl      rt_hw_trap_fiq
+    ldmfd   sp!,{r0-r7,lr}
+    subs    pc, lr, #4
 
-    @; Enter the C code
-    LDR     R0, =rtthread_startup
-    BLX     R0
-
-@;----------------- Exception Handler -----------------------------------------
-    .global rt_hw_trap_udef
-    .global rt_hw_trap_swi
-    .global rt_hw_trap_pabt
-    .global rt_hw_trap_dabt
-    .global rt_hw_trap_resv
-    .global rt_hw_trap_irq
-    .global rt_hw_trap_fiq
-
-    .global rt_interrupt_enter
-    .global rt_interrupt_leave
-    .global rt_thread_switch_interrupt_flag
-    .global rt_interrupt_from_thread
-    .global rt_interrupt_to_thread
-    
-    .align  5
-Undef_Handler:
-    SUB     SP, SP, #S_FRAME_SIZE
-    STMIA   SP, {R0 - R12}          @; Calling R0-R12
-    ADD     R8, SP, #S_PC
-    STMDB   R8, {SP, LR}            @; Calling SP, LR
-    STR     LR, [R8, #0]            @; Save calling PC
-    MRS     R6, SPSR
-    STR     R6, [R8, #4]            @; Save CPSR
-    STR     R0, [R8, #8]            @; Save SPSR
-    MOV     R0, SP
-    BL      rt_hw_trap_udef
-    
-    .align  5
-SWI_Handler:
-    BL      rt_hw_trap_swi
-    
-    .align  5
-PAbt_Handler:
-    BL      rt_hw_trap_pabt
-
-    .align  5
-DAbt_Handler:
-    SUB     SP, SP, #S_FRAME_SIZE
-    STMIA   SP, {R0 - R12}          @; Calling R0-R12
-    ADD     R8, SP, #S_PC
-    STMDB   R8, {SP, LR}            @; Calling SP, LR
-    STR     LR, [R8, #0]            @; Save calling PC
-    MRS     R6, SPSR
-    STR     R6, [R8, #4]            @; Save CPSR
-    STR     R0, [R8, #8]            @; Save SPSR
-    MOV     R0, SP
-    BL      rt_hw_trap_dabt
-
-    .align  5
-Resv_Handler:
-    BL      rt_hw_trap_resv
-
-    .align  5
-FIQ_Handler:
-    STMFD   SP!, {R0-R7,LR}
-    BL      rt_hw_trap_fiq
-    LDMFD   SP!, {R0-R7,LR}
-    SUBS    PC, LR, #4
-
-    .align  5
-IRQ_Handler:
-    STMFD   SP!, {R0-R12,LR}
-    BL      rt_interrupt_enter
-    BL      rt_hw_trap_irq
-    BL      rt_interrupt_leave
-
-    @; If rt_thread_switch_interrupt_flag set,
-    @; jump to rt_hw_context_switch_interrupt_do and don't return
-    LDR     R0, =rt_thread_switch_interrupt_flag
-    LDR     R1, [R0]
-    CMP     R1, #1
-    BEQ     rt_hw_context_switch_interrupt_do
-
-    LDMFD   SP!, {R0-R12,LR}
-    SUBS    PC, LR, #4
-
-@;------ void rt_hw_context_switch_interrupt_do(rt_base_t flag) -----------------
-rt_hw_context_switch_interrupt_do:
-    MOV     R1,  #0                 @; Clear flag
-    STR     R1,  [R0]               @; Save to flag variable
+vector_irq:
+    stmfd   sp!, {r0-r12,lr}
+
+    bl      rt_interrupt_enter
+    bl      rt_hw_trap_irq
+    bl      rt_interrupt_leave
 
-    LDMFD   SP!, {R0-R12,LR}        @; Reload saved registers
-    STMFD   SP, {R0-R2}             @; Save R0-R2
-    SUB     R1,  SP, #4*3           @; Save old task's SP to R1
-    SUB     R2,  LR, #4             @; Save old task's PC to R2
+    ldr     r0, =rt_thread_switch_interrupt_flag
+    ldr     r1, [r0]
+    cmp     r1, #1
+    beq     rt_hw_context_switch_interrupt_do
 
-    MRS     R0,  SPSR               @; Get CPSR of interrupt thread
+    ldmfd   sp!, {r0-r12,lr}
+    subs    pc,  lr, #4
 
-    MSR     CPSR_c, #MODE_SVC|NOINT @; Switch to SVC mode and no interrupt
+rt_hw_context_switch_interrupt_do:
+    mov     r1,  #0         
+    str     r1,  [r0]
+
+    mov     r1, sp          
+    add     sp, sp, #4*4
+    ldmfd   sp!, {r4-r12,lr}
+    mrs     r0,  spsr       
+    sub     r2,  lr, #4     
+
+    msr     cpsr_c, #I_BIT|F_BIT|MODE_SVC
+
+    stmfd   sp!, {r2}       
+    stmfd   sp!, {r4-r12,lr}
+    ldmfd   r1,  {r1-r4}    
+    stmfd   sp!, {r1-r4}    
+    stmfd   sp!, {r0}       
+
+    ldr     r4,  =rt_interrupt_from_thread
+    ldr     r5,  [r4]
+    str     sp,  [r5]       
+
+    ldr     r6,  =rt_interrupt_to_thread
+    ldr     r6,  [r6]
+    ldr     sp,  [r6]       
+
+    ldmfd   sp!, {r4}       
+    msr     spsr_cxsf, r4
+
+    ldmfd   sp!, {r0-r12,lr,pc}^ 
+
+    /* Exception */
+.macro push_svc_reg
+    sub     sp, sp, #17 * 4
+    stmia   sp, {r0 - r12} 
+    mov     r0, sp
+    mrs     r6, spsr       
+    str     lr, [r0, #15*4]
+    str     r6, [r0, #16*4]
+    str     sp, [r0, #13*4]
+    str     lr, [r0, #14*4]
+.endm
 
-    STMFD   SP!, {R2}               @; Push old task's PC
-    STMFD   SP!, {R3-R12,LR}        @; Push old task's LR,R12-R3
-    LDMFD   R1, {R1-R3}
-    STMFD   SP!, {R1-R3}            @; Push old task's R2-R0
-    STMFD   SP!, {R0}               @; Push old task's CPSR
+vector_swi:
+    push_svc_reg
+    bl      rt_hw_trap_swi
+    b       .
 
-    LDR     R4,  =rt_interrupt_from_thread
-    LDR     R5,  [R4]               @; R5 = stack ptr in old tasks's TCB
-    STR     SP,  [R5]               @; Store SP in preempted tasks's TCB
+vector_undef:
+    push_svc_reg
+    bl      rt_hw_trap_udef
+    b       .
 
-    LDR     R6,  =rt_interrupt_to_thread
-    LDR     R6,  [R6]               @; R6 = stack ptr in new tasks's TCB
-    LDR     SP,  [R6]               @; Get new task's stack pointer
+vector_pabt:
+    push_svc_reg
+    bl      rt_hw_trap_pabt
+    b       .
 
-    LDMFD   SP!, {R4}               @; Pop new task's SPSR
-    MSR     SPSR_cxsf, R4
+vector_dabt:
+    push_svc_reg
+    bl      rt_hw_trap_dabt
+    b       .
 
-    LDMFD   SP!, {R0-R12,LR,PC}^    @; pop new task's R0-R12,LR & PC SPSR 2 CPSR
+vector_resv:
+    push_svc_reg
+    bl      rt_hw_trap_resv
+    b       .

libcpu/arm/arm926/trap.c

@@ -41,14 +41,18 @@ struct rt_hw_register
     rt_uint32_t cpsr;
     rt_uint32_t ORIG_r0;
 };
-
+static rt_err_t (*rt_exception_hook)(void *context) = RT_NULL;
+void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context))
+{
+    rt_exception_hook = exception_handle;
+}
 /**
  * this function will show registers of CPU
  *
  * @param regs the registers point
  */
 
-void rt_hw_show_register (struct rt_hw_register *regs)
+void rt_hw_show_register(struct rt_hw_register *regs)
 {
     rt_kprintf("Execption:\n");
     rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n",
@@ -74,6 +78,13 @@ void rt_hw_show_register (struct rt_hw_register *regs)
  */
 void rt_hw_trap_udef(struct rt_hw_register *regs)
 {
+    if (rt_exception_hook != RT_NULL)
+    {
+        rt_err_t result;
+
+        result = rt_exception_hook(regs);
+        if (result == RT_EOK) return;
+    }
     rt_hw_show_register(regs);
 
     rt_kprintf("undefined instruction\n");
@@ -96,6 +107,13 @@ void rt_hw_trap_udef(struct rt_hw_register *regs)
  */
 void rt_hw_trap_swi(struct rt_hw_register *regs)
 {
+    if (rt_exception_hook != RT_NULL)
+    {
+        rt_err_t result;
+
+        result = rt_exception_hook(regs);
+        if (result == RT_EOK) return;
+    }
     rt_hw_show_register(regs);
 
     rt_kprintf("software interrupt\n");
@@ -112,6 +130,13 @@ void rt_hw_trap_swi(struct rt_hw_register *regs)
  */
 void rt_hw_trap_pabt(struct rt_hw_register *regs)
 {
+    if (rt_exception_hook != RT_NULL)
+    {
+        rt_err_t result;
+
+        result = rt_exception_hook(regs);
+        if (result == RT_EOK) return;
+    }
     rt_hw_show_register(regs);
 
     rt_kprintf("prefetch abort\n");
@@ -133,6 +158,13 @@ void rt_hw_trap_pabt(struct rt_hw_register *regs)
  */
 void rt_hw_trap_dabt(struct rt_hw_register *regs)
 {
+    if (rt_exception_hook != RT_NULL)
+    {
+        rt_err_t result;
+
+        result = rt_exception_hook(regs);
+        if (result == RT_EOK) return;
+    }
     rt_hw_show_register(regs);
 
     rt_kprintf("data abort\n");
@@ -153,55 +185,26 @@ void rt_hw_trap_dabt(struct rt_hw_register *regs)
  */
 void rt_hw_trap_resv(struct rt_hw_register *regs)
 {
+    if (rt_exception_hook != RT_NULL)
+    {
+        rt_err_t result;
+
+        result = rt_exception_hook(regs);
+        if (result == RT_EOK) return;
+    }
     rt_kprintf("not used\n");
     rt_hw_show_register(regs);
     rt_hw_cpu_shutdown();
 }
 
-extern struct rt_irq_desc irq_desc[];
-extern rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq);
-extern void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id);
-    
-void rt_hw_trap_irq()
-{
-    rt_isr_handler_t isr_func;
-    rt_uint32_t irq;
-    void *param;
-
-    /* get irq number */
-    irq = rt_hw_interrupt_get_active(INT_IRQ);
+extern void rt_interrupt_dispatch(void);
 
-    /* get interrupt service routine */
-    isr_func = irq_desc[irq].handler;
-    param = irq_desc[irq].param;
-
-    /* turn to interrupt service routine */
-    isr_func(irq, param);
-
-    rt_hw_interrupt_ack(INT_IRQ, irq);
-#ifdef RT_USING_INTERRUPT_INFO
-    irq_desc[irq].counter ++;
-#endif
+void rt_hw_trap_irq(void)
+{
+    rt_interrupt_dispatch();
 }
 
-void rt_hw_trap_fiq()
+void rt_hw_trap_fiq(void)
 {
-    rt_isr_handler_t isr_func;
-    rt_uint32_t irq;
-    void *param;
-
-    /* get irq number */
-    irq = rt_hw_interrupt_get_active(INT_FIQ);
-
-    /* get interrupt service routine */
-    isr_func = irq_desc[irq].handler;
-    param = irq_desc[irq].param;
-
-    /* turn to interrupt service routine */
-    isr_func(irq, param);
-
-    rt_hw_interrupt_ack(INT_FIQ, irq);
-#ifdef RT_USING_INTERRUPT_INFO
-    irq_desc[irq].counter ++;
-#endif
+    rt_interrupt_dispatch();
 }