Merge pull request #2173 from SummerGGift/add_stm32_new_framework

[bsp][stm32] optimize stm32 bsp

bsp/stm32/libraries/HAL_Drivers/config/f0/adc_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_ADC1
 #ifndef ADC1_CONFIG
 #define ADC1_CONFIG                                                 \
@@ -35,4 +39,8 @@
 #endif /* ADC1_CONFIG */
 #endif /* BSP_USING_ADC1 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __ADC_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* DMA1 channel1  */
 
 /* DMA1 channel2-3 DMA2 channel1-2 */
@@ -34,4 +38,8 @@
 #endif
 /* DMA1 channel4-7 DMA2 channel3-5 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __DMA_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f0/pwm_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_PWM2
 #ifndef PWM2_CONFIG
 #define PWM2_CONFIG                             \
@@ -57,4 +61,8 @@
 #endif /* PWM5_CONFIG */
 #endif /* BSP_USING_PWM5 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __PWM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_SPI1
 #define SPI1_BUS_CONFIG                                  \
     {                                                    \
@@ -30,6 +34,10 @@
 #define SPI1_DMA_TX_IRQHandler           DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
 #endif
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__SPI_CONFIG_H__ */
 
 

bsp/stm32/libraries/HAL_Drivers/config/f0/tim_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifndef TIM_DEV_INFO_CONFIG
 #define TIM_DEV_INFO_CONFIG                     \
     {                                           \
@@ -56,4 +60,8 @@
 #endif /* TIM17_CONFIG */
 #endif /* BSP_USING_TIM17 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __TIM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f0/uart_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
 #define UART1_CONFIG                                                \
@@ -57,4 +61,8 @@
 #endif /* UART2_DMA_CONFIG */
 #endif /* BSP_UART2_RX_USING_DMA */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __UART_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f1/adc_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_ADC1
 #ifndef ADC1_CONFIG
 #define ADC1_CONFIG                                                \
@@ -61,4 +65,8 @@
 #endif /* ADC3_CONFIG */
 #endif /* BSP_USING_ADC3 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __ADC_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f1/dma_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* DMA1 channel1 */
 /* DMA1 channel2 */
 #if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
@@ -88,5 +92,8 @@
 /* DMA2 channel4 */
 /* DMA2 channel5 */
 
+#ifdef __cplusplus
+}
+#endif
 
 #endif /* __DMA_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_PWM2
 #ifndef PWM2_CONFIG
 #define PWM2_CONFIG                             \
@@ -57,4 +61,8 @@
 #endif /* PWM5_CONFIG */
 #endif /* BSP_USING_PWM5 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __PWM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f1/sdio_config.h

@@ -14,6 +14,10 @@
 #include <rtthread.h>
 #include "stm32f1xx_hal.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_SDIO
 #define SDIO_BUS_CONFIG                                  \
     {                                                    \
@@ -28,6 +32,10 @@
 
 #endif
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__SDIO_CONFIG_H__ */
 
 

bsp/stm32/libraries/HAL_Drivers/config/f1/spi_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
 #define SPI1_BUS_CONFIG                             \
@@ -110,6 +114,10 @@
 #endif /* SPI3_RX_DMA_CONFIG */
 #endif /* BSP_SPI3_RX_USING_DMA */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__SPI_CONFIG_H__ */
 
 

bsp/stm32/libraries/HAL_Drivers/config/f1/tim_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifndef TIM_DEV_INFO_CONFIG
 #define TIM_DEV_INFO_CONFIG                     \
     {                                           \
@@ -67,4 +71,8 @@
 #endif /* TIM5_CONFIG */
 #endif /* BSP_USING_TIM5 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __TIM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f1/uart_config.h

@@ -15,6 +15,10 @@
 #include <rtthread.h>
 #include "dma_config.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
 #define UART1_CONFIG                                                \
@@ -123,4 +127,8 @@
 #endif /* UART5_DMA_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif

bsp/stm32/libraries/HAL_Drivers/config/f4/adc_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_ADC1
 #ifndef ADC1_CONFIG
 #define ADC1_CONFIG                                                 \
@@ -76,4 +80,8 @@
 #endif /* ADC3_CONFIG */
 #endif /* BSP_USING_ADC3 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __ADC_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* DMA1 stream0 */
 #if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE)
 #define SPI3_DMA_RX_IRQHandler           DMA1_Stream0_IRQHandler
@@ -205,5 +209,9 @@
 
 /* DMA2 stream7 */
 
+#ifdef __cplusplus
+}
+#endif
+
 
 #endif /* __DMA_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f4/pwm_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_PWM2
 #ifndef PWM2_CONFIG
 #define PWM2_CONFIG                             \
@@ -57,4 +61,8 @@
 #endif /* PWM5_CONFIG */
 #endif /* BSP_USING_PWM5 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __PWM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f4/sdio_config.h

@@ -14,6 +14,10 @@
 #include <rtthread.h>
 #include "stm32f4xx_hal.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_SDIO
 #define SDIO_BUS_CONFIG                                  \
     {                                                    \
@@ -30,6 +34,10 @@
 
 #endif
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__SDIO_CONFIG_H__ */
 
 

bsp/stm32/libraries/HAL_Drivers/config/f4/spi_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
 #define SPI1_BUS_CONFIG                             \
@@ -184,4 +188,8 @@
 #endif /* SPI5_RX_DMA_CONFIG */
 #endif /* BSP_SPI5_RX_USING_DMA */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__SPI_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f4/tim_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifndef TIM_DEV_INFO_CONFIG
 #define TIM_DEV_INFO_CONFIG                     \
     {                                           \
@@ -56,4 +60,8 @@
 #endif /* TIM14_CONFIG */
 #endif /* BSP_USING_TIM14 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __TIM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f4/uart_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
 #define UART1_CONFIG                                                \
@@ -129,4 +133,8 @@
 #endif /* UART5_DMA_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif

bsp/stm32/libraries/HAL_Drivers/config/f7/adc_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_ADC1
 #ifndef ADC1_CONFIG
 #define ADC1_CONFIG                                                 \
@@ -76,4 +80,8 @@
 #endif /* ADC3_CONFIG */
 #endif /* BSP_USING_ADC3 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __ADC_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* DMA1 stream0 */
 #if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE)
 #define SPI3_DMA_RX_IRQHandler           DMA1_Stream0_IRQHandler
@@ -218,4 +222,8 @@
 #define QSPI_DMA_IRQ                     DMA2_Stream7_IRQn
 #endif
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __DMA_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f7/pwm_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_PWM2
 #ifndef PWM2_CONFIG
 #define PWM2_CONFIG                             \
@@ -57,4 +61,8 @@
 #endif /* PWM5_CONFIG */
 #endif /* BSP_USING_PWM5 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __PWM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f7/qspi_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_QSPI
 #ifndef QSPI_BUS_CONFIG
 #define QSPI_BUS_CONFIG                                        \
@@ -45,4 +49,8 @@
 #define QSPI_IRQn                   QUADSPI_IRQn
 #define QSPI_IRQHandler             QUADSPI_IRQHandler
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __QSPI_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f7/sdio_config.h

@@ -14,6 +14,10 @@
 #include <rtthread.h>
 #include "stm32f7xx_hal.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_SDIO
 #define SDIO_BUS_CONFIG                                  \
     {                                                    \
@@ -30,6 +34,10 @@
 
 #endif
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__SDIO_CONFIG_H__ */
 
 

bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
 #define SPI1_BUS_CONFIG                             \
@@ -183,4 +187,8 @@
 #endif /* SPI5_RX_DMA_CONFIG */
 #endif /* BSP_SPI5_RX_USING_DMA */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__SPI_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f7/tim_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifndef TIM_DEV_INFO_CONFIG
 #define TIM_DEV_INFO_CONFIG                     \
     {                                           \
@@ -56,4 +60,8 @@
 #endif /* TIM14_CONFIG */
 #endif /* BSP_USING_TIM14 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __TIM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/f7/uart_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG    
 #define UART1_CONFIG                                                \
@@ -129,4 +133,8 @@
 #endif /* UART5_DMA_CONFIG */
 #endif /* BSP_UART5_RX_USING_DMA */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif

bsp/stm32/libraries/HAL_Drivers/config/l4/adc_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_ADC1
 #ifndef ADC1_CONFIG
 #define ADC1_CONFIG                                                 \
@@ -79,4 +83,8 @@
 #endif /* ADC3_CONFIG */
 #endif /* BSP_USING_ADC3 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __ADC_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h

@@ -14,6 +14,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* DMA1 channel1 */
 
 /* DMA1 channel2 */
@@ -124,4 +128,8 @@
 #define QSPI_DMA_IRQ                    DMA2_Channel7_IRQn
 #endif
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __DMA_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/l4/pwm_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_PWM2
 #ifndef PWM2_CONFIG
 #define PWM2_CONFIG                             \
@@ -57,4 +61,8 @@
 #endif /* PWM5_CONFIG */
 #endif /* BSP_USING_PWM5 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __PWM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/l4/qspi_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_QSPI
 #ifndef QSPI_BUS_CONFIG
 #define QSPI_BUS_CONFIG                                        \
@@ -45,4 +49,8 @@
 #define QSPI_IRQn                   QUADSPI_IRQn
 #define QSPI_IRQHandler             QUADSPI_IRQHandler
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __QSPI_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-06     SummerGift   change to new framework
+ * 2018-11-06     SummerGift   first version
  */
 
 #ifndef __SPI_CONFIG_H__
@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_SPI1
 #ifndef SPI1_BUS_CONFIG
 #define SPI1_BUS_CONFIG                                     \
@@ -81,4 +85,8 @@
 
 #endif
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__SPI_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/l4/tim_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifndef TIM_DEV_INFO_CONFIG
 #define TIM_DEV_INFO_CONFIG                     \
     {                                           \
@@ -56,4 +60,8 @@
 #endif /* TIM17_CONFIG */
 #endif /* BSP_USING_TIM17 */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __TIM_CONFIG_H__ */

bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h

@@ -13,6 +13,10 @@
 
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if defined(BSP_USING_UART1)
 #ifndef UART1_CONFIG
 #define UART1_CONFIG                                                \
@@ -57,6 +61,10 @@
         .dma_irq  = UART2_RX_DMA_IRQ,                               \
     }
 #endif /* UART2_DMA_CONFIG */
-#endif /* BSP_UART2_RX_USING_DMA */  
+#endif /* BSP_UART2_RX_USING_DMA */
+
+#ifdef __cplusplus
+}
+#endif 
 
 #endif

bsp/stm32/libraries/HAL_Drivers/drv_common.h

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-11-7      SummerGift   change to new framework
+ * 2018-11-7      SummerGift   first version
  */
 
 #ifndef __DRV_COMMON_H__
@@ -16,6 +16,10 @@
 #include <rtdevice.h>
 #include <board.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 void _Error_Handler(char *s, int num);
 
 #ifndef Error_Handler
@@ -24,4 +28,8 @@ void _Error_Handler(char *s, int num);
 
 #define DMA_NOT_AVAILABLE ((DMA_INSTANCE_TYPE *)0xFFFFFFFFU)
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif

bsp/stm32/libraries/HAL_Drivers/drv_config.h

@@ -14,6 +14,10 @@
 #include <board.h>
 #include <rtthread.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if defined(SOC_SERIES_STM32F0)
 #include "f0/dma_config.h"
 #include "f0/uart_config.h"
@@ -56,4 +60,8 @@
 #include "l4/pwm_config.h"
 #endif
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif

bsp/stm32/libraries/HAL_Drivers/drv_dma.h

@@ -16,6 +16,10 @@
 #include <rthw.h>
 #include <drv_common.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4)
 #define DMA_INSTANCE_TYPE              DMA_Channel_TypeDef
 #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
@@ -36,4 +40,8 @@ struct dma_config {
 #endif
 };
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*__DRV_DMA_H_ */

bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash.h

@@ -16,8 +16,16 @@
 #include <rthw.h>
 #include <drv_common.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 int stm32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size);
 int stm32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size);
 int stm32_flash_erase(rt_uint32_t addr, size_t size);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif  /* __DRV_FLASH_H__ */

bsp/stm32/libraries/templates/stm32f0xx/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f0xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (256 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -38,4 +42,8 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __BOARD_H__ */

bsp/stm32/libraries/templates/stm32f0xx/board/linker_scripts/link.icf

@@ -25,4 +25,4 @@ do not initialize  { section .noinit };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
 
 place in ROM_region   { readonly };
-place in RAM_region   { readwrite, last block CSTACK};
+place in RAM_region   { readwrite, last block CSTACK};

bsp/stm32/libraries/templates/stm32f10x/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f1xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (128 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -38,4 +42,8 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __BOARD_H__ */

bsp/stm32/libraries/templates/stm32f10x/board/linker_scripts/link.icf

@@ -25,4 +25,4 @@ do not initialize  { section .noinit };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
 
 place in ROM_region   { readonly };
-place in RAM_region   { readwrite, last block CSTACK};
+place in RAM_region   { readwrite, last block CSTACK};

bsp/stm32/libraries/templates/stm32f4xx/board/SConscript

@@ -34,4 +34,4 @@ elif rtconfig.CROSS_TOOL == 'iar':
 CPPDEFINES = ['STM32F407xx']
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
 
-Return('group')
+Return('group')

bsp/stm32/libraries/templates/stm32f4xx/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (1024 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -37,5 +41,9 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/libraries/templates/stm32f4xx/board/linker_scripts/link.icf

@@ -25,4 +25,4 @@ do not initialize  { section .noinit };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
 
 place in ROM_region   { readonly };
-place in RAM_region   { readwrite, last block CSTACK};
+place in RAM_region   { readwrite, last block CSTACK};

bsp/stm32/libraries/templates/stm32f7xx/board/SConscript

@@ -24,4 +24,4 @@ elif rtconfig.CROSS_TOOL == 'iar':
 CPPDEFINES = ['STM32F767xx']
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
 
-Return('group')
+Return('group')

bsp/stm32/libraries/templates/stm32f7xx/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f7xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (1024 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -37,4 +41,8 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif

bsp/stm32/libraries/templates/stm32f7xx/board/linker_scripts/link.icf

@@ -25,4 +25,4 @@ do not initialize  { section .noinit };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
 
 place in ROM_region   { readonly };
-place in RAM_region   { readwrite, last block CSTACK};
+place in RAM_region   { readwrite, last block CSTACK};

bsp/stm32/libraries/templates/stm32f7xx/rtconfig.py

@@ -5,6 +5,9 @@ ARCH='arm'
 CPU='cortex-m7'
 CROSS_TOOL='gcc'
 
+# bsp lib config
+BSP_LIBRARY_TYPE = None
+
 if os.getenv('RTT_CC'):
     CROSS_TOOL = os.getenv('RTT_CC')
 if os.getenv('RTT_ROOT'):
@@ -14,7 +17,7 @@ if os.getenv('RTT_ROOT'):
 # EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
 if  CROSS_TOOL == 'gcc':
     PLATFORM 	= 'gcc'
-    EXEC_PATH 	= '/usr/local/Cellar/arm-none-eabi-gcc/7-2017-q4-major/gcc/bin/'
+    EXEC_PATH 	= r'C:\Users\XXYYZZ'
 elif CROSS_TOOL == 'keil':
     PLATFORM 	= 'armcc'
     EXEC_PATH 	= r'C:/Keil_v5'
@@ -31,7 +34,6 @@ if PLATFORM == 'gcc':
     # toolchains
     PREFIX = 'arm-none-eabi-'
     CC = PREFIX + 'gcc'
-    CXX = PREFIX + 'g++'
     AS = PREFIX + 'gcc'
     AR = PREFIX + 'ar'
     CXX = PREFIX + 'g++'
@@ -40,56 +42,48 @@ if PLATFORM == 'gcc':
     SIZE = PREFIX + 'size'
     OBJDUMP = PREFIX + 'objdump'
     OBJCPY = PREFIX + 'objcopy'
-    STRIP = PREFIX + 'strip'
 
-    DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
-    CFLAGS = DEVICE + ' -std=c99 -g -Wall'
+    DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+    CFLAGS = DEVICE + ' -std=c99 -Dgcc'
     AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
-    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T rtthread.ld'
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
 
     CPATH = ''
     LPATH = ''
 
     if BUILD == 'debug':
-        CFLAGS += ' -O0 -gdwarf-2'
+        CFLAGS += ' -O0 -gdwarf-2 -g'
         AFLAGS += ' -gdwarf-2'
     else:
-        CFLAGS += ' -O2 -Os'
+        CFLAGS += ' -O2'
 
     POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
 
-    # module setting 
-    CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti '
-    M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
-    M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
-    M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\
-                                    ' -shared -fPIC -nostartfiles -static-libgcc'
-    M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
-
 elif PLATFORM == 'armcc':
     # toolchains
     CC = 'armcc'
-    CXX = 'armcc'
     AS = 'armasm'
     AR = 'armar'
     LINK = 'armlink'
     TARGET_EXT = 'axf'
 
-    DEVICE = ' --cpu Cortex-M7.fp.sp --fpu=FPv4-SP'
-    CFLAGS = DEVICE + ' --apcs=interwork '
-    AFLAGS = DEVICE
-    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter rtthread.sct'
-
-    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC'
-    LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/ARMCC/lib"'
+    DEVICE = ' --cpu Cortex-M7.fp.sp'
+    CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
 
-    EXEC_PATH += '/arm/bin40/'
+    CFLAGS += ' -D__MICROLIB '
+    AFLAGS += ' --pd "__MICROLIB SETA 1" '
+    LFLAGS += ' --library_type=microlib '
+    EXEC_PATH += '/ARM/ARMCC/bin/'
 
     if BUILD == 'debug':
         CFLAGS += ' -g -O0'
         AFLAGS += ' -g'
     else:
-        CFLAGS += ' -O2 -Otime'
+        CFLAGS += ' -O2'
 
     CXXFLAGS = CFLAGS
     POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
@@ -97,48 +91,45 @@ elif PLATFORM == 'armcc':
 elif PLATFORM == 'iar':
     # toolchains
     CC = 'iccarm'
-    CXX = 'iccarm'
     AS = 'iasmarm'
     AR = 'iarchive'
     LINK = 'ilinkarm'
     TARGET_EXT = 'out'
 
-    DEVICE = ''
+    DEVICE = '-Dewarm'
 
     CFLAGS = DEVICE
     CFLAGS += ' --diag_suppress Pa050'
-    CFLAGS += ' --no_cse' 
-    CFLAGS += ' --no_unroll' 
-    CFLAGS += ' --no_inline' 
-    CFLAGS += ' --no_code_motion' 
-    CFLAGS += ' --no_tbaa' 
-    CFLAGS += ' --no_clustering' 
-    CFLAGS += ' --no_scheduling' 
-    CFLAGS += ' --debug' 
-    CFLAGS += ' --endian=little' 
+    CFLAGS += ' --no_cse'
+    CFLAGS += ' --no_unroll'
+    CFLAGS += ' --no_inline'
+    CFLAGS += ' --no_code_motion'
+    CFLAGS += ' --no_tbaa'
+    CFLAGS += ' --no_clustering'
+    CFLAGS += ' --no_scheduling'
+    CFLAGS += ' --endian=little'
     CFLAGS += ' --cpu=Cortex-M7' 
     CFLAGS += ' -e' 
-    CFLAGS += ' --fpu=None'
-    CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'    
-    CFLAGS += ' -Ol'    
-    CFLAGS += ' --use_c++_inline'
+    CFLAGS += ' --fpu=VFPv5_sp'
+    CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
     CFLAGS += ' --silent'
     
-    AFLAGS = ''
+    AFLAGS = DEVICE
     AFLAGS += ' -s+' 
     AFLAGS += ' -w+' 
     AFLAGS += ' -r' 
     AFLAGS += ' --cpu Cortex-M7' 
-    AFLAGS += ' --fpu None' 
+    AFLAGS += ' --fpu VFPv5_sp' 
     AFLAGS += ' -S' 
     
-    LFLAGS = ' --config rtthread.icf'
-    LFLAGS += ' --redirect _Printf=_PrintfTiny' 
-    LFLAGS += ' --redirect _Scanf=_ScanfSmall' 
-    LFLAGS += ' --entry __iar_program_start'    
-    LFLAGS += ' --silent'
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
 
-    CXXFLAGS = CFLAGS
+    LFLAGS = ' --config "board/linker_scripts/link.icf"'
+    LFLAGS += ' --entry __iar_program_start'
 
     EXEC_PATH = EXEC_PATH + '/arm/bin/'
-    POST_ACTION = ''
+    POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'

bsp/stm32/libraries/templates/stm32l4xx/board/SConscript

@@ -36,4 +36,5 @@ elif rtconfig.CROSS_TOOL == 'iar':
 CPPDEFINES = ['STM32L475xx']
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
 
-Return('group')
+Return('group')
+

bsp/stm32/libraries/templates/stm32l4xx/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32l4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS       ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE               (512 * 1024)
 #define STM32_FLASH_END_ADDRESS        ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -28,5 +32,9 @@
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/libraries/templates/stm32l4xx/board/linker_scripts/link.icf

@@ -26,4 +26,4 @@ do not initialize  { section .noinit };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
 
 place in ROM_region   { readonly };
-place in RAM_region   { readwrite, last block CSTACK};
+place in RAM_region   { readwrite, last block CSTACK};

bsp/stm32/stm32f091-st-nucleo/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f0xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (256 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -38,4 +42,8 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __BOARD_H__ */

bsp/stm32/stm32f103-atk-nano/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f1xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (128 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -38,4 +42,8 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __BOARD_H__ */

bsp/stm32/stm32f103-fire-arbitrary/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f1xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
 #define STM32_SRAM_SIZE      64
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
@@ -38,4 +42,8 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __BOARD_H__ */

bsp/stm32/stm32f407-atk-explorer/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_SRAM_SIZE        (128)
 #define STM32_SRAM_END         (0x20000000 + STM32_SRAM_SIZE * 1024)
 
@@ -37,5 +41,9 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/stm32f407-st-discovery/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_SRAM_SIZE        (128)
 #define STM32_SRAM_END         (0x20000000 + STM32_SRAM_SIZE * 1024)
 
@@ -33,5 +37,9 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/stm32f411-st-nucleo/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (512 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -37,5 +41,9 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/stm32f429-armfly-v6/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef BSP_USING_GPIO
 #include "drv_gpio.h"
 #endif
@@ -46,5 +50,9 @@ extern int __bss_end;
 void SystemClock_Config(void);
 void MX_GPIO_Init(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/stm32f429-atk-apollo/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (1024 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -37,4 +41,8 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif

bsp/stm32/stm32f429-fire-challenger/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_SRAM_SIZE           (192)
 #define STM32_SRAM_END            (0x20000000 + STM32_SRAM_SIZE * 1024)
 
@@ -37,5 +41,9 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/stm32f767-atk-apollo/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f7xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE             (1024 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -37,5 +41,9 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/stm32f767-atk-apollo/rtconfig.py

@@ -36,6 +36,7 @@ if PLATFORM == 'gcc':
     CC = PREFIX + 'gcc'
     AS = PREFIX + 'gcc'
     AR = PREFIX + 'ar'
+    CXX = PREFIX + 'g++'
     LINK = PREFIX + 'gcc'
     TARGET_EXT = 'elf'
     SIZE = PREFIX + 'size'

bsp/stm32/stm32f767-fire-challenger/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32f7xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_SRAM_SIZE           (512)
 #define STM32_SRAM_END            (0x20000000 + STM32_SRAM_SIZE * 1024)
 
@@ -37,5 +41,9 @@ extern int __bss_end;
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 

bsp/stm32/stm32l475-atk-pandora/board/board.h

@@ -15,6 +15,10 @@
 #include <stm32l4xx.h>
 #include "drv_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define STM32_FLASH_START_ADRESS       ((uint32_t)0x08000000)
 #define STM32_FLASH_SIZE               (512 * 1024)
 #define STM32_FLASH_END_ADDRESS        ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
@@ -28,5 +32,9 @@
 
 void SystemClock_Config(void);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif