/* * Copyright (c) 2021-2023 HPMicro * * SPDX-License-Identifier: BSD-3-Clause * */ #ifndef HPM_PMIC_IOMUX_H #define HPM_PMIC_IOMUX_H /* IOC_PY00_FUNC_CTL function mux definitions */ #define IOC_PY00_FUNC_CTL_PGPIO_Y_00 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) #define IOC_PY00_FUNC_CTL_JTAG_TDO IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1) #define IOC_PY00_FUNC_CTL_PTMR_COMP_0 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2) #define IOC_PY00_FUNC_CTL_SOC_PY_00 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3) /* IOC_PY01_FUNC_CTL function mux definitions */ #define IOC_PY01_FUNC_CTL_PGPIO_Y_01 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) #define IOC_PY01_FUNC_CTL_JTAG_TDI IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1) #define IOC_PY01_FUNC_CTL_PTMR_CAPT_0 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2) #define IOC_PY01_FUNC_CTL_SOC_PY_01 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3) /* IOC_PY02_FUNC_CTL function mux definitions */ #define IOC_PY02_FUNC_CTL_PGPIO_Y_02 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) #define IOC_PY02_FUNC_CTL_JTAG_TCK IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1) #define IOC_PY02_FUNC_CTL_PTMR_COMP_1 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2) #define IOC_PY02_FUNC_CTL_SOC_PY_02 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3) /* IOC_PY03_FUNC_CTL function mux definitions */ #define IOC_PY03_FUNC_CTL_PGPIO_Y_03 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) #define IOC_PY03_FUNC_CTL_JTAG_TMS IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1) #define IOC_PY03_FUNC_CTL_PTMR_CAPT_1 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2) #define IOC_PY03_FUNC_CTL_SOC_PY_03 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3) /* IOC_PY04_FUNC_CTL function mux definitions */ #define IOC_PY04_FUNC_CTL_PGPIO_Y_04 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) #define IOC_PY04_FUNC_CTL_JTAG_TRST IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1) #define IOC_PY04_FUNC_CTL_PTMR_COMP_2 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2) #define IOC_PY04_FUNC_CTL_SOC_PY_04 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3) /* IOC_PY05_FUNC_CTL function mux definitions */ #define IOC_PY05_FUNC_CTL_PGPIO_Y_05 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) #define IOC_PY05_FUNC_CTL_PWDG_RST IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1) #define IOC_PY05_FUNC_CTL_PTMR_CAPT_2 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2) #define IOC_PY05_FUNC_CTL_SOC_PY_05 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3) /* IOC_PY06_FUNC_CTL function mux definitions */ #define IOC_PY06_FUNC_CTL_PGPIO_Y_06 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) #define IOC_PY06_FUNC_CTL_PUART_TXD IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1) #define IOC_PY06_FUNC_CTL_PTMR_COMP_3 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2) #define IOC_PY06_FUNC_CTL_SOC_PY_06 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3) /* IOC_PY07_FUNC_CTL function mux definitions */ #define IOC_PY07_FUNC_CTL_PGPIO_Y_07 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) #define IOC_PY07_FUNC_CTL_PUART_RXD IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1) #define IOC_PY07_FUNC_CTL_PTMR_CAPT_3 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2) #define IOC_PY07_FUNC_CTL_SOC_PY_07 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3) #endif /* HPM_PMIC_IOMUX_H */