hw_usb.h 226 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620
  1. //*****************************************************************************
  2. //
  3. // hw_usb.h - Macros for use in accessing the USB registers.
  4. //
  5. // Copyright (c) 2007-2010 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 6459 of the Stellaris Firmware Development Package.
  22. //
  23. //*****************************************************************************
  24. #ifndef __HW_USB_H__
  25. #define __HW_USB_H__
  26. //*****************************************************************************
  27. //
  28. // The following are defines for the Univeral Serial Bus register offsets.
  29. //
  30. //*****************************************************************************
  31. #define USB_O_FADDR 0x00000000 // USB Device Functional Address
  32. #define USB_O_POWER 0x00000001 // USB Power
  33. #define USB_O_TXIS 0x00000002 // USB Transmit Interrupt Status
  34. #define USB_O_RXIS 0x00000004 // USB Receive Interrupt Status
  35. #define USB_O_TXIE 0x00000006 // USB Transmit Interrupt Enable
  36. #define USB_O_RXIE 0x00000008 // USB Receive Interrupt Enable
  37. #define USB_O_IS 0x0000000A // USB General Interrupt Status
  38. #define USB_O_IE 0x0000000B // USB Interrupt Enable
  39. #define USB_O_FRAME 0x0000000C // USB Frame Value
  40. #define USB_O_EPIDX 0x0000000E // USB Endpoint Index
  41. #define USB_O_TEST 0x0000000F // USB Test Mode
  42. #define USB_O_FIFO0 0x00000020 // USB FIFO Endpoint 0
  43. #define USB_O_FIFO1 0x00000024 // USB FIFO Endpoint 1
  44. #define USB_O_FIFO2 0x00000028 // USB FIFO Endpoint 2
  45. #define USB_O_FIFO3 0x0000002C // USB FIFO Endpoint 3
  46. #define USB_O_FIFO4 0x00000030 // USB FIFO Endpoint 4
  47. #define USB_O_FIFO5 0x00000034 // USB FIFO Endpoint 5
  48. #define USB_O_FIFO6 0x00000038 // USB FIFO Endpoint 6
  49. #define USB_O_FIFO7 0x0000003C // USB FIFO Endpoint 7
  50. #define USB_O_FIFO8 0x00000040 // USB FIFO Endpoint 8
  51. #define USB_O_FIFO9 0x00000044 // USB FIFO Endpoint 9
  52. #define USB_O_FIFO10 0x00000048 // USB FIFO Endpoint 10
  53. #define USB_O_FIFO11 0x0000004C // USB FIFO Endpoint 11
  54. #define USB_O_FIFO12 0x00000050 // USB FIFO Endpoint 12
  55. #define USB_O_FIFO13 0x00000054 // USB FIFO Endpoint 13
  56. #define USB_O_FIFO14 0x00000058 // USB FIFO Endpoint 14
  57. #define USB_O_FIFO15 0x0000005C // USB FIFO Endpoint 15
  58. #define USB_O_DEVCTL 0x00000060 // USB Device Control
  59. #define USB_O_TXFIFOSZ 0x00000062 // USB Transmit Dynamic FIFO Sizing
  60. #define USB_O_RXFIFOSZ 0x00000063 // USB Receive Dynamic FIFO Sizing
  61. #define USB_O_TXFIFOADD 0x00000064 // USB Transmit FIFO Start Address
  62. #define USB_O_RXFIFOADD 0x00000066 // USB Receive FIFO Start Address
  63. #define USB_O_CONTIM 0x0000007A // USB Connect Timing
  64. #define USB_O_VPLEN 0x0000007B // USB OTG VBUS Pulse Timing
  65. #define USB_O_FSEOF 0x0000007D // USB Full-Speed Last Transaction
  66. // to End of Frame Timing
  67. #define USB_O_LSEOF 0x0000007E // USB Low-Speed Last Transaction
  68. // to End of Frame Timing
  69. #define USB_O_TXFUNCADDR0 0x00000080 // USB Transmit Functional Address
  70. // Endpoint 0
  71. #define USB_O_TXHUBADDR0 0x00000082 // USB Transmit Hub Address
  72. // Endpoint 0
  73. #define USB_O_TXHUBPORT0 0x00000083 // USB Transmit Hub Port Endpoint 0
  74. #define USB_O_TXFUNCADDR1 0x00000088 // USB Transmit Functional Address
  75. // Endpoint 1
  76. #define USB_O_TXHUBADDR1 0x0000008A // USB Transmit Hub Address
  77. // Endpoint 1
  78. #define USB_O_TXHUBPORT1 0x0000008B // USB Transmit Hub Port Endpoint 1
  79. #define USB_O_RXFUNCADDR1 0x0000008C // USB Receive Functional Address
  80. // Endpoint 1
  81. #define USB_O_RXHUBADDR1 0x0000008E // USB Receive Hub Address Endpoint
  82. // 1
  83. #define USB_O_RXHUBPORT1 0x0000008F // USB Receive Hub Port Endpoint 1
  84. #define USB_O_TXFUNCADDR2 0x00000090 // USB Transmit Functional Address
  85. // Endpoint 2
  86. #define USB_O_TXHUBADDR2 0x00000092 // USB Transmit Hub Address
  87. // Endpoint 2
  88. #define USB_O_TXHUBPORT2 0x00000093 // USB Transmit Hub Port Endpoint 2
  89. #define USB_O_RXFUNCADDR2 0x00000094 // USB Receive Functional Address
  90. // Endpoint 2
  91. #define USB_O_RXHUBADDR2 0x00000096 // USB Receive Hub Address Endpoint
  92. // 2
  93. #define USB_O_RXHUBPORT2 0x00000097 // USB Receive Hub Port Endpoint 2
  94. #define USB_O_TXFUNCADDR3 0x00000098 // USB Transmit Functional Address
  95. // Endpoint 3
  96. #define USB_O_TXHUBADDR3 0x0000009A // USB Transmit Hub Address
  97. // Endpoint 3
  98. #define USB_O_TXHUBPORT3 0x0000009B // USB Transmit Hub Port Endpoint 3
  99. #define USB_O_RXFUNCADDR3 0x0000009C // USB Receive Functional Address
  100. // Endpoint 3
  101. #define USB_O_RXHUBADDR3 0x0000009E // USB Receive Hub Address Endpoint
  102. // 3
  103. #define USB_O_RXHUBPORT3 0x0000009F // USB Receive Hub Port Endpoint 3
  104. #define USB_O_TXFUNCADDR4 0x000000A0 // USB Transmit Functional Address
  105. // Endpoint 4
  106. #define USB_O_TXHUBADDR4 0x000000A2 // USB Transmit Hub Address
  107. // Endpoint 4
  108. #define USB_O_TXHUBPORT4 0x000000A3 // USB Transmit Hub Port Endpoint 4
  109. #define USB_O_RXFUNCADDR4 0x000000A4 // USB Receive Functional Address
  110. // Endpoint 4
  111. #define USB_O_RXHUBADDR4 0x000000A6 // USB Receive Hub Address Endpoint
  112. // 4
  113. #define USB_O_RXHUBPORT4 0x000000A7 // USB Receive Hub Port Endpoint 4
  114. #define USB_O_TXFUNCADDR5 0x000000A8 // USB Transmit Functional Address
  115. // Endpoint 5
  116. #define USB_O_TXHUBADDR5 0x000000AA // USB Transmit Hub Address
  117. // Endpoint 5
  118. #define USB_O_TXHUBPORT5 0x000000AB // USB Transmit Hub Port Endpoint 5
  119. #define USB_O_RXFUNCADDR5 0x000000AC // USB Receive Functional Address
  120. // Endpoint 5
  121. #define USB_O_RXHUBADDR5 0x000000AE // USB Receive Hub Address Endpoint
  122. // 5
  123. #define USB_O_RXHUBPORT5 0x000000AF // USB Receive Hub Port Endpoint 5
  124. #define USB_O_TXFUNCADDR6 0x000000B0 // USB Transmit Functional Address
  125. // Endpoint 6
  126. #define USB_O_TXHUBADDR6 0x000000B2 // USB Transmit Hub Address
  127. // Endpoint 6
  128. #define USB_O_TXHUBPORT6 0x000000B3 // USB Transmit Hub Port Endpoint 6
  129. #define USB_O_RXFUNCADDR6 0x000000B4 // USB Receive Functional Address
  130. // Endpoint 6
  131. #define USB_O_RXHUBADDR6 0x000000B6 // USB Receive Hub Address Endpoint
  132. // 6
  133. #define USB_O_RXHUBPORT6 0x000000B7 // USB Receive Hub Port Endpoint 6
  134. #define USB_O_TXFUNCADDR7 0x000000B8 // USB Transmit Functional Address
  135. // Endpoint 7
  136. #define USB_O_TXHUBADDR7 0x000000BA // USB Transmit Hub Address
  137. // Endpoint 7
  138. #define USB_O_TXHUBPORT7 0x000000BB // USB Transmit Hub Port Endpoint 7
  139. #define USB_O_RXFUNCADDR7 0x000000BC // USB Receive Functional Address
  140. // Endpoint 7
  141. #define USB_O_RXHUBADDR7 0x000000BE // USB Receive Hub Address Endpoint
  142. // 7
  143. #define USB_O_RXHUBPORT7 0x000000BF // USB Receive Hub Port Endpoint 7
  144. #define USB_O_TXFUNCADDR8 0x000000C0 // USB Transmit Functional Address
  145. // Endpoint 8
  146. #define USB_O_TXHUBADDR8 0x000000C2 // USB Transmit Hub Address
  147. // Endpoint 8
  148. #define USB_O_TXHUBPORT8 0x000000C3 // USB Transmit Hub Port Endpoint 8
  149. #define USB_O_RXFUNCADDR8 0x000000C4 // USB Receive Functional Address
  150. // Endpoint 8
  151. #define USB_O_RXHUBADDR8 0x000000C6 // USB Receive Hub Address Endpoint
  152. // 8
  153. #define USB_O_RXHUBPORT8 0x000000C7 // USB Receive Hub Port Endpoint 8
  154. #define USB_O_TXFUNCADDR9 0x000000C8 // USB Transmit Functional Address
  155. // Endpoint 9
  156. #define USB_O_TXHUBADDR9 0x000000CA // USB Transmit Hub Address
  157. // Endpoint 9
  158. #define USB_O_TXHUBPORT9 0x000000CB // USB Transmit Hub Port Endpoint 9
  159. #define USB_O_RXFUNCADDR9 0x000000CC // USB Receive Functional Address
  160. // Endpoint 9
  161. #define USB_O_RXHUBADDR9 0x000000CE // USB Receive Hub Address Endpoint
  162. // 9
  163. #define USB_O_RXHUBPORT9 0x000000CF // USB Receive Hub Port Endpoint 9
  164. #define USB_O_TXFUNCADDR10 0x000000D0 // USB Transmit Functional Address
  165. // Endpoint 10
  166. #define USB_O_TXHUBADDR10 0x000000D2 // USB Transmit Hub Address
  167. // Endpoint 10
  168. #define USB_O_TXHUBPORT10 0x000000D3 // USB Transmit Hub Port Endpoint
  169. // 10
  170. #define USB_O_RXFUNCADDR10 0x000000D4 // USB Receive Functional Address
  171. // Endpoint 10
  172. #define USB_O_RXHUBADDR10 0x000000D6 // USB Receive Hub Address Endpoint
  173. // 10
  174. #define USB_O_RXHUBPORT10 0x000000D7 // USB Receive Hub Port Endpoint 10
  175. #define USB_O_TXFUNCADDR11 0x000000D8 // USB Transmit Functional Address
  176. // Endpoint 11
  177. #define USB_O_TXHUBADDR11 0x000000DA // USB Transmit Hub Address
  178. // Endpoint 11
  179. #define USB_O_TXHUBPORT11 0x000000DB // USB Transmit Hub Port Endpoint
  180. // 11
  181. #define USB_O_RXFUNCADDR11 0x000000DC // USB Receive Functional Address
  182. // Endpoint 11
  183. #define USB_O_RXHUBADDR11 0x000000DE // USB Receive Hub Address Endpoint
  184. // 11
  185. #define USB_O_RXHUBPORT11 0x000000DF // USB Receive Hub Port Endpoint 11
  186. #define USB_O_TXFUNCADDR12 0x000000E0 // USB Transmit Functional Address
  187. // Endpoint 12
  188. #define USB_O_TXHUBADDR12 0x000000E2 // USB Transmit Hub Address
  189. // Endpoint 12
  190. #define USB_O_TXHUBPORT12 0x000000E3 // USB Transmit Hub Port Endpoint
  191. // 12
  192. #define USB_O_RXFUNCADDR12 0x000000E4 // USB Receive Functional Address
  193. // Endpoint 12
  194. #define USB_O_RXHUBADDR12 0x000000E6 // USB Receive Hub Address Endpoint
  195. // 12
  196. #define USB_O_RXHUBPORT12 0x000000E7 // USB Receive Hub Port Endpoint 12
  197. #define USB_O_TXFUNCADDR13 0x000000E8 // USB Transmit Functional Address
  198. // Endpoint 13
  199. #define USB_O_TXHUBADDR13 0x000000EA // USB Transmit Hub Address
  200. // Endpoint 13
  201. #define USB_O_TXHUBPORT13 0x000000EB // USB Transmit Hub Port Endpoint
  202. // 13
  203. #define USB_O_RXFUNCADDR13 0x000000EC // USB Receive Functional Address
  204. // Endpoint 13
  205. #define USB_O_RXHUBADDR13 0x000000EE // USB Receive Hub Address Endpoint
  206. // 13
  207. #define USB_O_RXHUBPORT13 0x000000EF // USB Receive Hub Port Endpoint 13
  208. #define USB_O_TXFUNCADDR14 0x000000F0 // USB Transmit Functional Address
  209. // Endpoint 14
  210. #define USB_O_TXHUBADDR14 0x000000F2 // USB Transmit Hub Address
  211. // Endpoint 14
  212. #define USB_O_TXHUBPORT14 0x000000F3 // USB Transmit Hub Port Endpoint
  213. // 14
  214. #define USB_O_RXFUNCADDR14 0x000000F4 // USB Receive Functional Address
  215. // Endpoint 14
  216. #define USB_O_RXHUBADDR14 0x000000F6 // USB Receive Hub Address Endpoint
  217. // 14
  218. #define USB_O_RXHUBPORT14 0x000000F7 // USB Receive Hub Port Endpoint 14
  219. #define USB_O_TXFUNCADDR15 0x000000F8 // USB Transmit Functional Address
  220. // Endpoint 15
  221. #define USB_O_TXHUBADDR15 0x000000FA // USB Transmit Hub Address
  222. // Endpoint 15
  223. #define USB_O_TXHUBPORT15 0x000000FB // USB Transmit Hub Port Endpoint
  224. // 15
  225. #define USB_O_RXFUNCADDR15 0x000000FC // USB Receive Functional Address
  226. // Endpoint 15
  227. #define USB_O_RXHUBADDR15 0x000000FE // USB Receive Hub Address Endpoint
  228. // 15
  229. #define USB_O_RXHUBPORT15 0x000000FF // USB Receive Hub Port Endpoint 15
  230. #define USB_O_CSRL0 0x00000102 // USB Control and Status Endpoint
  231. // 0 Low
  232. #define USB_O_CSRH0 0x00000103 // USB Control and Status Endpoint
  233. // 0 High
  234. #define USB_O_COUNT0 0x00000108 // USB Receive Byte Count Endpoint
  235. // 0
  236. #define USB_O_TYPE0 0x0000010A // USB Type Endpoint 0
  237. #define USB_O_NAKLMT 0x0000010B // USB NAK Limit
  238. #define USB_O_TXMAXP1 0x00000110 // USB Maximum Transmit Data
  239. // Endpoint 1
  240. #define USB_O_TXCSRL1 0x00000112 // USB Transmit Control and Status
  241. // Endpoint 1 Low
  242. #define USB_O_TXCSRH1 0x00000113 // USB Transmit Control and Status
  243. // Endpoint 1 High
  244. #define USB_O_RXMAXP1 0x00000114 // USB Maximum Receive Data
  245. // Endpoint 1
  246. #define USB_O_RXCSRL1 0x00000116 // USB Receive Control and Status
  247. // Endpoint 1 Low
  248. #define USB_O_RXCSRH1 0x00000117 // USB Receive Control and Status
  249. // Endpoint 1 High
  250. #define USB_O_RXCOUNT1 0x00000118 // USB Receive Byte Count Endpoint
  251. // 1
  252. #define USB_O_TXTYPE1 0x0000011A // USB Host Transmit Configure Type
  253. // Endpoint 1
  254. #define USB_O_TXINTERVAL1 0x0000011B // USB Host Transmit Interval
  255. // Endpoint 1
  256. #define USB_O_RXTYPE1 0x0000011C // USB Host Configure Receive Type
  257. // Endpoint 1
  258. #define USB_O_RXINTERVAL1 0x0000011D // USB Host Receive Polling
  259. // Interval Endpoint 1
  260. #define USB_O_TXMAXP2 0x00000120 // USB Maximum Transmit Data
  261. // Endpoint 2
  262. #define USB_O_TXCSRL2 0x00000122 // USB Transmit Control and Status
  263. // Endpoint 2 Low
  264. #define USB_O_TXCSRH2 0x00000123 // USB Transmit Control and Status
  265. // Endpoint 2 High
  266. #define USB_O_RXMAXP2 0x00000124 // USB Maximum Receive Data
  267. // Endpoint 2
  268. #define USB_O_RXCSRL2 0x00000126 // USB Receive Control and Status
  269. // Endpoint 2 Low
  270. #define USB_O_RXCSRH2 0x00000127 // USB Receive Control and Status
  271. // Endpoint 2 High
  272. #define USB_O_RXCOUNT2 0x00000128 // USB Receive Byte Count Endpoint
  273. // 2
  274. #define USB_O_TXTYPE2 0x0000012A // USB Host Transmit Configure Type
  275. // Endpoint 2
  276. #define USB_O_TXINTERVAL2 0x0000012B // USB Host Transmit Interval
  277. // Endpoint 2
  278. #define USB_O_RXTYPE2 0x0000012C // USB Host Configure Receive Type
  279. // Endpoint 2
  280. #define USB_O_RXINTERVAL2 0x0000012D // USB Host Receive Polling
  281. // Interval Endpoint 2
  282. #define USB_O_TXMAXP3 0x00000130 // USB Maximum Transmit Data
  283. // Endpoint 3
  284. #define USB_O_TXCSRL3 0x00000132 // USB Transmit Control and Status
  285. // Endpoint 3 Low
  286. #define USB_O_TXCSRH3 0x00000133 // USB Transmit Control and Status
  287. // Endpoint 3 High
  288. #define USB_O_RXMAXP3 0x00000134 // USB Maximum Receive Data
  289. // Endpoint 3
  290. #define USB_O_RXCSRL3 0x00000136 // USB Receive Control and Status
  291. // Endpoint 3 Low
  292. #define USB_O_RXCSRH3 0x00000137 // USB Receive Control and Status
  293. // Endpoint 3 High
  294. #define USB_O_RXCOUNT3 0x00000138 // USB Receive Byte Count Endpoint
  295. // 3
  296. #define USB_O_TXTYPE3 0x0000013A // USB Host Transmit Configure Type
  297. // Endpoint 3
  298. #define USB_O_TXINTERVAL3 0x0000013B // USB Host Transmit Interval
  299. // Endpoint 3
  300. #define USB_O_RXTYPE3 0x0000013C // USB Host Configure Receive Type
  301. // Endpoint 3
  302. #define USB_O_RXINTERVAL3 0x0000013D // USB Host Receive Polling
  303. // Interval Endpoint 3
  304. #define USB_O_TXMAXP4 0x00000140 // USB Maximum Transmit Data
  305. // Endpoint 4
  306. #define USB_O_TXCSRL4 0x00000142 // USB Transmit Control and Status
  307. // Endpoint 4 Low
  308. #define USB_O_TXCSRH4 0x00000143 // USB Transmit Control and Status
  309. // Endpoint 4 High
  310. #define USB_O_RXMAXP4 0x00000144 // USB Maximum Receive Data
  311. // Endpoint 4
  312. #define USB_O_RXCSRL4 0x00000146 // USB Receive Control and Status
  313. // Endpoint 4 Low
  314. #define USB_O_RXCSRH4 0x00000147 // USB Receive Control and Status
  315. // Endpoint 4 High
  316. #define USB_O_RXCOUNT4 0x00000148 // USB Receive Byte Count Endpoint
  317. // 4
  318. #define USB_O_TXTYPE4 0x0000014A // USB Host Transmit Configure Type
  319. // Endpoint 4
  320. #define USB_O_TXINTERVAL4 0x0000014B // USB Host Transmit Interval
  321. // Endpoint 4
  322. #define USB_O_RXTYPE4 0x0000014C // USB Host Configure Receive Type
  323. // Endpoint 4
  324. #define USB_O_RXINTERVAL4 0x0000014D // USB Host Receive Polling
  325. // Interval Endpoint 4
  326. #define USB_O_TXMAXP5 0x00000150 // USB Maximum Transmit Data
  327. // Endpoint 5
  328. #define USB_O_TXCSRL5 0x00000152 // USB Transmit Control and Status
  329. // Endpoint 5 Low
  330. #define USB_O_TXCSRH5 0x00000153 // USB Transmit Control and Status
  331. // Endpoint 5 High
  332. #define USB_O_RXMAXP5 0x00000154 // USB Maximum Receive Data
  333. // Endpoint 5
  334. #define USB_O_RXCSRL5 0x00000156 // USB Receive Control and Status
  335. // Endpoint 5 Low
  336. #define USB_O_RXCSRH5 0x00000157 // USB Receive Control and Status
  337. // Endpoint 5 High
  338. #define USB_O_RXCOUNT5 0x00000158 // USB Receive Byte Count Endpoint
  339. // 5
  340. #define USB_O_TXTYPE5 0x0000015A // USB Host Transmit Configure Type
  341. // Endpoint 5
  342. #define USB_O_TXINTERVAL5 0x0000015B // USB Host Transmit Interval
  343. // Endpoint 5
  344. #define USB_O_RXTYPE5 0x0000015C // USB Host Configure Receive Type
  345. // Endpoint 5
  346. #define USB_O_RXINTERVAL5 0x0000015D // USB Host Receive Polling
  347. // Interval Endpoint 5
  348. #define USB_O_TXMAXP6 0x00000160 // USB Maximum Transmit Data
  349. // Endpoint 6
  350. #define USB_O_TXCSRL6 0x00000162 // USB Transmit Control and Status
  351. // Endpoint 6 Low
  352. #define USB_O_TXCSRH6 0x00000163 // USB Transmit Control and Status
  353. // Endpoint 6 High
  354. #define USB_O_RXMAXP6 0x00000164 // USB Maximum Receive Data
  355. // Endpoint 6
  356. #define USB_O_RXCSRL6 0x00000166 // USB Receive Control and Status
  357. // Endpoint 6 Low
  358. #define USB_O_RXCSRH6 0x00000167 // USB Receive Control and Status
  359. // Endpoint 6 High
  360. #define USB_O_RXCOUNT6 0x00000168 // USB Receive Byte Count Endpoint
  361. // 6
  362. #define USB_O_TXTYPE6 0x0000016A // USB Host Transmit Configure Type
  363. // Endpoint 6
  364. #define USB_O_TXINTERVAL6 0x0000016B // USB Host Transmit Interval
  365. // Endpoint 6
  366. #define USB_O_RXTYPE6 0x0000016C // USB Host Configure Receive Type
  367. // Endpoint 6
  368. #define USB_O_RXINTERVAL6 0x0000016D // USB Host Receive Polling
  369. // Interval Endpoint 6
  370. #define USB_O_TXMAXP7 0x00000170 // USB Maximum Transmit Data
  371. // Endpoint 7
  372. #define USB_O_TXCSRL7 0x00000172 // USB Transmit Control and Status
  373. // Endpoint 7 Low
  374. #define USB_O_TXCSRH7 0x00000173 // USB Transmit Control and Status
  375. // Endpoint 7 High
  376. #define USB_O_RXMAXP7 0x00000174 // USB Maximum Receive Data
  377. // Endpoint 7
  378. #define USB_O_RXCSRL7 0x00000176 // USB Receive Control and Status
  379. // Endpoint 7 Low
  380. #define USB_O_RXCSRH7 0x00000177 // USB Receive Control and Status
  381. // Endpoint 7 High
  382. #define USB_O_RXCOUNT7 0x00000178 // USB Receive Byte Count Endpoint
  383. // 7
  384. #define USB_O_TXTYPE7 0x0000017A // USB Host Transmit Configure Type
  385. // Endpoint 7
  386. #define USB_O_TXINTERVAL7 0x0000017B // USB Host Transmit Interval
  387. // Endpoint 7
  388. #define USB_O_RXTYPE7 0x0000017C // USB Host Configure Receive Type
  389. // Endpoint 7
  390. #define USB_O_RXINTERVAL7 0x0000017D // USB Host Receive Polling
  391. // Interval Endpoint 7
  392. #define USB_O_TXMAXP8 0x00000180 // USB Maximum Transmit Data
  393. // Endpoint 8
  394. #define USB_O_TXCSRL8 0x00000182 // USB Transmit Control and Status
  395. // Endpoint 8 Low
  396. #define USB_O_TXCSRH8 0x00000183 // USB Transmit Control and Status
  397. // Endpoint 8 High
  398. #define USB_O_RXMAXP8 0x00000184 // USB Maximum Receive Data
  399. // Endpoint 8
  400. #define USB_O_RXCSRL8 0x00000186 // USB Receive Control and Status
  401. // Endpoint 8 Low
  402. #define USB_O_RXCSRH8 0x00000187 // USB Receive Control and Status
  403. // Endpoint 8 High
  404. #define USB_O_RXCOUNT8 0x00000188 // USB Receive Byte Count Endpoint
  405. // 8
  406. #define USB_O_TXTYPE8 0x0000018A // USB Host Transmit Configure Type
  407. // Endpoint 8
  408. #define USB_O_TXINTERVAL8 0x0000018B // USB Host Transmit Interval
  409. // Endpoint 8
  410. #define USB_O_RXTYPE8 0x0000018C // USB Host Configure Receive Type
  411. // Endpoint 8
  412. #define USB_O_RXINTERVAL8 0x0000018D // USB Host Receive Polling
  413. // Interval Endpoint 8
  414. #define USB_O_TXMAXP9 0x00000190 // USB Maximum Transmit Data
  415. // Endpoint 9
  416. #define USB_O_TXCSRL9 0x00000192 // USB Transmit Control and Status
  417. // Endpoint 9 Low
  418. #define USB_O_TXCSRH9 0x00000193 // USB Transmit Control and Status
  419. // Endpoint 9 High
  420. #define USB_O_RXMAXP9 0x00000194 // USB Maximum Receive Data
  421. // Endpoint 9
  422. #define USB_O_RXCSRL9 0x00000196 // USB Receive Control and Status
  423. // Endpoint 9 Low
  424. #define USB_O_RXCSRH9 0x00000197 // USB Receive Control and Status
  425. // Endpoint 9 High
  426. #define USB_O_RXCOUNT9 0x00000198 // USB Receive Byte Count Endpoint
  427. // 9
  428. #define USB_O_TXTYPE9 0x0000019A // USB Host Transmit Configure Type
  429. // Endpoint 9
  430. #define USB_O_TXINTERVAL9 0x0000019B // USB Host Transmit Interval
  431. // Endpoint 9
  432. #define USB_O_RXTYPE9 0x0000019C // USB Host Configure Receive Type
  433. // Endpoint 9
  434. #define USB_O_RXINTERVAL9 0x0000019D // USB Host Receive Polling
  435. // Interval Endpoint 9
  436. #define USB_O_TXMAXP10 0x000001A0 // USB Maximum Transmit Data
  437. // Endpoint 10
  438. #define USB_O_TXCSRL10 0x000001A2 // USB Transmit Control and Status
  439. // Endpoint 10 Low
  440. #define USB_O_TXCSRH10 0x000001A3 // USB Transmit Control and Status
  441. // Endpoint 10 High
  442. #define USB_O_RXMAXP10 0x000001A4 // USB Maximum Receive Data
  443. // Endpoint 10
  444. #define USB_O_RXCSRL10 0x000001A6 // USB Receive Control and Status
  445. // Endpoint 10 Low
  446. #define USB_O_RXCSRH10 0x000001A7 // USB Receive Control and Status
  447. // Endpoint 10 High
  448. #define USB_O_RXCOUNT10 0x000001A8 // USB Receive Byte Count Endpoint
  449. // 10
  450. #define USB_O_TXTYPE10 0x000001AA // USB Host Transmit Configure Type
  451. // Endpoint 10
  452. #define USB_O_TXINTERVAL10 0x000001AB // USB Host Transmit Interval
  453. // Endpoint 10
  454. #define USB_O_RXTYPE10 0x000001AC // USB Host Configure Receive Type
  455. // Endpoint 10
  456. #define USB_O_RXINTERVAL10 0x000001AD // USB Host Receive Polling
  457. // Interval Endpoint 10
  458. #define USB_O_TXMAXP11 0x000001B0 // USB Maximum Transmit Data
  459. // Endpoint 11
  460. #define USB_O_TXCSRL11 0x000001B2 // USB Transmit Control and Status
  461. // Endpoint 11 Low
  462. #define USB_O_TXCSRH11 0x000001B3 // USB Transmit Control and Status
  463. // Endpoint 11 High
  464. #define USB_O_RXMAXP11 0x000001B4 // USB Maximum Receive Data
  465. // Endpoint 11
  466. #define USB_O_RXCSRL11 0x000001B6 // USB Receive Control and Status
  467. // Endpoint 11 Low
  468. #define USB_O_RXCSRH11 0x000001B7 // USB Receive Control and Status
  469. // Endpoint 11 High
  470. #define USB_O_RXCOUNT11 0x000001B8 // USB Receive Byte Count Endpoint
  471. // 11
  472. #define USB_O_TXTYPE11 0x000001BA // USB Host Transmit Configure Type
  473. // Endpoint 11
  474. #define USB_O_TXINTERVAL11 0x000001BB // USB Host Transmit Interval
  475. // Endpoint 11
  476. #define USB_O_RXTYPE11 0x000001BC // USB Host Configure Receive Type
  477. // Endpoint 11
  478. #define USB_O_RXINTERVAL11 0x000001BD // USB Host Receive Polling
  479. // Interval Endpoint 11
  480. #define USB_O_TXMAXP12 0x000001C0 // USB Maximum Transmit Data
  481. // Endpoint 12
  482. #define USB_O_TXCSRL12 0x000001C2 // USB Transmit Control and Status
  483. // Endpoint 12 Low
  484. #define USB_O_TXCSRH12 0x000001C3 // USB Transmit Control and Status
  485. // Endpoint 12 High
  486. #define USB_O_RXMAXP12 0x000001C4 // USB Maximum Receive Data
  487. // Endpoint 12
  488. #define USB_O_RXCSRL12 0x000001C6 // USB Receive Control and Status
  489. // Endpoint 12 Low
  490. #define USB_O_RXCSRH12 0x000001C7 // USB Receive Control and Status
  491. // Endpoint 12 High
  492. #define USB_O_RXCOUNT12 0x000001C8 // USB Receive Byte Count Endpoint
  493. // 12
  494. #define USB_O_TXTYPE12 0x000001CA // USB Host Transmit Configure Type
  495. // Endpoint 12
  496. #define USB_O_TXINTERVAL12 0x000001CB // USB Host Transmit Interval
  497. // Endpoint 12
  498. #define USB_O_RXTYPE12 0x000001CC // USB Host Configure Receive Type
  499. // Endpoint 12
  500. #define USB_O_RXINTERVAL12 0x000001CD // USB Host Receive Polling
  501. // Interval Endpoint 12
  502. #define USB_O_TXMAXP13 0x000001D0 // USB Maximum Transmit Data
  503. // Endpoint 13
  504. #define USB_O_TXCSRL13 0x000001D2 // USB Transmit Control and Status
  505. // Endpoint 13 Low
  506. #define USB_O_TXCSRH13 0x000001D3 // USB Transmit Control and Status
  507. // Endpoint 13 High
  508. #define USB_O_RXMAXP13 0x000001D4 // USB Maximum Receive Data
  509. // Endpoint 13
  510. #define USB_O_RXCSRL13 0x000001D6 // USB Receive Control and Status
  511. // Endpoint 13 Low
  512. #define USB_O_RXCSRH13 0x000001D7 // USB Receive Control and Status
  513. // Endpoint 13 High
  514. #define USB_O_RXCOUNT13 0x000001D8 // USB Receive Byte Count Endpoint
  515. // 13
  516. #define USB_O_TXTYPE13 0x000001DA // USB Host Transmit Configure Type
  517. // Endpoint 13
  518. #define USB_O_TXINTERVAL13 0x000001DB // USB Host Transmit Interval
  519. // Endpoint 13
  520. #define USB_O_RXTYPE13 0x000001DC // USB Host Configure Receive Type
  521. // Endpoint 13
  522. #define USB_O_RXINTERVAL13 0x000001DD // USB Host Receive Polling
  523. // Interval Endpoint 13
  524. #define USB_O_TXMAXP14 0x000001E0 // USB Maximum Transmit Data
  525. // Endpoint 14
  526. #define USB_O_TXCSRL14 0x000001E2 // USB Transmit Control and Status
  527. // Endpoint 14 Low
  528. #define USB_O_TXCSRH14 0x000001E3 // USB Transmit Control and Status
  529. // Endpoint 14 High
  530. #define USB_O_RXMAXP14 0x000001E4 // USB Maximum Receive Data
  531. // Endpoint 14
  532. #define USB_O_RXCSRL14 0x000001E6 // USB Receive Control and Status
  533. // Endpoint 14 Low
  534. #define USB_O_RXCSRH14 0x000001E7 // USB Receive Control and Status
  535. // Endpoint 14 High
  536. #define USB_O_RXCOUNT14 0x000001E8 // USB Receive Byte Count Endpoint
  537. // 14
  538. #define USB_O_TXTYPE14 0x000001EA // USB Host Transmit Configure Type
  539. // Endpoint 14
  540. #define USB_O_TXINTERVAL14 0x000001EB // USB Host Transmit Interval
  541. // Endpoint 14
  542. #define USB_O_RXTYPE14 0x000001EC // USB Host Configure Receive Type
  543. // Endpoint 14
  544. #define USB_O_RXINTERVAL14 0x000001ED // USB Host Receive Polling
  545. // Interval Endpoint 14
  546. #define USB_O_TXMAXP15 0x000001F0 // USB Maximum Transmit Data
  547. // Endpoint 15
  548. #define USB_O_TXCSRL15 0x000001F2 // USB Transmit Control and Status
  549. // Endpoint 15 Low
  550. #define USB_O_TXCSRH15 0x000001F3 // USB Transmit Control and Status
  551. // Endpoint 15 High
  552. #define USB_O_RXMAXP15 0x000001F4 // USB Maximum Receive Data
  553. // Endpoint 15
  554. #define USB_O_RXCSRL15 0x000001F6 // USB Receive Control and Status
  555. // Endpoint 15 Low
  556. #define USB_O_RXCSRH15 0x000001F7 // USB Receive Control and Status
  557. // Endpoint 15 High
  558. #define USB_O_RXCOUNT15 0x000001F8 // USB Receive Byte Count Endpoint
  559. // 15
  560. #define USB_O_TXTYPE15 0x000001FA // USB Host Transmit Configure Type
  561. // Endpoint 15
  562. #define USB_O_TXINTERVAL15 0x000001FB // USB Host Transmit Interval
  563. // Endpoint 15
  564. #define USB_O_RXTYPE15 0x000001FC // USB Host Configure Receive Type
  565. // Endpoint 15
  566. #define USB_O_RXINTERVAL15 0x000001FD // USB Host Receive Polling
  567. // Interval Endpoint 15
  568. #define USB_O_RQPKTCOUNT1 0x00000304 // USB Request Packet Count in
  569. // Block Transfer Endpoint 1
  570. #define USB_O_RQPKTCOUNT2 0x00000308 // USB Request Packet Count in
  571. // Block Transfer Endpoint 2
  572. #define USB_O_RQPKTCOUNT3 0x0000030C // USB Request Packet Count in
  573. // Block Transfer Endpoint 3
  574. #define USB_O_RQPKTCOUNT4 0x00000310 // USB Request Packet Count in
  575. // Block Transfer Endpoint 4
  576. #define USB_O_RQPKTCOUNT5 0x00000314 // USB Request Packet Count in
  577. // Block Transfer Endpoint 5
  578. #define USB_O_RQPKTCOUNT6 0x00000318 // USB Request Packet Count in
  579. // Block Transfer Endpoint 6
  580. #define USB_O_RQPKTCOUNT7 0x0000031C // USB Request Packet Count in
  581. // Block Transfer Endpoint 7
  582. #define USB_O_RQPKTCOUNT8 0x00000320 // USB Request Packet Count in
  583. // Block Transfer Endpoint 8
  584. #define USB_O_RQPKTCOUNT9 0x00000324 // USB Request Packet Count in
  585. // Block Transfer Endpoint 9
  586. #define USB_O_RQPKTCOUNT10 0x00000328 // USB Request Packet Count in
  587. // Block Transfer Endpoint 10
  588. #define USB_O_RQPKTCOUNT11 0x0000032C // USB Request Packet Count in
  589. // Block Transfer Endpoint 11
  590. #define USB_O_RQPKTCOUNT12 0x00000330 // USB Request Packet Count in
  591. // Block Transfer Endpoint 12
  592. #define USB_O_RQPKTCOUNT13 0x00000334 // USB Request Packet Count in
  593. // Block Transfer Endpoint 13
  594. #define USB_O_RQPKTCOUNT14 0x00000338 // USB Request Packet Count in
  595. // Block Transfer Endpoint 14
  596. #define USB_O_RQPKTCOUNT15 0x0000033C // USB Request Packet Count in
  597. // Block Transfer Endpoint 15
  598. #define USB_O_RXDPKTBUFDIS 0x00000340 // USB Receive Double Packet Buffer
  599. // Disable
  600. #define USB_O_TXDPKTBUFDIS 0x00000342 // USB Transmit Double Packet
  601. // Buffer Disable
  602. #define USB_O_EPC 0x00000400 // USB External Power Control
  603. #define USB_O_EPCRIS 0x00000404 // USB External Power Control Raw
  604. // Interrupt Status
  605. #define USB_O_EPCIM 0x00000408 // USB External Power Control
  606. // Interrupt Mask
  607. #define USB_O_EPCISC 0x0000040C // USB External Power Control
  608. // Interrupt Status and Clear
  609. #define USB_O_DRRIS 0x00000410 // USB Device RESUME Raw Interrupt
  610. // Status
  611. #define USB_O_DRIM 0x00000414 // USB Device RESUME Interrupt Mask
  612. #define USB_O_DRISC 0x00000418 // USB Device RESUME Interrupt
  613. // Status and Clear
  614. #define USB_O_GPCS 0x0000041C // USB General-Purpose Control and
  615. // Status
  616. #define USB_O_VDC 0x00000430 // USB VBUS Droop Control
  617. #define USB_O_VDCRIS 0x00000434 // USB VBUS Droop Control Raw
  618. // Interrupt Status
  619. #define USB_O_VDCIM 0x00000438 // USB VBUS Droop Control Interrupt
  620. // Mask
  621. #define USB_O_VDCISC 0x0000043C // USB VBUS Droop Control Interrupt
  622. // Status and Clear
  623. #define USB_O_IDVRIS 0x00000444 // USB ID Valid Detect Raw
  624. // Interrupt Status
  625. #define USB_O_IDVIM 0x00000448 // USB ID Valid Detect Interrupt
  626. // Mask
  627. #define USB_O_IDVISC 0x0000044C // USB ID Valid Detect Interrupt
  628. // Status and Clear
  629. #define USB_O_DMASEL 0x00000450 // USB DMA Select
  630. //*****************************************************************************
  631. //
  632. // The following are defines for the bit fields in the USB_O_FADDR register.
  633. //
  634. //*****************************************************************************
  635. #define USB_FADDR_M 0x0000007F // Function Address
  636. #define USB_FADDR_S 0
  637. //*****************************************************************************
  638. //
  639. // The following are defines for the bit fields in the USB_O_POWER register.
  640. //
  641. //*****************************************************************************
  642. #define USB_POWER_ISOUP 0x00000080 // Isochronous Update
  643. #define USB_POWER_SOFTCONN 0x00000040 // Soft Connect/Disconnect
  644. #define USB_POWER_RESET 0x00000008 // RESET Signaling
  645. #define USB_POWER_RESUME 0x00000004 // RESUME Signaling
  646. #define USB_POWER_SUSPEND 0x00000002 // SUSPEND Mode
  647. #define USB_POWER_PWRDNPHY 0x00000001 // Power Down PHY
  648. //*****************************************************************************
  649. //
  650. // The following are defines for the bit fields in the USB_O_TXIS register.
  651. //
  652. //*****************************************************************************
  653. #define USB_TXIS_EP15 0x00008000 // TX Endpoint 15 Interrupt
  654. #define USB_TXIS_EP14 0x00004000 // TX Endpoint 14 Interrupt
  655. #define USB_TXIS_EP13 0x00002000 // TX Endpoint 13 Interrupt
  656. #define USB_TXIS_EP12 0x00001000 // TX Endpoint 12 Interrupt
  657. #define USB_TXIS_EP11 0x00000800 // TX Endpoint 11 Interrupt
  658. #define USB_TXIS_EP10 0x00000400 // TX Endpoint 10 Interrupt
  659. #define USB_TXIS_EP9 0x00000200 // TX Endpoint 9 Interrupt
  660. #define USB_TXIS_EP8 0x00000100 // TX Endpoint 8 Interrupt
  661. #define USB_TXIS_EP7 0x00000080 // TX Endpoint 7 Interrupt
  662. #define USB_TXIS_EP6 0x00000040 // TX Endpoint 6 Interrupt
  663. #define USB_TXIS_EP5 0x00000020 // TX Endpoint 5 Interrupt
  664. #define USB_TXIS_EP4 0x00000010 // TX Endpoint 4 Interrupt
  665. #define USB_TXIS_EP3 0x00000008 // TX Endpoint 3 Interrupt
  666. #define USB_TXIS_EP2 0x00000004 // TX Endpoint 2 Interrupt
  667. #define USB_TXIS_EP1 0x00000002 // TX Endpoint 1 Interrupt
  668. #define USB_TXIS_EP0 0x00000001 // TX and RX Endpoint 0 Interrupt
  669. //*****************************************************************************
  670. //
  671. // The following are defines for the bit fields in the USB_O_RXIS register.
  672. //
  673. //*****************************************************************************
  674. #define USB_RXIS_EP15 0x00008000 // RX Endpoint 15 Interrupt
  675. #define USB_RXIS_EP14 0x00004000 // RX Endpoint 14 Interrupt
  676. #define USB_RXIS_EP13 0x00002000 // RX Endpoint 13 Interrupt
  677. #define USB_RXIS_EP12 0x00001000 // RX Endpoint 12 Interrupt
  678. #define USB_RXIS_EP11 0x00000800 // RX Endpoint 11 Interrupt
  679. #define USB_RXIS_EP10 0x00000400 // RX Endpoint 10 Interrupt
  680. #define USB_RXIS_EP9 0x00000200 // RX Endpoint 9 Interrupt
  681. #define USB_RXIS_EP8 0x00000100 // RX Endpoint 8 Interrupt
  682. #define USB_RXIS_EP7 0x00000080 // RX Endpoint 7 Interrupt
  683. #define USB_RXIS_EP6 0x00000040 // RX Endpoint 6 Interrupt
  684. #define USB_RXIS_EP5 0x00000020 // RX Endpoint 5 Interrupt
  685. #define USB_RXIS_EP4 0x00000010 // RX Endpoint 4 Interrupt
  686. #define USB_RXIS_EP3 0x00000008 // RX Endpoint 3 Interrupt
  687. #define USB_RXIS_EP2 0x00000004 // RX Endpoint 2 Interrupt
  688. #define USB_RXIS_EP1 0x00000002 // RX Endpoint 1 Interrupt
  689. //*****************************************************************************
  690. //
  691. // The following are defines for the bit fields in the USB_O_TXIE register.
  692. //
  693. //*****************************************************************************
  694. #define USB_TXIE_EP15 0x00008000 // TX Endpoint 15 Interrupt Enable
  695. #define USB_TXIE_EP14 0x00004000 // TX Endpoint 14 Interrupt Enable
  696. #define USB_TXIE_EP13 0x00002000 // TX Endpoint 13 Interrupt Enable
  697. #define USB_TXIE_EP12 0x00001000 // TX Endpoint 12 Interrupt Enable
  698. #define USB_TXIE_EP11 0x00000800 // TX Endpoint 11 Interrupt Enable
  699. #define USB_TXIE_EP10 0x00000400 // TX Endpoint 10 Interrupt Enable
  700. #define USB_TXIE_EP9 0x00000200 // TX Endpoint 9 Interrupt Enable
  701. #define USB_TXIE_EP8 0x00000100 // TX Endpoint 8 Interrupt Enable
  702. #define USB_TXIE_EP7 0x00000080 // TX Endpoint 7 Interrupt Enable
  703. #define USB_TXIE_EP6 0x00000040 // TX Endpoint 6 Interrupt Enable
  704. #define USB_TXIE_EP5 0x00000020 // TX Endpoint 5 Interrupt Enable
  705. #define USB_TXIE_EP4 0x00000010 // TX Endpoint 4 Interrupt Enable
  706. #define USB_TXIE_EP3 0x00000008 // TX Endpoint 3 Interrupt Enable
  707. #define USB_TXIE_EP2 0x00000004 // TX Endpoint 2 Interrupt Enable
  708. #define USB_TXIE_EP1 0x00000002 // TX Endpoint 1 Interrupt Enable
  709. #define USB_TXIE_EP0 0x00000001 // TX and RX Endpoint 0 Interrupt
  710. // Enable
  711. //*****************************************************************************
  712. //
  713. // The following are defines for the bit fields in the USB_O_RXIE register.
  714. //
  715. //*****************************************************************************
  716. #define USB_RXIE_EP15 0x00008000 // RX Endpoint 15 Interrupt Enable
  717. #define USB_RXIE_EP14 0x00004000 // RX Endpoint 14 Interrupt Enable
  718. #define USB_RXIE_EP13 0x00002000 // RX Endpoint 13 Interrupt Enable
  719. #define USB_RXIE_EP12 0x00001000 // RX Endpoint 12 Interrupt Enable
  720. #define USB_RXIE_EP11 0x00000800 // RX Endpoint 11 Interrupt Enable
  721. #define USB_RXIE_EP10 0x00000400 // RX Endpoint 10 Interrupt Enable
  722. #define USB_RXIE_EP9 0x00000200 // RX Endpoint 9 Interrupt Enable
  723. #define USB_RXIE_EP8 0x00000100 // RX Endpoint 8 Interrupt Enable
  724. #define USB_RXIE_EP7 0x00000080 // RX Endpoint 7 Interrupt Enable
  725. #define USB_RXIE_EP6 0x00000040 // RX Endpoint 6 Interrupt Enable
  726. #define USB_RXIE_EP5 0x00000020 // RX Endpoint 5 Interrupt Enable
  727. #define USB_RXIE_EP4 0x00000010 // RX Endpoint 4 Interrupt Enable
  728. #define USB_RXIE_EP3 0x00000008 // RX Endpoint 3 Interrupt Enable
  729. #define USB_RXIE_EP2 0x00000004 // RX Endpoint 2 Interrupt Enable
  730. #define USB_RXIE_EP1 0x00000002 // RX Endpoint 1 Interrupt Enable
  731. //*****************************************************************************
  732. //
  733. // The following are defines for the bit fields in the USB_O_IS register.
  734. //
  735. //*****************************************************************************
  736. #define USB_IS_VBUSERR 0x00000080 // VBUS Error
  737. #define USB_IS_SESREQ 0x00000040 // SESSION REQUEST
  738. #define USB_IS_DISCON 0x00000020 // Session Disconnect
  739. #define USB_IS_CONN 0x00000010 // Session Connect
  740. #define USB_IS_SOF 0x00000008 // Start of Frame
  741. #define USB_IS_BABBLE 0x00000004 // Babble Detected
  742. #define USB_IS_RESET 0x00000004 // RESET Signaling Detected
  743. #define USB_IS_RESUME 0x00000002 // RESUME Signaling Detected
  744. #define USB_IS_SUSPEND 0x00000001 // SUSPEND Signaling Detected
  745. //*****************************************************************************
  746. //
  747. // The following are defines for the bit fields in the USB_O_IE register.
  748. //
  749. //*****************************************************************************
  750. #define USB_IE_VBUSERR 0x00000080 // Enable VBUS Error Interrupt
  751. #define USB_IE_SESREQ 0x00000040 // Enable Session Request
  752. #define USB_IE_DISCON 0x00000020 // Enable Disconnect Interrupt
  753. #define USB_IE_CONN 0x00000010 // Enable Connect Interrupt
  754. #define USB_IE_SOF 0x00000008 // Enable Start-of-Frame Interrupt
  755. #define USB_IE_BABBLE 0x00000004 // Enable Babble Interrupt
  756. #define USB_IE_RESET 0x00000004 // Enable RESET Interrupt
  757. #define USB_IE_RESUME 0x00000002 // Enable RESUME Interrupt
  758. #define USB_IE_SUSPND 0x00000001 // Enable SUSPEND Interrupt
  759. //*****************************************************************************
  760. //
  761. // The following are defines for the bit fields in the USB_O_FRAME register.
  762. //
  763. //*****************************************************************************
  764. #define USB_FRAME_M 0x000007FF // Frame Number
  765. #define USB_FRAME_S 0
  766. //*****************************************************************************
  767. //
  768. // The following are defines for the bit fields in the USB_O_EPIDX register.
  769. //
  770. //*****************************************************************************
  771. #define USB_EPIDX_EPIDX_M 0x0000000F // Endpoint Index
  772. #define USB_EPIDX_EPIDX_S 0
  773. //*****************************************************************************
  774. //
  775. // The following are defines for the bit fields in the USB_O_TEST register.
  776. //
  777. //*****************************************************************************
  778. #define USB_TEST_FORCEH 0x00000080 // Force Host Mode
  779. #define USB_TEST_FIFOACC 0x00000040 // FIFO Access
  780. #define USB_TEST_FORCEFS 0x00000020 // Force Full-Speed Mode
  781. //*****************************************************************************
  782. //
  783. // The following are defines for the bit fields in the USB_O_FIFO0 register.
  784. //
  785. //*****************************************************************************
  786. #define USB_FIFO0_EPDATA_M 0xFFFFFFFF // Endpoint Data
  787. #define USB_FIFO0_EPDATA_S 0
  788. //*****************************************************************************
  789. //
  790. // The following are defines for the bit fields in the USB_O_FIFO1 register.
  791. //
  792. //*****************************************************************************
  793. #define USB_FIFO1_EPDATA_M 0xFFFFFFFF // Endpoint Data
  794. #define USB_FIFO1_EPDATA_S 0
  795. //*****************************************************************************
  796. //
  797. // The following are defines for the bit fields in the USB_O_FIFO2 register.
  798. //
  799. //*****************************************************************************
  800. #define USB_FIFO2_EPDATA_M 0xFFFFFFFF // Endpoint Data
  801. #define USB_FIFO2_EPDATA_S 0
  802. //*****************************************************************************
  803. //
  804. // The following are defines for the bit fields in the USB_O_FIFO3 register.
  805. //
  806. //*****************************************************************************
  807. #define USB_FIFO3_EPDATA_M 0xFFFFFFFF // Endpoint Data
  808. #define USB_FIFO3_EPDATA_S 0
  809. //*****************************************************************************
  810. //
  811. // The following are defines for the bit fields in the USB_O_FIFO4 register.
  812. //
  813. //*****************************************************************************
  814. #define USB_FIFO4_EPDATA_M 0xFFFFFFFF // Endpoint Data
  815. #define USB_FIFO4_EPDATA_S 0
  816. //*****************************************************************************
  817. //
  818. // The following are defines for the bit fields in the USB_O_FIFO5 register.
  819. //
  820. //*****************************************************************************
  821. #define USB_FIFO5_EPDATA_M 0xFFFFFFFF // Endpoint Data
  822. #define USB_FIFO5_EPDATA_S 0
  823. //*****************************************************************************
  824. //
  825. // The following are defines for the bit fields in the USB_O_FIFO6 register.
  826. //
  827. //*****************************************************************************
  828. #define USB_FIFO6_EPDATA_M 0xFFFFFFFF // Endpoint Data
  829. #define USB_FIFO6_EPDATA_S 0
  830. //*****************************************************************************
  831. //
  832. // The following are defines for the bit fields in the USB_O_FIFO7 register.
  833. //
  834. //*****************************************************************************
  835. #define USB_FIFO7_EPDATA_M 0xFFFFFFFF // Endpoint Data
  836. #define USB_FIFO7_EPDATA_S 0
  837. //*****************************************************************************
  838. //
  839. // The following are defines for the bit fields in the USB_O_FIFO8 register.
  840. //
  841. //*****************************************************************************
  842. #define USB_FIFO8_EPDATA_M 0xFFFFFFFF // Endpoint Data
  843. #define USB_FIFO8_EPDATA_S 0
  844. //*****************************************************************************
  845. //
  846. // The following are defines for the bit fields in the USB_O_FIFO9 register.
  847. //
  848. //*****************************************************************************
  849. #define USB_FIFO9_EPDATA_M 0xFFFFFFFF // Endpoint Data
  850. #define USB_FIFO9_EPDATA_S 0
  851. //*****************************************************************************
  852. //
  853. // The following are defines for the bit fields in the USB_O_FIFO10 register.
  854. //
  855. //*****************************************************************************
  856. #define USB_FIFO10_EPDATA_M 0xFFFFFFFF // Endpoint Data
  857. #define USB_FIFO10_EPDATA_S 0
  858. //*****************************************************************************
  859. //
  860. // The following are defines for the bit fields in the USB_O_FIFO11 register.
  861. //
  862. //*****************************************************************************
  863. #define USB_FIFO11_EPDATA_M 0xFFFFFFFF // Endpoint Data
  864. #define USB_FIFO11_EPDATA_S 0
  865. //*****************************************************************************
  866. //
  867. // The following are defines for the bit fields in the USB_O_FIFO12 register.
  868. //
  869. //*****************************************************************************
  870. #define USB_FIFO12_EPDATA_M 0xFFFFFFFF // Endpoint Data
  871. #define USB_FIFO12_EPDATA_S 0
  872. //*****************************************************************************
  873. //
  874. // The following are defines for the bit fields in the USB_O_FIFO13 register.
  875. //
  876. //*****************************************************************************
  877. #define USB_FIFO13_EPDATA_M 0xFFFFFFFF // Endpoint Data
  878. #define USB_FIFO13_EPDATA_S 0
  879. //*****************************************************************************
  880. //
  881. // The following are defines for the bit fields in the USB_O_FIFO14 register.
  882. //
  883. //*****************************************************************************
  884. #define USB_FIFO14_EPDATA_M 0xFFFFFFFF // Endpoint Data
  885. #define USB_FIFO14_EPDATA_S 0
  886. //*****************************************************************************
  887. //
  888. // The following are defines for the bit fields in the USB_O_FIFO15 register.
  889. //
  890. //*****************************************************************************
  891. #define USB_FIFO15_EPDATA_M 0xFFFFFFFF // Endpoint Data
  892. #define USB_FIFO15_EPDATA_S 0
  893. //*****************************************************************************
  894. //
  895. // The following are defines for the bit fields in the USB_O_DEVCTL register.
  896. //
  897. //*****************************************************************************
  898. #define USB_DEVCTL_DEV 0x00000080 // Device Mode
  899. #define USB_DEVCTL_FSDEV 0x00000040 // Full-Speed Device Detected
  900. #define USB_DEVCTL_LSDEV 0x00000020 // Low-Speed Device Detected
  901. #define USB_DEVCTL_VBUS_M 0x00000018 // VBUS Level
  902. #define USB_DEVCTL_VBUS_NONE 0x00000000 // Below SessionEnd
  903. #define USB_DEVCTL_VBUS_SEND 0x00000008 // Above SessionEnd, below AValid
  904. #define USB_DEVCTL_VBUS_AVALID 0x00000010 // Above AValid, below VBUSValid
  905. #define USB_DEVCTL_VBUS_VALID 0x00000018 // Above VBUSValid
  906. #define USB_DEVCTL_HOST 0x00000004 // Host Mode
  907. #define USB_DEVCTL_HOSTREQ 0x00000002 // Host Request
  908. #define USB_DEVCTL_SESSION 0x00000001 // Session Start/End
  909. //*****************************************************************************
  910. //
  911. // The following are defines for the bit fields in the USB_O_TXFIFOSZ register.
  912. //
  913. //*****************************************************************************
  914. #define USB_TXFIFOSZ_DPB 0x00000010 // Double Packet Buffer Support
  915. #define USB_TXFIFOSZ_SIZE_M 0x0000000F // Max Packet Size
  916. #define USB_TXFIFOSZ_SIZE_8 0x00000000 // 8
  917. #define USB_TXFIFOSZ_SIZE_16 0x00000001 // 16
  918. #define USB_TXFIFOSZ_SIZE_32 0x00000002 // 32
  919. #define USB_TXFIFOSZ_SIZE_64 0x00000003 // 64
  920. #define USB_TXFIFOSZ_SIZE_128 0x00000004 // 128
  921. #define USB_TXFIFOSZ_SIZE_256 0x00000005 // 256
  922. #define USB_TXFIFOSZ_SIZE_512 0x00000006 // 512
  923. #define USB_TXFIFOSZ_SIZE_1024 0x00000007 // 1024
  924. #define USB_TXFIFOSZ_SIZE_2048 0x00000008 // 2048
  925. //*****************************************************************************
  926. //
  927. // The following are defines for the bit fields in the USB_O_RXFIFOSZ register.
  928. //
  929. //*****************************************************************************
  930. #define USB_RXFIFOSZ_DPB 0x00000010 // Double Packet Buffer Support
  931. #define USB_RXFIFOSZ_SIZE_M 0x0000000F // Max Packet Size
  932. #define USB_RXFIFOSZ_SIZE_8 0x00000000 // 8
  933. #define USB_RXFIFOSZ_SIZE_16 0x00000001 // 16
  934. #define USB_RXFIFOSZ_SIZE_32 0x00000002 // 32
  935. #define USB_RXFIFOSZ_SIZE_64 0x00000003 // 64
  936. #define USB_RXFIFOSZ_SIZE_128 0x00000004 // 128
  937. #define USB_RXFIFOSZ_SIZE_256 0x00000005 // 256
  938. #define USB_RXFIFOSZ_SIZE_512 0x00000006 // 512
  939. #define USB_RXFIFOSZ_SIZE_1024 0x00000007 // 1024
  940. #define USB_RXFIFOSZ_SIZE_2048 0x00000008 // 2048
  941. //*****************************************************************************
  942. //
  943. // The following are defines for the bit fields in the USB_O_TXFIFOADD
  944. // register.
  945. //
  946. //*****************************************************************************
  947. #define USB_TXFIFOADD_ADDR_M 0x000001FF // Transmit/Receive Start Address
  948. #define USB_TXFIFOADD_ADDR_S 0
  949. //*****************************************************************************
  950. //
  951. // The following are defines for the bit fields in the USB_O_RXFIFOADD
  952. // register.
  953. //
  954. //*****************************************************************************
  955. #define USB_RXFIFOADD_ADDR_M 0x000001FF // Transmit/Receive Start Address
  956. #define USB_RXFIFOADD_ADDR_S 0
  957. //*****************************************************************************
  958. //
  959. // The following are defines for the bit fields in the USB_O_CONTIM register.
  960. //
  961. //*****************************************************************************
  962. #define USB_CONTIM_WTCON_M 0x000000F0 // Connect Wait
  963. #define USB_CONTIM_WTID_M 0x0000000F // Wait ID
  964. #define USB_CONTIM_WTCON_S 4
  965. #define USB_CONTIM_WTID_S 0
  966. //*****************************************************************************
  967. //
  968. // The following are defines for the bit fields in the USB_O_VPLEN register.
  969. //
  970. //*****************************************************************************
  971. #define USB_VPLEN_VPLEN_M 0x000000FF // VBUS Pulse Length
  972. #define USB_VPLEN_VPLEN_S 0
  973. //*****************************************************************************
  974. //
  975. // The following are defines for the bit fields in the USB_O_FSEOF register.
  976. //
  977. //*****************************************************************************
  978. #define USB_FSEOF_FSEOFG_M 0x000000FF // Full-Speed End-of-Frame Gap
  979. #define USB_FSEOF_FSEOFG_S 0
  980. //*****************************************************************************
  981. //
  982. // The following are defines for the bit fields in the USB_O_LSEOF register.
  983. //
  984. //*****************************************************************************
  985. #define USB_LSEOF_LSEOFG_M 0x000000FF // Low-Speed End-of-Frame Gap
  986. #define USB_LSEOF_LSEOFG_S 0
  987. //*****************************************************************************
  988. //
  989. // The following are defines for the bit fields in the USB_O_TXFUNCADDR0
  990. // register.
  991. //
  992. //*****************************************************************************
  993. #define USB_TXFUNCADDR0_ADDR_M 0x0000007F // Device Address
  994. #define USB_TXFUNCADDR0_ADDR_S 0
  995. //*****************************************************************************
  996. //
  997. // The following are defines for the bit fields in the USB_O_TXHUBADDR0
  998. // register.
  999. //
  1000. //*****************************************************************************
  1001. #define USB_TXHUBADDR0_MULTTRAN 0x00000080 // Multiple Translators
  1002. #define USB_TXHUBADDR0_ADDR_M 0x0000007F // Hub Address
  1003. #define USB_TXHUBADDR0_ADDR_S 0
  1004. //*****************************************************************************
  1005. //
  1006. // The following are defines for the bit fields in the USB_O_TXHUBPORT0
  1007. // register.
  1008. //
  1009. //*****************************************************************************
  1010. #define USB_TXHUBPORT0_PORT_M 0x0000007F // Hub Port
  1011. #define USB_TXHUBPORT0_PORT_S 0
  1012. //*****************************************************************************
  1013. //
  1014. // The following are defines for the bit fields in the USB_O_TXFUNCADDR1
  1015. // register.
  1016. //
  1017. //*****************************************************************************
  1018. #define USB_TXFUNCADDR1_ADDR_M 0x0000007F // Device Address
  1019. #define USB_TXFUNCADDR1_ADDR_S 0
  1020. //*****************************************************************************
  1021. //
  1022. // The following are defines for the bit fields in the USB_O_TXHUBADDR1
  1023. // register.
  1024. //
  1025. //*****************************************************************************
  1026. #define USB_TXHUBADDR1_MULTTRAN 0x00000080 // Multiple Translators
  1027. #define USB_TXHUBADDR1_ADDR_M 0x0000007F // Hub Address
  1028. #define USB_TXHUBADDR1_ADDR_S 0
  1029. //*****************************************************************************
  1030. //
  1031. // The following are defines for the bit fields in the USB_O_TXHUBPORT1
  1032. // register.
  1033. //
  1034. //*****************************************************************************
  1035. #define USB_TXHUBPORT1_PORT_M 0x0000007F // Hub Port
  1036. #define USB_TXHUBPORT1_PORT_S 0
  1037. //*****************************************************************************
  1038. //
  1039. // The following are defines for the bit fields in the USB_O_RXFUNCADDR1
  1040. // register.
  1041. //
  1042. //*****************************************************************************
  1043. #define USB_RXFUNCADDR1_ADDR_M 0x0000007F // Device Address
  1044. #define USB_RXFUNCADDR1_ADDR_S 0
  1045. //*****************************************************************************
  1046. //
  1047. // The following are defines for the bit fields in the USB_O_RXHUBADDR1
  1048. // register.
  1049. //
  1050. //*****************************************************************************
  1051. #define USB_RXHUBADDR1_MULTTRAN 0x00000080 // Multiple Translators
  1052. #define USB_RXHUBADDR1_ADDR_M 0x0000007F // Hub Address
  1053. #define USB_RXHUBADDR1_ADDR_S 0
  1054. //*****************************************************************************
  1055. //
  1056. // The following are defines for the bit fields in the USB_O_RXHUBPORT1
  1057. // register.
  1058. //
  1059. //*****************************************************************************
  1060. #define USB_RXHUBPORT1_PORT_M 0x0000007F // Hub Port
  1061. #define USB_RXHUBPORT1_PORT_S 0
  1062. //*****************************************************************************
  1063. //
  1064. // The following are defines for the bit fields in the USB_O_TXFUNCADDR2
  1065. // register.
  1066. //
  1067. //*****************************************************************************
  1068. #define USB_TXFUNCADDR2_ADDR_M 0x0000007F // Device Address
  1069. #define USB_TXFUNCADDR2_ADDR_S 0
  1070. //*****************************************************************************
  1071. //
  1072. // The following are defines for the bit fields in the USB_O_TXHUBADDR2
  1073. // register.
  1074. //
  1075. //*****************************************************************************
  1076. #define USB_TXHUBADDR2_MULTTRAN 0x00000080 // Multiple Translators
  1077. #define USB_TXHUBADDR2_ADDR_M 0x0000007F // Hub Address
  1078. #define USB_TXHUBADDR2_ADDR_S 0
  1079. //*****************************************************************************
  1080. //
  1081. // The following are defines for the bit fields in the USB_O_TXHUBPORT2
  1082. // register.
  1083. //
  1084. //*****************************************************************************
  1085. #define USB_TXHUBPORT2_PORT_M 0x0000007F // Hub Port
  1086. #define USB_TXHUBPORT2_PORT_S 0
  1087. //*****************************************************************************
  1088. //
  1089. // The following are defines for the bit fields in the USB_O_RXFUNCADDR2
  1090. // register.
  1091. //
  1092. //*****************************************************************************
  1093. #define USB_RXFUNCADDR2_ADDR_M 0x0000007F // Device Address
  1094. #define USB_RXFUNCADDR2_ADDR_S 0
  1095. //*****************************************************************************
  1096. //
  1097. // The following are defines for the bit fields in the USB_O_RXHUBADDR2
  1098. // register.
  1099. //
  1100. //*****************************************************************************
  1101. #define USB_RXHUBADDR2_MULTTRAN 0x00000080 // Multiple Translators
  1102. #define USB_RXHUBADDR2_ADDR_M 0x0000007F // Hub Address
  1103. #define USB_RXHUBADDR2_ADDR_S 0
  1104. //*****************************************************************************
  1105. //
  1106. // The following are defines for the bit fields in the USB_O_RXHUBPORT2
  1107. // register.
  1108. //
  1109. //*****************************************************************************
  1110. #define USB_RXHUBPORT2_PORT_M 0x0000007F // Hub Port
  1111. #define USB_RXHUBPORT2_PORT_S 0
  1112. //*****************************************************************************
  1113. //
  1114. // The following are defines for the bit fields in the USB_O_TXFUNCADDR3
  1115. // register.
  1116. //
  1117. //*****************************************************************************
  1118. #define USB_TXFUNCADDR3_ADDR_M 0x0000007F // Device Address
  1119. #define USB_TXFUNCADDR3_ADDR_S 0
  1120. //*****************************************************************************
  1121. //
  1122. // The following are defines for the bit fields in the USB_O_TXHUBADDR3
  1123. // register.
  1124. //
  1125. //*****************************************************************************
  1126. #define USB_TXHUBADDR3_MULTTRAN 0x00000080 // Multiple Translators
  1127. #define USB_TXHUBADDR3_ADDR_M 0x0000007F // Hub Address
  1128. #define USB_TXHUBADDR3_ADDR_S 0
  1129. //*****************************************************************************
  1130. //
  1131. // The following are defines for the bit fields in the USB_O_TXHUBPORT3
  1132. // register.
  1133. //
  1134. //*****************************************************************************
  1135. #define USB_TXHUBPORT3_PORT_M 0x0000007F // Hub Port
  1136. #define USB_TXHUBPORT3_PORT_S 0
  1137. //*****************************************************************************
  1138. //
  1139. // The following are defines for the bit fields in the USB_O_RXFUNCADDR3
  1140. // register.
  1141. //
  1142. //*****************************************************************************
  1143. #define USB_RXFUNCADDR3_ADDR_M 0x0000007F // Device Address
  1144. #define USB_RXFUNCADDR3_ADDR_S 0
  1145. //*****************************************************************************
  1146. //
  1147. // The following are defines for the bit fields in the USB_O_RXHUBADDR3
  1148. // register.
  1149. //
  1150. //*****************************************************************************
  1151. #define USB_RXHUBADDR3_MULTTRAN 0x00000080 // Multiple Translators
  1152. #define USB_RXHUBADDR3_ADDR_M 0x0000007F // Hub Address
  1153. #define USB_RXHUBADDR3_ADDR_S 0
  1154. //*****************************************************************************
  1155. //
  1156. // The following are defines for the bit fields in the USB_O_RXHUBPORT3
  1157. // register.
  1158. //
  1159. //*****************************************************************************
  1160. #define USB_RXHUBPORT3_PORT_M 0x0000007F // Hub Port
  1161. #define USB_RXHUBPORT3_PORT_S 0
  1162. //*****************************************************************************
  1163. //
  1164. // The following are defines for the bit fields in the USB_O_TXFUNCADDR4
  1165. // register.
  1166. //
  1167. //*****************************************************************************
  1168. #define USB_TXFUNCADDR4_ADDR_M 0x0000007F // Device Address
  1169. #define USB_TXFUNCADDR4_ADDR_S 0
  1170. //*****************************************************************************
  1171. //
  1172. // The following are defines for the bit fields in the USB_O_TXHUBADDR4
  1173. // register.
  1174. //
  1175. //*****************************************************************************
  1176. #define USB_TXHUBADDR4_MULTTRAN 0x00000080 // Multiple Translators
  1177. #define USB_TXHUBADDR4_ADDR_M 0x0000007F // Hub Address
  1178. #define USB_TXHUBADDR4_ADDR_S 0
  1179. //*****************************************************************************
  1180. //
  1181. // The following are defines for the bit fields in the USB_O_TXHUBPORT4
  1182. // register.
  1183. //
  1184. //*****************************************************************************
  1185. #define USB_TXHUBPORT4_PORT_M 0x0000007F // Hub Port
  1186. #define USB_TXHUBPORT4_PORT_S 0
  1187. //*****************************************************************************
  1188. //
  1189. // The following are defines for the bit fields in the USB_O_RXFUNCADDR4
  1190. // register.
  1191. //
  1192. //*****************************************************************************
  1193. #define USB_RXFUNCADDR4_ADDR_M 0x0000007F // Device Address
  1194. #define USB_RXFUNCADDR4_ADDR_S 0
  1195. //*****************************************************************************
  1196. //
  1197. // The following are defines for the bit fields in the USB_O_RXHUBADDR4
  1198. // register.
  1199. //
  1200. //*****************************************************************************
  1201. #define USB_RXHUBADDR4_MULTTRAN 0x00000080 // Multiple Translators
  1202. #define USB_RXHUBADDR4_ADDR_M 0x0000007F // Hub Address
  1203. #define USB_RXHUBADDR4_ADDR_S 0
  1204. //*****************************************************************************
  1205. //
  1206. // The following are defines for the bit fields in the USB_O_RXHUBPORT4
  1207. // register.
  1208. //
  1209. //*****************************************************************************
  1210. #define USB_RXHUBPORT4_PORT_M 0x0000007F // Hub Port
  1211. #define USB_RXHUBPORT4_PORT_S 0
  1212. //*****************************************************************************
  1213. //
  1214. // The following are defines for the bit fields in the USB_O_TXFUNCADDR5
  1215. // register.
  1216. //
  1217. //*****************************************************************************
  1218. #define USB_TXFUNCADDR5_ADDR_M 0x0000007F // Device Address
  1219. #define USB_TXFUNCADDR5_ADDR_S 0
  1220. //*****************************************************************************
  1221. //
  1222. // The following are defines for the bit fields in the USB_O_TXHUBADDR5
  1223. // register.
  1224. //
  1225. //*****************************************************************************
  1226. #define USB_TXHUBADDR5_MULTTRAN 0x00000080 // Multiple Translators
  1227. #define USB_TXHUBADDR5_ADDR_M 0x0000007F // Hub Address
  1228. #define USB_TXHUBADDR5_ADDR_S 0
  1229. //*****************************************************************************
  1230. //
  1231. // The following are defines for the bit fields in the USB_O_TXHUBPORT5
  1232. // register.
  1233. //
  1234. //*****************************************************************************
  1235. #define USB_TXHUBPORT5_PORT_M 0x0000007F // Hub Port
  1236. #define USB_TXHUBPORT5_PORT_S 0
  1237. //*****************************************************************************
  1238. //
  1239. // The following are defines for the bit fields in the USB_O_RXFUNCADDR5
  1240. // register.
  1241. //
  1242. //*****************************************************************************
  1243. #define USB_RXFUNCADDR5_ADDR_M 0x0000007F // Device Address
  1244. #define USB_RXFUNCADDR5_ADDR_S 0
  1245. //*****************************************************************************
  1246. //
  1247. // The following are defines for the bit fields in the USB_O_RXHUBADDR5
  1248. // register.
  1249. //
  1250. //*****************************************************************************
  1251. #define USB_RXHUBADDR5_MULTTRAN 0x00000080 // Multiple Translators
  1252. #define USB_RXHUBADDR5_ADDR_M 0x0000007F // Hub Address
  1253. #define USB_RXHUBADDR5_ADDR_S 0
  1254. //*****************************************************************************
  1255. //
  1256. // The following are defines for the bit fields in the USB_O_RXHUBPORT5
  1257. // register.
  1258. //
  1259. //*****************************************************************************
  1260. #define USB_RXHUBPORT5_PORT_M 0x0000007F // Hub Port
  1261. #define USB_RXHUBPORT5_PORT_S 0
  1262. //*****************************************************************************
  1263. //
  1264. // The following are defines for the bit fields in the USB_O_TXFUNCADDR6
  1265. // register.
  1266. //
  1267. //*****************************************************************************
  1268. #define USB_TXFUNCADDR6_ADDR_M 0x0000007F // Device Address
  1269. #define USB_TXFUNCADDR6_ADDR_S 0
  1270. //*****************************************************************************
  1271. //
  1272. // The following are defines for the bit fields in the USB_O_TXHUBADDR6
  1273. // register.
  1274. //
  1275. //*****************************************************************************
  1276. #define USB_TXHUBADDR6_MULTTRAN 0x00000080 // Multiple Translators
  1277. #define USB_TXHUBADDR6_ADDR_M 0x0000007F // Hub Address
  1278. #define USB_TXHUBADDR6_ADDR_S 0
  1279. //*****************************************************************************
  1280. //
  1281. // The following are defines for the bit fields in the USB_O_TXHUBPORT6
  1282. // register.
  1283. //
  1284. //*****************************************************************************
  1285. #define USB_TXHUBPORT6_PORT_M 0x0000007F // Hub Port
  1286. #define USB_TXHUBPORT6_PORT_S 0
  1287. //*****************************************************************************
  1288. //
  1289. // The following are defines for the bit fields in the USB_O_RXFUNCADDR6
  1290. // register.
  1291. //
  1292. //*****************************************************************************
  1293. #define USB_RXFUNCADDR6_ADDR_M 0x0000007F // Device Address
  1294. #define USB_RXFUNCADDR6_ADDR_S 0
  1295. //*****************************************************************************
  1296. //
  1297. // The following are defines for the bit fields in the USB_O_RXHUBADDR6
  1298. // register.
  1299. //
  1300. //*****************************************************************************
  1301. #define USB_RXHUBADDR6_MULTTRAN 0x00000080 // Multiple Translators
  1302. #define USB_RXHUBADDR6_ADDR_M 0x0000007F // Hub Address
  1303. #define USB_RXHUBADDR6_ADDR_S 0
  1304. //*****************************************************************************
  1305. //
  1306. // The following are defines for the bit fields in the USB_O_RXHUBPORT6
  1307. // register.
  1308. //
  1309. //*****************************************************************************
  1310. #define USB_RXHUBPORT6_PORT_M 0x0000007F // Hub Port
  1311. #define USB_RXHUBPORT6_PORT_S 0
  1312. //*****************************************************************************
  1313. //
  1314. // The following are defines for the bit fields in the USB_O_TXFUNCADDR7
  1315. // register.
  1316. //
  1317. //*****************************************************************************
  1318. #define USB_TXFUNCADDR7_ADDR_M 0x0000007F // Device Address
  1319. #define USB_TXFUNCADDR7_ADDR_S 0
  1320. //*****************************************************************************
  1321. //
  1322. // The following are defines for the bit fields in the USB_O_TXHUBADDR7
  1323. // register.
  1324. //
  1325. //*****************************************************************************
  1326. #define USB_TXHUBADDR7_MULTTRAN 0x00000080 // Multiple Translators
  1327. #define USB_TXHUBADDR7_ADDR_M 0x0000007F // Hub Address
  1328. #define USB_TXHUBADDR7_ADDR_S 0
  1329. //*****************************************************************************
  1330. //
  1331. // The following are defines for the bit fields in the USB_O_TXHUBPORT7
  1332. // register.
  1333. //
  1334. //*****************************************************************************
  1335. #define USB_TXHUBPORT7_PORT_M 0x0000007F // Hub Port
  1336. #define USB_TXHUBPORT7_PORT_S 0
  1337. //*****************************************************************************
  1338. //
  1339. // The following are defines for the bit fields in the USB_O_RXFUNCADDR7
  1340. // register.
  1341. //
  1342. //*****************************************************************************
  1343. #define USB_RXFUNCADDR7_ADDR_M 0x0000007F // Device Address
  1344. #define USB_RXFUNCADDR7_ADDR_S 0
  1345. //*****************************************************************************
  1346. //
  1347. // The following are defines for the bit fields in the USB_O_RXHUBADDR7
  1348. // register.
  1349. //
  1350. //*****************************************************************************
  1351. #define USB_RXHUBADDR7_MULTTRAN 0x00000080 // Multiple Translators
  1352. #define USB_RXHUBADDR7_ADDR_M 0x0000007F // Hub Address
  1353. #define USB_RXHUBADDR7_ADDR_S 0
  1354. //*****************************************************************************
  1355. //
  1356. // The following are defines for the bit fields in the USB_O_RXHUBPORT7
  1357. // register.
  1358. //
  1359. //*****************************************************************************
  1360. #define USB_RXHUBPORT7_PORT_M 0x0000007F // Hub Port
  1361. #define USB_RXHUBPORT7_PORT_S 0
  1362. //*****************************************************************************
  1363. //
  1364. // The following are defines for the bit fields in the USB_O_TXFUNCADDR8
  1365. // register.
  1366. //
  1367. //*****************************************************************************
  1368. #define USB_TXFUNCADDR8_ADDR_M 0x0000007F // Device Address
  1369. #define USB_TXFUNCADDR8_ADDR_S 0
  1370. //*****************************************************************************
  1371. //
  1372. // The following are defines for the bit fields in the USB_O_TXHUBADDR8
  1373. // register.
  1374. //
  1375. //*****************************************************************************
  1376. #define USB_TXHUBADDR8_MULTTRAN 0x00000080 // Multiple Translators
  1377. #define USB_TXHUBADDR8_ADDR_M 0x0000007F // Hub Address
  1378. #define USB_TXHUBADDR8_ADDR_S 0
  1379. //*****************************************************************************
  1380. //
  1381. // The following are defines for the bit fields in the USB_O_TXHUBPORT8
  1382. // register.
  1383. //
  1384. //*****************************************************************************
  1385. #define USB_TXHUBPORT8_PORT_M 0x0000007F // Hub Port
  1386. #define USB_TXHUBPORT8_PORT_S 0
  1387. //*****************************************************************************
  1388. //
  1389. // The following are defines for the bit fields in the USB_O_RXFUNCADDR8
  1390. // register.
  1391. //
  1392. //*****************************************************************************
  1393. #define USB_RXFUNCADDR8_ADDR_M 0x0000007F // Device Address
  1394. #define USB_RXFUNCADDR8_ADDR_S 0
  1395. //*****************************************************************************
  1396. //
  1397. // The following are defines for the bit fields in the USB_O_RXHUBADDR8
  1398. // register.
  1399. //
  1400. //*****************************************************************************
  1401. #define USB_RXHUBADDR8_MULTTRAN 0x00000080 // Multiple Translators
  1402. #define USB_RXHUBADDR8_ADDR_M 0x0000007F // Hub Address
  1403. #define USB_RXHUBADDR8_ADDR_S 0
  1404. //*****************************************************************************
  1405. //
  1406. // The following are defines for the bit fields in the USB_O_RXHUBPORT8
  1407. // register.
  1408. //
  1409. //*****************************************************************************
  1410. #define USB_RXHUBPORT8_PORT_M 0x0000007F // Hub Port
  1411. #define USB_RXHUBPORT8_PORT_S 0
  1412. //*****************************************************************************
  1413. //
  1414. // The following are defines for the bit fields in the USB_O_TXFUNCADDR9
  1415. // register.
  1416. //
  1417. //*****************************************************************************
  1418. #define USB_TXFUNCADDR9_ADDR_M 0x0000007F // Device Address
  1419. #define USB_TXFUNCADDR9_ADDR_S 0
  1420. //*****************************************************************************
  1421. //
  1422. // The following are defines for the bit fields in the USB_O_TXHUBADDR9
  1423. // register.
  1424. //
  1425. //*****************************************************************************
  1426. #define USB_TXHUBADDR9_MULTTRAN 0x00000080 // Multiple Translators
  1427. #define USB_TXHUBADDR9_ADDR_M 0x0000007F // Hub Address
  1428. #define USB_TXHUBADDR9_ADDR_S 0
  1429. //*****************************************************************************
  1430. //
  1431. // The following are defines for the bit fields in the USB_O_TXHUBPORT9
  1432. // register.
  1433. //
  1434. //*****************************************************************************
  1435. #define USB_TXHUBPORT9_PORT_M 0x0000007F // Hub Port
  1436. #define USB_TXHUBPORT9_PORT_S 0
  1437. //*****************************************************************************
  1438. //
  1439. // The following are defines for the bit fields in the USB_O_RXFUNCADDR9
  1440. // register.
  1441. //
  1442. //*****************************************************************************
  1443. #define USB_RXFUNCADDR9_ADDR_M 0x0000007F // Device Address
  1444. #define USB_RXFUNCADDR9_ADDR_S 0
  1445. //*****************************************************************************
  1446. //
  1447. // The following are defines for the bit fields in the USB_O_RXHUBADDR9
  1448. // register.
  1449. //
  1450. //*****************************************************************************
  1451. #define USB_RXHUBADDR9_MULTTRAN 0x00000080 // Multiple Translators
  1452. #define USB_RXHUBADDR9_ADDR_M 0x0000007F // Hub Address
  1453. #define USB_RXHUBADDR9_ADDR_S 0
  1454. //*****************************************************************************
  1455. //
  1456. // The following are defines for the bit fields in the USB_O_RXHUBPORT9
  1457. // register.
  1458. //
  1459. //*****************************************************************************
  1460. #define USB_RXHUBPORT9_PORT_M 0x0000007F // Hub Port
  1461. #define USB_RXHUBPORT9_PORT_S 0
  1462. //*****************************************************************************
  1463. //
  1464. // The following are defines for the bit fields in the USB_O_TXFUNCADDR10
  1465. // register.
  1466. //
  1467. //*****************************************************************************
  1468. #define USB_TXFUNCADDR10_ADDR_M 0x0000007F // Device Address
  1469. #define USB_TXFUNCADDR10_ADDR_S 0
  1470. //*****************************************************************************
  1471. //
  1472. // The following are defines for the bit fields in the USB_O_TXHUBADDR10
  1473. // register.
  1474. //
  1475. //*****************************************************************************
  1476. #define USB_TXHUBADDR10_MULTTRAN \
  1477. 0x00000080 // Multiple Translators
  1478. #define USB_TXHUBADDR10_ADDR_M 0x0000007F // Hub Address
  1479. #define USB_TXHUBADDR10_ADDR_S 0
  1480. //*****************************************************************************
  1481. //
  1482. // The following are defines for the bit fields in the USB_O_TXHUBPORT10
  1483. // register.
  1484. //
  1485. //*****************************************************************************
  1486. #define USB_TXHUBPORT10_PORT_M 0x0000007F // Hub Port
  1487. #define USB_TXHUBPORT10_PORT_S 0
  1488. //*****************************************************************************
  1489. //
  1490. // The following are defines for the bit fields in the USB_O_RXFUNCADDR10
  1491. // register.
  1492. //
  1493. //*****************************************************************************
  1494. #define USB_RXFUNCADDR10_ADDR_M 0x0000007F // Device Address
  1495. #define USB_RXFUNCADDR10_ADDR_S 0
  1496. //*****************************************************************************
  1497. //
  1498. // The following are defines for the bit fields in the USB_O_RXHUBADDR10
  1499. // register.
  1500. //
  1501. //*****************************************************************************
  1502. #define USB_RXHUBADDR10_MULTTRAN \
  1503. 0x00000080 // Multiple Translators
  1504. #define USB_RXHUBADDR10_ADDR_M 0x0000007F // Hub Address
  1505. #define USB_RXHUBADDR10_ADDR_S 0
  1506. //*****************************************************************************
  1507. //
  1508. // The following are defines for the bit fields in the USB_O_RXHUBPORT10
  1509. // register.
  1510. //
  1511. //*****************************************************************************
  1512. #define USB_RXHUBPORT10_PORT_M 0x0000007F // Hub Port
  1513. #define USB_RXHUBPORT10_PORT_S 0
  1514. //*****************************************************************************
  1515. //
  1516. // The following are defines for the bit fields in the USB_O_TXFUNCADDR11
  1517. // register.
  1518. //
  1519. //*****************************************************************************
  1520. #define USB_TXFUNCADDR11_ADDR_M 0x0000007F // Device Address
  1521. #define USB_TXFUNCADDR11_ADDR_S 0
  1522. //*****************************************************************************
  1523. //
  1524. // The following are defines for the bit fields in the USB_O_TXHUBADDR11
  1525. // register.
  1526. //
  1527. //*****************************************************************************
  1528. #define USB_TXHUBADDR11_MULTTRAN \
  1529. 0x00000080 // Multiple Translators
  1530. #define USB_TXHUBADDR11_ADDR_M 0x0000007F // Hub Address
  1531. #define USB_TXHUBADDR11_ADDR_S 0
  1532. //*****************************************************************************
  1533. //
  1534. // The following are defines for the bit fields in the USB_O_TXHUBPORT11
  1535. // register.
  1536. //
  1537. //*****************************************************************************
  1538. #define USB_TXHUBPORT11_PORT_M 0x0000007F // Hub Port
  1539. #define USB_TXHUBPORT11_PORT_S 0
  1540. //*****************************************************************************
  1541. //
  1542. // The following are defines for the bit fields in the USB_O_RXFUNCADDR11
  1543. // register.
  1544. //
  1545. //*****************************************************************************
  1546. #define USB_RXFUNCADDR11_ADDR_M 0x0000007F // Device Address
  1547. #define USB_RXFUNCADDR11_ADDR_S 0
  1548. //*****************************************************************************
  1549. //
  1550. // The following are defines for the bit fields in the USB_O_RXHUBADDR11
  1551. // register.
  1552. //
  1553. //*****************************************************************************
  1554. #define USB_RXHUBADDR11_MULTTRAN \
  1555. 0x00000080 // Multiple Translators
  1556. #define USB_RXHUBADDR11_ADDR_M 0x0000007F // Hub Address
  1557. #define USB_RXHUBADDR11_ADDR_S 0
  1558. //*****************************************************************************
  1559. //
  1560. // The following are defines for the bit fields in the USB_O_RXHUBPORT11
  1561. // register.
  1562. //
  1563. //*****************************************************************************
  1564. #define USB_RXHUBPORT11_PORT_M 0x0000007F // Hub Port
  1565. #define USB_RXHUBPORT11_PORT_S 0
  1566. //*****************************************************************************
  1567. //
  1568. // The following are defines for the bit fields in the USB_O_TXFUNCADDR12
  1569. // register.
  1570. //
  1571. //*****************************************************************************
  1572. #define USB_TXFUNCADDR12_ADDR_M 0x0000007F // Device Address
  1573. #define USB_TXFUNCADDR12_ADDR_S 0
  1574. //*****************************************************************************
  1575. //
  1576. // The following are defines for the bit fields in the USB_O_TXHUBADDR12
  1577. // register.
  1578. //
  1579. //*****************************************************************************
  1580. #define USB_TXHUBADDR12_MULTTRAN \
  1581. 0x00000080 // Multiple Translators
  1582. #define USB_TXHUBADDR12_ADDR_M 0x0000007F // Hub Address
  1583. #define USB_TXHUBADDR12_ADDR_S 0
  1584. //*****************************************************************************
  1585. //
  1586. // The following are defines for the bit fields in the USB_O_TXHUBPORT12
  1587. // register.
  1588. //
  1589. //*****************************************************************************
  1590. #define USB_TXHUBPORT12_PORT_M 0x0000007F // Hub Port
  1591. #define USB_TXHUBPORT12_PORT_S 0
  1592. //*****************************************************************************
  1593. //
  1594. // The following are defines for the bit fields in the USB_O_RXFUNCADDR12
  1595. // register.
  1596. //
  1597. //*****************************************************************************
  1598. #define USB_RXFUNCADDR12_ADDR_M 0x0000007F // Device Address
  1599. #define USB_RXFUNCADDR12_ADDR_S 0
  1600. //*****************************************************************************
  1601. //
  1602. // The following are defines for the bit fields in the USB_O_RXHUBADDR12
  1603. // register.
  1604. //
  1605. //*****************************************************************************
  1606. #define USB_RXHUBADDR12_MULTTRAN \
  1607. 0x00000080 // Multiple Translators
  1608. #define USB_RXHUBADDR12_ADDR_M 0x0000007F // Hub Address
  1609. #define USB_RXHUBADDR12_ADDR_S 0
  1610. //*****************************************************************************
  1611. //
  1612. // The following are defines for the bit fields in the USB_O_RXHUBPORT12
  1613. // register.
  1614. //
  1615. //*****************************************************************************
  1616. #define USB_RXHUBPORT12_PORT_M 0x0000007F // Hub Port
  1617. #define USB_RXHUBPORT12_PORT_S 0
  1618. //*****************************************************************************
  1619. //
  1620. // The following are defines for the bit fields in the USB_O_TXFUNCADDR13
  1621. // register.
  1622. //
  1623. //*****************************************************************************
  1624. #define USB_TXFUNCADDR13_ADDR_M 0x0000007F // Device Address
  1625. #define USB_TXFUNCADDR13_ADDR_S 0
  1626. //*****************************************************************************
  1627. //
  1628. // The following are defines for the bit fields in the USB_O_TXHUBADDR13
  1629. // register.
  1630. //
  1631. //*****************************************************************************
  1632. #define USB_TXHUBADDR13_MULTTRAN \
  1633. 0x00000080 // Multiple Translators
  1634. #define USB_TXHUBADDR13_ADDR_M 0x0000007F // Hub Address
  1635. #define USB_TXHUBADDR13_ADDR_S 0
  1636. //*****************************************************************************
  1637. //
  1638. // The following are defines for the bit fields in the USB_O_TXHUBPORT13
  1639. // register.
  1640. //
  1641. //*****************************************************************************
  1642. #define USB_TXHUBPORT13_PORT_M 0x0000007F // Hub Port
  1643. #define USB_TXHUBPORT13_PORT_S 0
  1644. //*****************************************************************************
  1645. //
  1646. // The following are defines for the bit fields in the USB_O_RXFUNCADDR13
  1647. // register.
  1648. //
  1649. //*****************************************************************************
  1650. #define USB_RXFUNCADDR13_ADDR_M 0x0000007F // Device Address
  1651. #define USB_RXFUNCADDR13_ADDR_S 0
  1652. //*****************************************************************************
  1653. //
  1654. // The following are defines for the bit fields in the USB_O_RXHUBADDR13
  1655. // register.
  1656. //
  1657. //*****************************************************************************
  1658. #define USB_RXHUBADDR13_MULTTRAN \
  1659. 0x00000080 // Multiple Translators
  1660. #define USB_RXHUBADDR13_ADDR_M 0x0000007F // Hub Address
  1661. #define USB_RXHUBADDR13_ADDR_S 0
  1662. //*****************************************************************************
  1663. //
  1664. // The following are defines for the bit fields in the USB_O_RXHUBPORT13
  1665. // register.
  1666. //
  1667. //*****************************************************************************
  1668. #define USB_RXHUBPORT13_PORT_M 0x0000007F // Hub Port
  1669. #define USB_RXHUBPORT13_PORT_S 0
  1670. //*****************************************************************************
  1671. //
  1672. // The following are defines for the bit fields in the USB_O_TXFUNCADDR14
  1673. // register.
  1674. //
  1675. //*****************************************************************************
  1676. #define USB_TXFUNCADDR14_ADDR_M 0x0000007F // Device Address
  1677. #define USB_TXFUNCADDR14_ADDR_S 0
  1678. //*****************************************************************************
  1679. //
  1680. // The following are defines for the bit fields in the USB_O_TXHUBADDR14
  1681. // register.
  1682. //
  1683. //*****************************************************************************
  1684. #define USB_TXHUBADDR14_MULTTRAN \
  1685. 0x00000080 // Multiple Translators
  1686. #define USB_TXHUBADDR14_ADDR_M 0x0000007F // Hub Address
  1687. #define USB_TXHUBADDR14_ADDR_S 0
  1688. //*****************************************************************************
  1689. //
  1690. // The following are defines for the bit fields in the USB_O_TXHUBPORT14
  1691. // register.
  1692. //
  1693. //*****************************************************************************
  1694. #define USB_TXHUBPORT14_PORT_M 0x0000007F // Hub Port
  1695. #define USB_TXHUBPORT14_PORT_S 0
  1696. //*****************************************************************************
  1697. //
  1698. // The following are defines for the bit fields in the USB_O_RXFUNCADDR14
  1699. // register.
  1700. //
  1701. //*****************************************************************************
  1702. #define USB_RXFUNCADDR14_ADDR_M 0x0000007F // Device Address
  1703. #define USB_RXFUNCADDR14_ADDR_S 0
  1704. //*****************************************************************************
  1705. //
  1706. // The following are defines for the bit fields in the USB_O_RXHUBADDR14
  1707. // register.
  1708. //
  1709. //*****************************************************************************
  1710. #define USB_RXHUBADDR14_MULTTRAN \
  1711. 0x00000080 // Multiple Translators
  1712. #define USB_RXHUBADDR14_ADDR_M 0x0000007F // Hub Address
  1713. #define USB_RXHUBADDR14_ADDR_S 0
  1714. //*****************************************************************************
  1715. //
  1716. // The following are defines for the bit fields in the USB_O_RXHUBPORT14
  1717. // register.
  1718. //
  1719. //*****************************************************************************
  1720. #define USB_RXHUBPORT14_PORT_M 0x0000007F // Hub Port
  1721. #define USB_RXHUBPORT14_PORT_S 0
  1722. //*****************************************************************************
  1723. //
  1724. // The following are defines for the bit fields in the USB_O_TXFUNCADDR15
  1725. // register.
  1726. //
  1727. //*****************************************************************************
  1728. #define USB_TXFUNCADDR15_ADDR_M 0x0000007F // Device Address
  1729. #define USB_TXFUNCADDR15_ADDR_S 0
  1730. //*****************************************************************************
  1731. //
  1732. // The following are defines for the bit fields in the USB_O_TXHUBADDR15
  1733. // register.
  1734. //
  1735. //*****************************************************************************
  1736. #define USB_TXHUBADDR15_MULTTRAN \
  1737. 0x00000080 // Multiple Translators
  1738. #define USB_TXHUBADDR15_ADDR_M 0x0000007F // Hub Address
  1739. #define USB_TXHUBADDR15_ADDR_S 0
  1740. //*****************************************************************************
  1741. //
  1742. // The following are defines for the bit fields in the USB_O_TXHUBPORT15
  1743. // register.
  1744. //
  1745. //*****************************************************************************
  1746. #define USB_TXHUBPORT15_PORT_M 0x0000007F // Hub Port
  1747. #define USB_TXHUBPORT15_PORT_S 0
  1748. //*****************************************************************************
  1749. //
  1750. // The following are defines for the bit fields in the USB_O_RXFUNCADDR15
  1751. // register.
  1752. //
  1753. //*****************************************************************************
  1754. #define USB_RXFUNCADDR15_ADDR_M 0x0000007F // Device Address
  1755. #define USB_RXFUNCADDR15_ADDR_S 0
  1756. //*****************************************************************************
  1757. //
  1758. // The following are defines for the bit fields in the USB_O_RXHUBADDR15
  1759. // register.
  1760. //
  1761. //*****************************************************************************
  1762. #define USB_RXHUBADDR15_MULTTRAN \
  1763. 0x00000080 // Multiple Translators
  1764. #define USB_RXHUBADDR15_ADDR_M 0x0000007F // Hub Address
  1765. #define USB_RXHUBADDR15_ADDR_S 0
  1766. //*****************************************************************************
  1767. //
  1768. // The following are defines for the bit fields in the USB_O_RXHUBPORT15
  1769. // register.
  1770. //
  1771. //*****************************************************************************
  1772. #define USB_RXHUBPORT15_PORT_M 0x0000007F // Hub Port
  1773. #define USB_RXHUBPORT15_PORT_S 0
  1774. //*****************************************************************************
  1775. //
  1776. // The following are defines for the bit fields in the USB_O_CSRL0 register.
  1777. //
  1778. //*****************************************************************************
  1779. #define USB_CSRL0_NAKTO 0x00000080 // NAK Timeout
  1780. #define USB_CSRL0_SETENDC 0x00000080 // Setup End Clear
  1781. #define USB_CSRL0_STATUS 0x00000040 // STATUS Packet
  1782. #define USB_CSRL0_RXRDYC 0x00000040 // RXRDY Clear
  1783. #define USB_CSRL0_REQPKT 0x00000020 // Request Packet
  1784. #define USB_CSRL0_STALL 0x00000020 // Send Stall
  1785. #define USB_CSRL0_SETEND 0x00000010 // Setup End
  1786. #define USB_CSRL0_ERROR 0x00000010 // Error
  1787. #define USB_CSRL0_DATAEND 0x00000008 // Data End
  1788. #define USB_CSRL0_SETUP 0x00000008 // Setup Packet
  1789. #define USB_CSRL0_STALLED 0x00000004 // Endpoint Stalled
  1790. #define USB_CSRL0_TXRDY 0x00000002 // Transmit Packet Ready
  1791. #define USB_CSRL0_RXRDY 0x00000001 // Receive Packet Ready
  1792. //*****************************************************************************
  1793. //
  1794. // The following are defines for the bit fields in the USB_O_CSRH0 register.
  1795. //
  1796. //*****************************************************************************
  1797. #define USB_CSRH0_DTWE 0x00000004 // Data Toggle Write Enable
  1798. #define USB_CSRH0_DT 0x00000002 // Data Toggle
  1799. #define USB_CSRH0_FLUSH 0x00000001 // Flush FIFO
  1800. //*****************************************************************************
  1801. //
  1802. // The following are defines for the bit fields in the USB_O_COUNT0 register.
  1803. //
  1804. //*****************************************************************************
  1805. #define USB_COUNT0_COUNT_M 0x0000007F // FIFO Count
  1806. #define USB_COUNT0_COUNT_S 0
  1807. //*****************************************************************************
  1808. //
  1809. // The following are defines for the bit fields in the USB_O_TYPE0 register.
  1810. //
  1811. //*****************************************************************************
  1812. #define USB_TYPE0_SPEED_M 0x000000C0 // Operating Speed
  1813. #define USB_TYPE0_SPEED_FULL 0x00000080 // Full
  1814. #define USB_TYPE0_SPEED_LOW 0x000000C0 // Low
  1815. //*****************************************************************************
  1816. //
  1817. // The following are defines for the bit fields in the USB_O_NAKLMT register.
  1818. //
  1819. //*****************************************************************************
  1820. #define USB_NAKLMT_NAKLMT_M 0x0000001F // EP0 NAK Limit
  1821. #define USB_NAKLMT_NAKLMT_S 0
  1822. //*****************************************************************************
  1823. //
  1824. // The following are defines for the bit fields in the USB_O_TXMAXP1 register.
  1825. //
  1826. //*****************************************************************************
  1827. #define USB_TXMAXP1_MAXLOAD_M 0x000007FF // Maximum Payload
  1828. #define USB_TXMAXP1_MAXLOAD_S 0
  1829. //*****************************************************************************
  1830. //
  1831. // The following are defines for the bit fields in the USB_O_TXCSRL1 register.
  1832. //
  1833. //*****************************************************************************
  1834. #define USB_TXCSRL1_NAKTO 0x00000080 // NAK Timeout
  1835. #define USB_TXCSRL1_CLRDT 0x00000040 // Clear Data Toggle
  1836. #define USB_TXCSRL1_STALLED 0x00000020 // Endpoint Stalled
  1837. #define USB_TXCSRL1_STALL 0x00000010 // Send STALL
  1838. #define USB_TXCSRL1_SETUP 0x00000010 // Setup Packet
  1839. #define USB_TXCSRL1_FLUSH 0x00000008 // Flush FIFO
  1840. #define USB_TXCSRL1_ERROR 0x00000004 // Error
  1841. #define USB_TXCSRL1_UNDRN 0x00000004 // Underrun
  1842. #define USB_TXCSRL1_FIFONE 0x00000002 // FIFO Not Empty
  1843. #define USB_TXCSRL1_TXRDY 0x00000001 // Transmit Packet Ready
  1844. //*****************************************************************************
  1845. //
  1846. // The following are defines for the bit fields in the USB_O_TXCSRH1 register.
  1847. //
  1848. //*****************************************************************************
  1849. #define USB_TXCSRH1_AUTOSET 0x00000080 // Auto Set
  1850. #define USB_TXCSRH1_ISO 0x00000040 // Isochronous Transfers
  1851. #define USB_TXCSRH1_MODE 0x00000020 // Mode
  1852. #define USB_TXCSRH1_DMAEN 0x00000010 // DMA Request Enable
  1853. #define USB_TXCSRH1_FDT 0x00000008 // Force Data Toggle
  1854. #define USB_TXCSRH1_DMAMOD 0x00000004 // DMA Request Mode
  1855. #define USB_TXCSRH1_DTWE 0x00000002 // Data Toggle Write Enable
  1856. #define USB_TXCSRH1_DT 0x00000001 // Data Toggle
  1857. //*****************************************************************************
  1858. //
  1859. // The following are defines for the bit fields in the USB_O_RXMAXP1 register.
  1860. //
  1861. //*****************************************************************************
  1862. #define USB_RXMAXP1_MAXLOAD_M 0x000007FF // Maximum Payload
  1863. #define USB_RXMAXP1_MAXLOAD_S 0
  1864. //*****************************************************************************
  1865. //
  1866. // The following are defines for the bit fields in the USB_O_RXCSRL1 register.
  1867. //
  1868. //*****************************************************************************
  1869. #define USB_RXCSRL1_CLRDT 0x00000080 // Clear Data Toggle
  1870. #define USB_RXCSRL1_STALLED 0x00000040 // Endpoint Stalled
  1871. #define USB_RXCSRL1_STALL 0x00000020 // Send STALL
  1872. #define USB_RXCSRL1_REQPKT 0x00000020 // Request Packet
  1873. #define USB_RXCSRL1_FLUSH 0x00000010 // Flush FIFO
  1874. #define USB_RXCSRL1_DATAERR 0x00000008 // Data Error
  1875. #define USB_RXCSRL1_NAKTO 0x00000008 // NAK Timeout
  1876. #define USB_RXCSRL1_OVER 0x00000004 // Overrun
  1877. #define USB_RXCSRL1_ERROR 0x00000004 // Error
  1878. #define USB_RXCSRL1_FULL 0x00000002 // FIFO Full
  1879. #define USB_RXCSRL1_RXRDY 0x00000001 // Receive Packet Ready
  1880. //*****************************************************************************
  1881. //
  1882. // The following are defines for the bit fields in the USB_O_RXCSRH1 register.
  1883. //
  1884. //*****************************************************************************
  1885. #define USB_RXCSRH1_AUTOCL 0x00000080 // Auto Clear
  1886. #define USB_RXCSRH1_AUTORQ 0x00000040 // Auto Request
  1887. #define USB_RXCSRH1_ISO 0x00000040 // Isochronous Transfers
  1888. #define USB_RXCSRH1_DMAEN 0x00000020 // DMA Request Enable
  1889. #define USB_RXCSRH1_DISNYET 0x00000010 // Disable NYET
  1890. #define USB_RXCSRH1_PIDERR 0x00000010 // PID Error
  1891. #define USB_RXCSRH1_DMAMOD 0x00000008 // DMA Request Mode
  1892. #define USB_RXCSRH1_DTWE 0x00000004 // Data Toggle Write Enable
  1893. #define USB_RXCSRH1_DT 0x00000002 // Data Toggle
  1894. //*****************************************************************************
  1895. //
  1896. // The following are defines for the bit fields in the USB_O_RXCOUNT1 register.
  1897. //
  1898. //*****************************************************************************
  1899. #define USB_RXCOUNT1_COUNT_M 0x00001FFF // Receive Packet Count
  1900. #define USB_RXCOUNT1_COUNT_S 0
  1901. //*****************************************************************************
  1902. //
  1903. // The following are defines for the bit fields in the USB_O_TXTYPE1 register.
  1904. //
  1905. //*****************************************************************************
  1906. #define USB_TXTYPE1_SPEED_M 0x000000C0 // Operating Speed
  1907. #define USB_TXTYPE1_SPEED_DFLT 0x00000000 // Default
  1908. #define USB_TXTYPE1_SPEED_FULL 0x00000080 // Full
  1909. #define USB_TXTYPE1_SPEED_LOW 0x000000C0 // Low
  1910. #define USB_TXTYPE1_PROTO_M 0x00000030 // Protocol
  1911. #define USB_TXTYPE1_PROTO_CTRL 0x00000000 // Control
  1912. #define USB_TXTYPE1_PROTO_ISOC 0x00000010 // Isochronous
  1913. #define USB_TXTYPE1_PROTO_BULK 0x00000020 // Bulk
  1914. #define USB_TXTYPE1_PROTO_INT 0x00000030 // Interrupt
  1915. #define USB_TXTYPE1_TEP_M 0x0000000F // Target Endpoint Number
  1916. #define USB_TXTYPE1_TEP_S 0
  1917. //*****************************************************************************
  1918. //
  1919. // The following are defines for the bit fields in the USB_O_TXINTERVAL1
  1920. // register.
  1921. //
  1922. //*****************************************************************************
  1923. #define USB_TXINTERVAL1_NAKLMT_M \
  1924. 0x000000FF // NAK Limit
  1925. #define USB_TXINTERVAL1_TXPOLL_M \
  1926. 0x000000FF // TX Polling
  1927. #define USB_TXINTERVAL1_TXPOLL_S \
  1928. 0
  1929. #define USB_TXINTERVAL1_NAKLMT_S \
  1930. 0
  1931. //*****************************************************************************
  1932. //
  1933. // The following are defines for the bit fields in the USB_O_RXTYPE1 register.
  1934. //
  1935. //*****************************************************************************
  1936. #define USB_RXTYPE1_SPEED_M 0x000000C0 // Operating Speed
  1937. #define USB_RXTYPE1_SPEED_DFLT 0x00000000 // Default
  1938. #define USB_RXTYPE1_SPEED_FULL 0x00000080 // Full
  1939. #define USB_RXTYPE1_SPEED_LOW 0x000000C0 // Low
  1940. #define USB_RXTYPE1_PROTO_M 0x00000030 // Protocol
  1941. #define USB_RXTYPE1_PROTO_CTRL 0x00000000 // Control
  1942. #define USB_RXTYPE1_PROTO_ISOC 0x00000010 // Isochronous
  1943. #define USB_RXTYPE1_PROTO_BULK 0x00000020 // Bulk
  1944. #define USB_RXTYPE1_PROTO_INT 0x00000030 // Interrupt
  1945. #define USB_RXTYPE1_TEP_M 0x0000000F // Target Endpoint Number
  1946. #define USB_RXTYPE1_TEP_S 0
  1947. //*****************************************************************************
  1948. //
  1949. // The following are defines for the bit fields in the USB_O_RXINTERVAL1
  1950. // register.
  1951. //
  1952. //*****************************************************************************
  1953. #define USB_RXINTERVAL1_TXPOLL_M \
  1954. 0x000000FF // RX Polling
  1955. #define USB_RXINTERVAL1_NAKLMT_M \
  1956. 0x000000FF // NAK Limit
  1957. #define USB_RXINTERVAL1_TXPOLL_S \
  1958. 0
  1959. #define USB_RXINTERVAL1_NAKLMT_S \
  1960. 0
  1961. //*****************************************************************************
  1962. //
  1963. // The following are defines for the bit fields in the USB_O_TXMAXP2 register.
  1964. //
  1965. //*****************************************************************************
  1966. #define USB_TXMAXP2_MAXLOAD_M 0x000007FF // Maximum Payload
  1967. #define USB_TXMAXP2_MAXLOAD_S 0
  1968. //*****************************************************************************
  1969. //
  1970. // The following are defines for the bit fields in the USB_O_TXCSRL2 register.
  1971. //
  1972. //*****************************************************************************
  1973. #define USB_TXCSRL2_NAKTO 0x00000080 // NAK Timeout
  1974. #define USB_TXCSRL2_CLRDT 0x00000040 // Clear Data Toggle
  1975. #define USB_TXCSRL2_STALLED 0x00000020 // Endpoint Stalled
  1976. #define USB_TXCSRL2_SETUP 0x00000010 // Setup Packet
  1977. #define USB_TXCSRL2_STALL 0x00000010 // Send STALL
  1978. #define USB_TXCSRL2_FLUSH 0x00000008 // Flush FIFO
  1979. #define USB_TXCSRL2_ERROR 0x00000004 // Error
  1980. #define USB_TXCSRL2_UNDRN 0x00000004 // Underrun
  1981. #define USB_TXCSRL2_FIFONE 0x00000002 // FIFO Not Empty
  1982. #define USB_TXCSRL2_TXRDY 0x00000001 // Transmit Packet Ready
  1983. //*****************************************************************************
  1984. //
  1985. // The following are defines for the bit fields in the USB_O_TXCSRH2 register.
  1986. //
  1987. //*****************************************************************************
  1988. #define USB_TXCSRH2_AUTOSET 0x00000080 // Auto Set
  1989. #define USB_TXCSRH2_ISO 0x00000040 // Isochronous Transfers
  1990. #define USB_TXCSRH2_MODE 0x00000020 // Mode
  1991. #define USB_TXCSRH2_DMAEN 0x00000010 // DMA Request Enable
  1992. #define USB_TXCSRH2_FDT 0x00000008 // Force Data Toggle
  1993. #define USB_TXCSRH2_DMAMOD 0x00000004 // DMA Request Mode
  1994. #define USB_TXCSRH2_DTWE 0x00000002 // Data Toggle Write Enable
  1995. #define USB_TXCSRH2_DT 0x00000001 // Data Toggle
  1996. //*****************************************************************************
  1997. //
  1998. // The following are defines for the bit fields in the USB_O_RXMAXP2 register.
  1999. //
  2000. //*****************************************************************************
  2001. #define USB_RXMAXP2_MAXLOAD_M 0x000007FF // Maximum Payload
  2002. #define USB_RXMAXP2_MAXLOAD_S 0
  2003. //*****************************************************************************
  2004. //
  2005. // The following are defines for the bit fields in the USB_O_RXCSRL2 register.
  2006. //
  2007. //*****************************************************************************
  2008. #define USB_RXCSRL2_CLRDT 0x00000080 // Clear Data Toggle
  2009. #define USB_RXCSRL2_STALLED 0x00000040 // Endpoint Stalled
  2010. #define USB_RXCSRL2_REQPKT 0x00000020 // Request Packet
  2011. #define USB_RXCSRL2_STALL 0x00000020 // Send STALL
  2012. #define USB_RXCSRL2_FLUSH 0x00000010 // Flush FIFO
  2013. #define USB_RXCSRL2_DATAERR 0x00000008 // Data Error
  2014. #define USB_RXCSRL2_NAKTO 0x00000008 // NAK Timeout
  2015. #define USB_RXCSRL2_ERROR 0x00000004 // Error
  2016. #define USB_RXCSRL2_OVER 0x00000004 // Overrun
  2017. #define USB_RXCSRL2_FULL 0x00000002 // FIFO Full
  2018. #define USB_RXCSRL2_RXRDY 0x00000001 // Receive Packet Ready
  2019. //*****************************************************************************
  2020. //
  2021. // The following are defines for the bit fields in the USB_O_RXCSRH2 register.
  2022. //
  2023. //*****************************************************************************
  2024. #define USB_RXCSRH2_AUTOCL 0x00000080 // Auto Clear
  2025. #define USB_RXCSRH2_AUTORQ 0x00000040 // Auto Request
  2026. #define USB_RXCSRH2_ISO 0x00000040 // Isochronous Transfers
  2027. #define USB_RXCSRH2_DMAEN 0x00000020 // DMA Request Enable
  2028. #define USB_RXCSRH2_DISNYET 0x00000010 // Disable NYET
  2029. #define USB_RXCSRH2_PIDERR 0x00000010 // PID Error
  2030. #define USB_RXCSRH2_DMAMOD 0x00000008 // DMA Request Mode
  2031. #define USB_RXCSRH2_DTWE 0x00000004 // Data Toggle Write Enable
  2032. #define USB_RXCSRH2_DT 0x00000002 // Data Toggle
  2033. //*****************************************************************************
  2034. //
  2035. // The following are defines for the bit fields in the USB_O_RXCOUNT2 register.
  2036. //
  2037. //*****************************************************************************
  2038. #define USB_RXCOUNT2_COUNT_M 0x00001FFF // Receive Packet Count
  2039. #define USB_RXCOUNT2_COUNT_S 0
  2040. //*****************************************************************************
  2041. //
  2042. // The following are defines for the bit fields in the USB_O_TXTYPE2 register.
  2043. //
  2044. //*****************************************************************************
  2045. #define USB_TXTYPE2_SPEED_M 0x000000C0 // Operating Speed
  2046. #define USB_TXTYPE2_SPEED_DFLT 0x00000000 // Default
  2047. #define USB_TXTYPE2_SPEED_FULL 0x00000080 // Full
  2048. #define USB_TXTYPE2_SPEED_LOW 0x000000C0 // Low
  2049. #define USB_TXTYPE2_PROTO_M 0x00000030 // Protocol
  2050. #define USB_TXTYPE2_PROTO_CTRL 0x00000000 // Control
  2051. #define USB_TXTYPE2_PROTO_ISOC 0x00000010 // Isochronous
  2052. #define USB_TXTYPE2_PROTO_BULK 0x00000020 // Bulk
  2053. #define USB_TXTYPE2_PROTO_INT 0x00000030 // Interrupt
  2054. #define USB_TXTYPE2_TEP_M 0x0000000F // Target Endpoint Number
  2055. #define USB_TXTYPE2_TEP_S 0
  2056. //*****************************************************************************
  2057. //
  2058. // The following are defines for the bit fields in the USB_O_TXINTERVAL2
  2059. // register.
  2060. //
  2061. //*****************************************************************************
  2062. #define USB_TXINTERVAL2_TXPOLL_M \
  2063. 0x000000FF // TX Polling
  2064. #define USB_TXINTERVAL2_NAKLMT_M \
  2065. 0x000000FF // NAK Limit
  2066. #define USB_TXINTERVAL2_NAKLMT_S \
  2067. 0
  2068. #define USB_TXINTERVAL2_TXPOLL_S \
  2069. 0
  2070. //*****************************************************************************
  2071. //
  2072. // The following are defines for the bit fields in the USB_O_RXTYPE2 register.
  2073. //
  2074. //*****************************************************************************
  2075. #define USB_RXTYPE2_SPEED_M 0x000000C0 // Operating Speed
  2076. #define USB_RXTYPE2_SPEED_DFLT 0x00000000 // Default
  2077. #define USB_RXTYPE2_SPEED_FULL 0x00000080 // Full
  2078. #define USB_RXTYPE2_SPEED_LOW 0x000000C0 // Low
  2079. #define USB_RXTYPE2_PROTO_M 0x00000030 // Protocol
  2080. #define USB_RXTYPE2_PROTO_CTRL 0x00000000 // Control
  2081. #define USB_RXTYPE2_PROTO_ISOC 0x00000010 // Isochronous
  2082. #define USB_RXTYPE2_PROTO_BULK 0x00000020 // Bulk
  2083. #define USB_RXTYPE2_PROTO_INT 0x00000030 // Interrupt
  2084. #define USB_RXTYPE2_TEP_M 0x0000000F // Target Endpoint Number
  2085. #define USB_RXTYPE2_TEP_S 0
  2086. //*****************************************************************************
  2087. //
  2088. // The following are defines for the bit fields in the USB_O_RXINTERVAL2
  2089. // register.
  2090. //
  2091. //*****************************************************************************
  2092. #define USB_RXINTERVAL2_TXPOLL_M \
  2093. 0x000000FF // RX Polling
  2094. #define USB_RXINTERVAL2_NAKLMT_M \
  2095. 0x000000FF // NAK Limit
  2096. #define USB_RXINTERVAL2_TXPOLL_S \
  2097. 0
  2098. #define USB_RXINTERVAL2_NAKLMT_S \
  2099. 0
  2100. //*****************************************************************************
  2101. //
  2102. // The following are defines for the bit fields in the USB_O_TXMAXP3 register.
  2103. //
  2104. //*****************************************************************************
  2105. #define USB_TXMAXP3_MAXLOAD_M 0x000007FF // Maximum Payload
  2106. #define USB_TXMAXP3_MAXLOAD_S 0
  2107. //*****************************************************************************
  2108. //
  2109. // The following are defines for the bit fields in the USB_O_TXCSRL3 register.
  2110. //
  2111. //*****************************************************************************
  2112. #define USB_TXCSRL3_NAKTO 0x00000080 // NAK Timeout
  2113. #define USB_TXCSRL3_CLRDT 0x00000040 // Clear Data Toggle
  2114. #define USB_TXCSRL3_STALLED 0x00000020 // Endpoint Stalled
  2115. #define USB_TXCSRL3_SETUP 0x00000010 // Setup Packet
  2116. #define USB_TXCSRL3_STALL 0x00000010 // Send STALL
  2117. #define USB_TXCSRL3_FLUSH 0x00000008 // Flush FIFO
  2118. #define USB_TXCSRL3_ERROR 0x00000004 // Error
  2119. #define USB_TXCSRL3_UNDRN 0x00000004 // Underrun
  2120. #define USB_TXCSRL3_FIFONE 0x00000002 // FIFO Not Empty
  2121. #define USB_TXCSRL3_TXRDY 0x00000001 // Transmit Packet Ready
  2122. //*****************************************************************************
  2123. //
  2124. // The following are defines for the bit fields in the USB_O_TXCSRH3 register.
  2125. //
  2126. //*****************************************************************************
  2127. #define USB_TXCSRH3_AUTOSET 0x00000080 // Auto Set
  2128. #define USB_TXCSRH3_ISO 0x00000040 // Isochronous Transfers
  2129. #define USB_TXCSRH3_MODE 0x00000020 // Mode
  2130. #define USB_TXCSRH3_DMAEN 0x00000010 // DMA Request Enable
  2131. #define USB_TXCSRH3_FDT 0x00000008 // Force Data Toggle
  2132. #define USB_TXCSRH3_DMAMOD 0x00000004 // DMA Request Mode
  2133. #define USB_TXCSRH3_DTWE 0x00000002 // Data Toggle Write Enable
  2134. #define USB_TXCSRH3_DT 0x00000001 // Data Toggle
  2135. //*****************************************************************************
  2136. //
  2137. // The following are defines for the bit fields in the USB_O_RXMAXP3 register.
  2138. //
  2139. //*****************************************************************************
  2140. #define USB_RXMAXP3_MAXLOAD_M 0x000007FF // Maximum Payload
  2141. #define USB_RXMAXP3_MAXLOAD_S 0
  2142. //*****************************************************************************
  2143. //
  2144. // The following are defines for the bit fields in the USB_O_RXCSRL3 register.
  2145. //
  2146. //*****************************************************************************
  2147. #define USB_RXCSRL3_CLRDT 0x00000080 // Clear Data Toggle
  2148. #define USB_RXCSRL3_STALLED 0x00000040 // Endpoint Stalled
  2149. #define USB_RXCSRL3_STALL 0x00000020 // Send STALL
  2150. #define USB_RXCSRL3_REQPKT 0x00000020 // Request Packet
  2151. #define USB_RXCSRL3_FLUSH 0x00000010 // Flush FIFO
  2152. #define USB_RXCSRL3_DATAERR 0x00000008 // Data Error
  2153. #define USB_RXCSRL3_NAKTO 0x00000008 // NAK Timeout
  2154. #define USB_RXCSRL3_ERROR 0x00000004 // Error
  2155. #define USB_RXCSRL3_OVER 0x00000004 // Overrun
  2156. #define USB_RXCSRL3_FULL 0x00000002 // FIFO Full
  2157. #define USB_RXCSRL3_RXRDY 0x00000001 // Receive Packet Ready
  2158. //*****************************************************************************
  2159. //
  2160. // The following are defines for the bit fields in the USB_O_RXCSRH3 register.
  2161. //
  2162. //*****************************************************************************
  2163. #define USB_RXCSRH3_AUTOCL 0x00000080 // Auto Clear
  2164. #define USB_RXCSRH3_AUTORQ 0x00000040 // Auto Request
  2165. #define USB_RXCSRH3_ISO 0x00000040 // Isochronous Transfers
  2166. #define USB_RXCSRH3_DMAEN 0x00000020 // DMA Request Enable
  2167. #define USB_RXCSRH3_DISNYET 0x00000010 // Disable NYET
  2168. #define USB_RXCSRH3_PIDERR 0x00000010 // PID Error
  2169. #define USB_RXCSRH3_DMAMOD 0x00000008 // DMA Request Mode
  2170. #define USB_RXCSRH3_DTWE 0x00000004 // Data Toggle Write Enable
  2171. #define USB_RXCSRH3_DT 0x00000002 // Data Toggle
  2172. //*****************************************************************************
  2173. //
  2174. // The following are defines for the bit fields in the USB_O_RXCOUNT3 register.
  2175. //
  2176. //*****************************************************************************
  2177. #define USB_RXCOUNT3_COUNT_M 0x00001FFF // Receive Packet Count
  2178. #define USB_RXCOUNT3_COUNT_S 0
  2179. //*****************************************************************************
  2180. //
  2181. // The following are defines for the bit fields in the USB_O_TXTYPE3 register.
  2182. //
  2183. //*****************************************************************************
  2184. #define USB_TXTYPE3_SPEED_M 0x000000C0 // Operating Speed
  2185. #define USB_TXTYPE3_SPEED_DFLT 0x00000000 // Default
  2186. #define USB_TXTYPE3_SPEED_FULL 0x00000080 // Full
  2187. #define USB_TXTYPE3_SPEED_LOW 0x000000C0 // Low
  2188. #define USB_TXTYPE3_PROTO_M 0x00000030 // Protocol
  2189. #define USB_TXTYPE3_PROTO_CTRL 0x00000000 // Control
  2190. #define USB_TXTYPE3_PROTO_ISOC 0x00000010 // Isochronous
  2191. #define USB_TXTYPE3_PROTO_BULK 0x00000020 // Bulk
  2192. #define USB_TXTYPE3_PROTO_INT 0x00000030 // Interrupt
  2193. #define USB_TXTYPE3_TEP_M 0x0000000F // Target Endpoint Number
  2194. #define USB_TXTYPE3_TEP_S 0
  2195. //*****************************************************************************
  2196. //
  2197. // The following are defines for the bit fields in the USB_O_TXINTERVAL3
  2198. // register.
  2199. //
  2200. //*****************************************************************************
  2201. #define USB_TXINTERVAL3_TXPOLL_M \
  2202. 0x000000FF // TX Polling
  2203. #define USB_TXINTERVAL3_NAKLMT_M \
  2204. 0x000000FF // NAK Limit
  2205. #define USB_TXINTERVAL3_TXPOLL_S \
  2206. 0
  2207. #define USB_TXINTERVAL3_NAKLMT_S \
  2208. 0
  2209. //*****************************************************************************
  2210. //
  2211. // The following are defines for the bit fields in the USB_O_RXTYPE3 register.
  2212. //
  2213. //*****************************************************************************
  2214. #define USB_RXTYPE3_SPEED_M 0x000000C0 // Operating Speed
  2215. #define USB_RXTYPE3_SPEED_DFLT 0x00000000 // Default
  2216. #define USB_RXTYPE3_SPEED_FULL 0x00000080 // Full
  2217. #define USB_RXTYPE3_SPEED_LOW 0x000000C0 // Low
  2218. #define USB_RXTYPE3_PROTO_M 0x00000030 // Protocol
  2219. #define USB_RXTYPE3_PROTO_CTRL 0x00000000 // Control
  2220. #define USB_RXTYPE3_PROTO_ISOC 0x00000010 // Isochronous
  2221. #define USB_RXTYPE3_PROTO_BULK 0x00000020 // Bulk
  2222. #define USB_RXTYPE3_PROTO_INT 0x00000030 // Interrupt
  2223. #define USB_RXTYPE3_TEP_M 0x0000000F // Target Endpoint Number
  2224. #define USB_RXTYPE3_TEP_S 0
  2225. //*****************************************************************************
  2226. //
  2227. // The following are defines for the bit fields in the USB_O_RXINTERVAL3
  2228. // register.
  2229. //
  2230. //*****************************************************************************
  2231. #define USB_RXINTERVAL3_TXPOLL_M \
  2232. 0x000000FF // RX Polling
  2233. #define USB_RXINTERVAL3_NAKLMT_M \
  2234. 0x000000FF // NAK Limit
  2235. #define USB_RXINTERVAL3_TXPOLL_S \
  2236. 0
  2237. #define USB_RXINTERVAL3_NAKLMT_S \
  2238. 0
  2239. //*****************************************************************************
  2240. //
  2241. // The following are defines for the bit fields in the USB_O_TXMAXP4 register.
  2242. //
  2243. //*****************************************************************************
  2244. #define USB_TXMAXP4_MAXLOAD_M 0x000007FF // Maximum Payload
  2245. #define USB_TXMAXP4_MAXLOAD_S 0
  2246. //*****************************************************************************
  2247. //
  2248. // The following are defines for the bit fields in the USB_O_TXCSRL4 register.
  2249. //
  2250. //*****************************************************************************
  2251. #define USB_TXCSRL4_NAKTO 0x00000080 // NAK Timeout
  2252. #define USB_TXCSRL4_CLRDT 0x00000040 // Clear Data Toggle
  2253. #define USB_TXCSRL4_STALLED 0x00000020 // Endpoint Stalled
  2254. #define USB_TXCSRL4_SETUP 0x00000010 // Setup Packet
  2255. #define USB_TXCSRL4_STALL 0x00000010 // Send STALL
  2256. #define USB_TXCSRL4_FLUSH 0x00000008 // Flush FIFO
  2257. #define USB_TXCSRL4_ERROR 0x00000004 // Error
  2258. #define USB_TXCSRL4_UNDRN 0x00000004 // Underrun
  2259. #define USB_TXCSRL4_FIFONE 0x00000002 // FIFO Not Empty
  2260. #define USB_TXCSRL4_TXRDY 0x00000001 // Transmit Packet Ready
  2261. //*****************************************************************************
  2262. //
  2263. // The following are defines for the bit fields in the USB_O_TXCSRH4 register.
  2264. //
  2265. //*****************************************************************************
  2266. #define USB_TXCSRH4_AUTOSET 0x00000080 // Auto Set
  2267. #define USB_TXCSRH4_ISO 0x00000040 // Isochronous Transfers
  2268. #define USB_TXCSRH4_MODE 0x00000020 // Mode
  2269. #define USB_TXCSRH4_DMAEN 0x00000010 // DMA Request Enable
  2270. #define USB_TXCSRH4_FDT 0x00000008 // Force Data Toggle
  2271. #define USB_TXCSRH4_DMAMOD 0x00000004 // DMA Request Mode
  2272. #define USB_TXCSRH4_DTWE 0x00000002 // Data Toggle Write Enable
  2273. #define USB_TXCSRH4_DT 0x00000001 // Data Toggle
  2274. //*****************************************************************************
  2275. //
  2276. // The following are defines for the bit fields in the USB_O_RXMAXP4 register.
  2277. //
  2278. //*****************************************************************************
  2279. #define USB_RXMAXP4_MAXLOAD_M 0x000007FF // Maximum Payload
  2280. #define USB_RXMAXP4_MAXLOAD_S 0
  2281. //*****************************************************************************
  2282. //
  2283. // The following are defines for the bit fields in the USB_O_RXCSRL4 register.
  2284. //
  2285. //*****************************************************************************
  2286. #define USB_RXCSRL4_CLRDT 0x00000080 // Clear Data Toggle
  2287. #define USB_RXCSRL4_STALLED 0x00000040 // Endpoint Stalled
  2288. #define USB_RXCSRL4_STALL 0x00000020 // Send STALL
  2289. #define USB_RXCSRL4_REQPKT 0x00000020 // Request Packet
  2290. #define USB_RXCSRL4_FLUSH 0x00000010 // Flush FIFO
  2291. #define USB_RXCSRL4_NAKTO 0x00000008 // NAK Timeout
  2292. #define USB_RXCSRL4_DATAERR 0x00000008 // Data Error
  2293. #define USB_RXCSRL4_OVER 0x00000004 // Overrun
  2294. #define USB_RXCSRL4_ERROR 0x00000004 // Error
  2295. #define USB_RXCSRL4_FULL 0x00000002 // FIFO Full
  2296. #define USB_RXCSRL4_RXRDY 0x00000001 // Receive Packet Ready
  2297. //*****************************************************************************
  2298. //
  2299. // The following are defines for the bit fields in the USB_O_RXCSRH4 register.
  2300. //
  2301. //*****************************************************************************
  2302. #define USB_RXCSRH4_AUTOCL 0x00000080 // Auto Clear
  2303. #define USB_RXCSRH4_AUTORQ 0x00000040 // Auto Request
  2304. #define USB_RXCSRH4_ISO 0x00000040 // Isochronous Transfers
  2305. #define USB_RXCSRH4_DMAEN 0x00000020 // DMA Request Enable
  2306. #define USB_RXCSRH4_DISNYET 0x00000010 // Disable NYET
  2307. #define USB_RXCSRH4_PIDERR 0x00000010 // PID Error
  2308. #define USB_RXCSRH4_DMAMOD 0x00000008 // DMA Request Mode
  2309. #define USB_RXCSRH4_DTWE 0x00000004 // Data Toggle Write Enable
  2310. #define USB_RXCSRH4_DT 0x00000002 // Data Toggle
  2311. //*****************************************************************************
  2312. //
  2313. // The following are defines for the bit fields in the USB_O_RXCOUNT4 register.
  2314. //
  2315. //*****************************************************************************
  2316. #define USB_RXCOUNT4_COUNT_M 0x00001FFF // Receive Packet Count
  2317. #define USB_RXCOUNT4_COUNT_S 0
  2318. //*****************************************************************************
  2319. //
  2320. // The following are defines for the bit fields in the USB_O_TXTYPE4 register.
  2321. //
  2322. //*****************************************************************************
  2323. #define USB_TXTYPE4_SPEED_M 0x000000C0 // Operating Speed
  2324. #define USB_TXTYPE4_SPEED_DFLT 0x00000000 // Default
  2325. #define USB_TXTYPE4_SPEED_FULL 0x00000080 // Full
  2326. #define USB_TXTYPE4_SPEED_LOW 0x000000C0 // Low
  2327. #define USB_TXTYPE4_PROTO_M 0x00000030 // Protocol
  2328. #define USB_TXTYPE4_PROTO_CTRL 0x00000000 // Control
  2329. #define USB_TXTYPE4_PROTO_ISOC 0x00000010 // Isochronous
  2330. #define USB_TXTYPE4_PROTO_BULK 0x00000020 // Bulk
  2331. #define USB_TXTYPE4_PROTO_INT 0x00000030 // Interrupt
  2332. #define USB_TXTYPE4_TEP_M 0x0000000F // Target Endpoint Number
  2333. #define USB_TXTYPE4_TEP_S 0
  2334. //*****************************************************************************
  2335. //
  2336. // The following are defines for the bit fields in the USB_O_TXINTERVAL4
  2337. // register.
  2338. //
  2339. //*****************************************************************************
  2340. #define USB_TXINTERVAL4_TXPOLL_M \
  2341. 0x000000FF // TX Polling
  2342. #define USB_TXINTERVAL4_NAKLMT_M \
  2343. 0x000000FF // NAK Limit
  2344. #define USB_TXINTERVAL4_NAKLMT_S \
  2345. 0
  2346. #define USB_TXINTERVAL4_TXPOLL_S \
  2347. 0
  2348. //*****************************************************************************
  2349. //
  2350. // The following are defines for the bit fields in the USB_O_RXTYPE4 register.
  2351. //
  2352. //*****************************************************************************
  2353. #define USB_RXTYPE4_SPEED_M 0x000000C0 // Operating Speed
  2354. #define USB_RXTYPE4_SPEED_DFLT 0x00000000 // Default
  2355. #define USB_RXTYPE4_SPEED_FULL 0x00000080 // Full
  2356. #define USB_RXTYPE4_SPEED_LOW 0x000000C0 // Low
  2357. #define USB_RXTYPE4_PROTO_M 0x00000030 // Protocol
  2358. #define USB_RXTYPE4_PROTO_CTRL 0x00000000 // Control
  2359. #define USB_RXTYPE4_PROTO_ISOC 0x00000010 // Isochronous
  2360. #define USB_RXTYPE4_PROTO_BULK 0x00000020 // Bulk
  2361. #define USB_RXTYPE4_PROTO_INT 0x00000030 // Interrupt
  2362. #define USB_RXTYPE4_TEP_M 0x0000000F // Target Endpoint Number
  2363. #define USB_RXTYPE4_TEP_S 0
  2364. //*****************************************************************************
  2365. //
  2366. // The following are defines for the bit fields in the USB_O_RXINTERVAL4
  2367. // register.
  2368. //
  2369. //*****************************************************************************
  2370. #define USB_RXINTERVAL4_TXPOLL_M \
  2371. 0x000000FF // RX Polling
  2372. #define USB_RXINTERVAL4_NAKLMT_M \
  2373. 0x000000FF // NAK Limit
  2374. #define USB_RXINTERVAL4_NAKLMT_S \
  2375. 0
  2376. #define USB_RXINTERVAL4_TXPOLL_S \
  2377. 0
  2378. //*****************************************************************************
  2379. //
  2380. // The following are defines for the bit fields in the USB_O_TXMAXP5 register.
  2381. //
  2382. //*****************************************************************************
  2383. #define USB_TXMAXP5_MAXLOAD_M 0x000007FF // Maximum Payload
  2384. #define USB_TXMAXP5_MAXLOAD_S 0
  2385. //*****************************************************************************
  2386. //
  2387. // The following are defines for the bit fields in the USB_O_TXCSRL5 register.
  2388. //
  2389. //*****************************************************************************
  2390. #define USB_TXCSRL5_NAKTO 0x00000080 // NAK Timeout
  2391. #define USB_TXCSRL5_CLRDT 0x00000040 // Clear Data Toggle
  2392. #define USB_TXCSRL5_STALLED 0x00000020 // Endpoint Stalled
  2393. #define USB_TXCSRL5_SETUP 0x00000010 // Setup Packet
  2394. #define USB_TXCSRL5_STALL 0x00000010 // Send STALL
  2395. #define USB_TXCSRL5_FLUSH 0x00000008 // Flush FIFO
  2396. #define USB_TXCSRL5_ERROR 0x00000004 // Error
  2397. #define USB_TXCSRL5_UNDRN 0x00000004 // Underrun
  2398. #define USB_TXCSRL5_FIFONE 0x00000002 // FIFO Not Empty
  2399. #define USB_TXCSRL5_TXRDY 0x00000001 // Transmit Packet Ready
  2400. //*****************************************************************************
  2401. //
  2402. // The following are defines for the bit fields in the USB_O_TXCSRH5 register.
  2403. //
  2404. //*****************************************************************************
  2405. #define USB_TXCSRH5_AUTOSET 0x00000080 // Auto Set
  2406. #define USB_TXCSRH5_ISO 0x00000040 // Isochronous Transfers
  2407. #define USB_TXCSRH5_MODE 0x00000020 // Mode
  2408. #define USB_TXCSRH5_DMAEN 0x00000010 // DMA Request Enable
  2409. #define USB_TXCSRH5_FDT 0x00000008 // Force Data Toggle
  2410. #define USB_TXCSRH5_DMAMOD 0x00000004 // DMA Request Mode
  2411. #define USB_TXCSRH5_DTWE 0x00000002 // Data Toggle Write Enable
  2412. #define USB_TXCSRH5_DT 0x00000001 // Data Toggle
  2413. //*****************************************************************************
  2414. //
  2415. // The following are defines for the bit fields in the USB_O_RXMAXP5 register.
  2416. //
  2417. //*****************************************************************************
  2418. #define USB_RXMAXP5_MAXLOAD_M 0x000007FF // Maximum Payload
  2419. #define USB_RXMAXP5_MAXLOAD_S 0
  2420. //*****************************************************************************
  2421. //
  2422. // The following are defines for the bit fields in the USB_O_RXCSRL5 register.
  2423. //
  2424. //*****************************************************************************
  2425. #define USB_RXCSRL5_CLRDT 0x00000080 // Clear Data Toggle
  2426. #define USB_RXCSRL5_STALLED 0x00000040 // Endpoint Stalled
  2427. #define USB_RXCSRL5_STALL 0x00000020 // Send STALL
  2428. #define USB_RXCSRL5_REQPKT 0x00000020 // Request Packet
  2429. #define USB_RXCSRL5_FLUSH 0x00000010 // Flush FIFO
  2430. #define USB_RXCSRL5_NAKTO 0x00000008 // NAK Timeout
  2431. #define USB_RXCSRL5_DATAERR 0x00000008 // Data Error
  2432. #define USB_RXCSRL5_ERROR 0x00000004 // Error
  2433. #define USB_RXCSRL5_OVER 0x00000004 // Overrun
  2434. #define USB_RXCSRL5_FULL 0x00000002 // FIFO Full
  2435. #define USB_RXCSRL5_RXRDY 0x00000001 // Receive Packet Ready
  2436. //*****************************************************************************
  2437. //
  2438. // The following are defines for the bit fields in the USB_O_RXCSRH5 register.
  2439. //
  2440. //*****************************************************************************
  2441. #define USB_RXCSRH5_AUTOCL 0x00000080 // Auto Clear
  2442. #define USB_RXCSRH5_AUTORQ 0x00000040 // Auto Request
  2443. #define USB_RXCSRH5_ISO 0x00000040 // Isochronous Transfers
  2444. #define USB_RXCSRH5_DMAEN 0x00000020 // DMA Request Enable
  2445. #define USB_RXCSRH5_DISNYET 0x00000010 // Disable NYET
  2446. #define USB_RXCSRH5_PIDERR 0x00000010 // PID Error
  2447. #define USB_RXCSRH5_DMAMOD 0x00000008 // DMA Request Mode
  2448. #define USB_RXCSRH5_DTWE 0x00000004 // Data Toggle Write Enable
  2449. #define USB_RXCSRH5_DT 0x00000002 // Data Toggle
  2450. //*****************************************************************************
  2451. //
  2452. // The following are defines for the bit fields in the USB_O_RXCOUNT5 register.
  2453. //
  2454. //*****************************************************************************
  2455. #define USB_RXCOUNT5_COUNT_M 0x00001FFF // Receive Packet Count
  2456. #define USB_RXCOUNT5_COUNT_S 0
  2457. //*****************************************************************************
  2458. //
  2459. // The following are defines for the bit fields in the USB_O_TXTYPE5 register.
  2460. //
  2461. //*****************************************************************************
  2462. #define USB_TXTYPE5_SPEED_M 0x000000C0 // Operating Speed
  2463. #define USB_TXTYPE5_SPEED_DFLT 0x00000000 // Default
  2464. #define USB_TXTYPE5_SPEED_FULL 0x00000080 // Full
  2465. #define USB_TXTYPE5_SPEED_LOW 0x000000C0 // Low
  2466. #define USB_TXTYPE5_PROTO_M 0x00000030 // Protocol
  2467. #define USB_TXTYPE5_PROTO_CTRL 0x00000000 // Control
  2468. #define USB_TXTYPE5_PROTO_ISOC 0x00000010 // Isochronous
  2469. #define USB_TXTYPE5_PROTO_BULK 0x00000020 // Bulk
  2470. #define USB_TXTYPE5_PROTO_INT 0x00000030 // Interrupt
  2471. #define USB_TXTYPE5_TEP_M 0x0000000F // Target Endpoint Number
  2472. #define USB_TXTYPE5_TEP_S 0
  2473. //*****************************************************************************
  2474. //
  2475. // The following are defines for the bit fields in the USB_O_TXINTERVAL5
  2476. // register.
  2477. //
  2478. //*****************************************************************************
  2479. #define USB_TXINTERVAL5_TXPOLL_M \
  2480. 0x000000FF // TX Polling
  2481. #define USB_TXINTERVAL5_NAKLMT_M \
  2482. 0x000000FF // NAK Limit
  2483. #define USB_TXINTERVAL5_NAKLMT_S \
  2484. 0
  2485. #define USB_TXINTERVAL5_TXPOLL_S \
  2486. 0
  2487. //*****************************************************************************
  2488. //
  2489. // The following are defines for the bit fields in the USB_O_RXTYPE5 register.
  2490. //
  2491. //*****************************************************************************
  2492. #define USB_RXTYPE5_SPEED_M 0x000000C0 // Operating Speed
  2493. #define USB_RXTYPE5_SPEED_DFLT 0x00000000 // Default
  2494. #define USB_RXTYPE5_SPEED_FULL 0x00000080 // Full
  2495. #define USB_RXTYPE5_SPEED_LOW 0x000000C0 // Low
  2496. #define USB_RXTYPE5_PROTO_M 0x00000030 // Protocol
  2497. #define USB_RXTYPE5_PROTO_CTRL 0x00000000 // Control
  2498. #define USB_RXTYPE5_PROTO_ISOC 0x00000010 // Isochronous
  2499. #define USB_RXTYPE5_PROTO_BULK 0x00000020 // Bulk
  2500. #define USB_RXTYPE5_PROTO_INT 0x00000030 // Interrupt
  2501. #define USB_RXTYPE5_TEP_M 0x0000000F // Target Endpoint Number
  2502. #define USB_RXTYPE5_TEP_S 0
  2503. //*****************************************************************************
  2504. //
  2505. // The following are defines for the bit fields in the USB_O_RXINTERVAL5
  2506. // register.
  2507. //
  2508. //*****************************************************************************
  2509. #define USB_RXINTERVAL5_TXPOLL_M \
  2510. 0x000000FF // RX Polling
  2511. #define USB_RXINTERVAL5_NAKLMT_M \
  2512. 0x000000FF // NAK Limit
  2513. #define USB_RXINTERVAL5_TXPOLL_S \
  2514. 0
  2515. #define USB_RXINTERVAL5_NAKLMT_S \
  2516. 0
  2517. //*****************************************************************************
  2518. //
  2519. // The following are defines for the bit fields in the USB_O_TXMAXP6 register.
  2520. //
  2521. //*****************************************************************************
  2522. #define USB_TXMAXP6_MAXLOAD_M 0x000007FF // Maximum Payload
  2523. #define USB_TXMAXP6_MAXLOAD_S 0
  2524. //*****************************************************************************
  2525. //
  2526. // The following are defines for the bit fields in the USB_O_TXCSRL6 register.
  2527. //
  2528. //*****************************************************************************
  2529. #define USB_TXCSRL6_NAKTO 0x00000080 // NAK Timeout
  2530. #define USB_TXCSRL6_CLRDT 0x00000040 // Clear Data Toggle
  2531. #define USB_TXCSRL6_STALLED 0x00000020 // Endpoint Stalled
  2532. #define USB_TXCSRL6_STALL 0x00000010 // Send STALL
  2533. #define USB_TXCSRL6_SETUP 0x00000010 // Setup Packet
  2534. #define USB_TXCSRL6_FLUSH 0x00000008 // Flush FIFO
  2535. #define USB_TXCSRL6_ERROR 0x00000004 // Error
  2536. #define USB_TXCSRL6_UNDRN 0x00000004 // Underrun
  2537. #define USB_TXCSRL6_FIFONE 0x00000002 // FIFO Not Empty
  2538. #define USB_TXCSRL6_TXRDY 0x00000001 // Transmit Packet Ready
  2539. //*****************************************************************************
  2540. //
  2541. // The following are defines for the bit fields in the USB_O_TXCSRH6 register.
  2542. //
  2543. //*****************************************************************************
  2544. #define USB_TXCSRH6_AUTOSET 0x00000080 // Auto Set
  2545. #define USB_TXCSRH6_ISO 0x00000040 // Isochronous Transfers
  2546. #define USB_TXCSRH6_MODE 0x00000020 // Mode
  2547. #define USB_TXCSRH6_DMAEN 0x00000010 // DMA Request Enable
  2548. #define USB_TXCSRH6_FDT 0x00000008 // Force Data Toggle
  2549. #define USB_TXCSRH6_DMAMOD 0x00000004 // DMA Request Mode
  2550. #define USB_TXCSRH6_DTWE 0x00000002 // Data Toggle Write Enable
  2551. #define USB_TXCSRH6_DT 0x00000001 // Data Toggle
  2552. //*****************************************************************************
  2553. //
  2554. // The following are defines for the bit fields in the USB_O_RXMAXP6 register.
  2555. //
  2556. //*****************************************************************************
  2557. #define USB_RXMAXP6_MAXLOAD_M 0x000007FF // Maximum Payload
  2558. #define USB_RXMAXP6_MAXLOAD_S 0
  2559. //*****************************************************************************
  2560. //
  2561. // The following are defines for the bit fields in the USB_O_RXCSRL6 register.
  2562. //
  2563. //*****************************************************************************
  2564. #define USB_RXCSRL6_CLRDT 0x00000080 // Clear Data Toggle
  2565. #define USB_RXCSRL6_STALLED 0x00000040 // Endpoint Stalled
  2566. #define USB_RXCSRL6_REQPKT 0x00000020 // Request Packet
  2567. #define USB_RXCSRL6_STALL 0x00000020 // Send STALL
  2568. #define USB_RXCSRL6_FLUSH 0x00000010 // Flush FIFO
  2569. #define USB_RXCSRL6_NAKTO 0x00000008 // NAK Timeout
  2570. #define USB_RXCSRL6_DATAERR 0x00000008 // Data Error
  2571. #define USB_RXCSRL6_ERROR 0x00000004 // Error
  2572. #define USB_RXCSRL6_OVER 0x00000004 // Overrun
  2573. #define USB_RXCSRL6_FULL 0x00000002 // FIFO Full
  2574. #define USB_RXCSRL6_RXRDY 0x00000001 // Receive Packet Ready
  2575. //*****************************************************************************
  2576. //
  2577. // The following are defines for the bit fields in the USB_O_RXCSRH6 register.
  2578. //
  2579. //*****************************************************************************
  2580. #define USB_RXCSRH6_AUTOCL 0x00000080 // Auto Clear
  2581. #define USB_RXCSRH6_AUTORQ 0x00000040 // Auto Request
  2582. #define USB_RXCSRH6_ISO 0x00000040 // Isochronous Transfers
  2583. #define USB_RXCSRH6_DMAEN 0x00000020 // DMA Request Enable
  2584. #define USB_RXCSRH6_DISNYET 0x00000010 // Disable NYET
  2585. #define USB_RXCSRH6_PIDERR 0x00000010 // PID Error
  2586. #define USB_RXCSRH6_DMAMOD 0x00000008 // DMA Request Mode
  2587. #define USB_RXCSRH6_DTWE 0x00000004 // Data Toggle Write Enable
  2588. #define USB_RXCSRH6_DT 0x00000002 // Data Toggle
  2589. //*****************************************************************************
  2590. //
  2591. // The following are defines for the bit fields in the USB_O_RXCOUNT6 register.
  2592. //
  2593. //*****************************************************************************
  2594. #define USB_RXCOUNT6_COUNT_M 0x00001FFF // Receive Packet Count
  2595. #define USB_RXCOUNT6_COUNT_S 0
  2596. //*****************************************************************************
  2597. //
  2598. // The following are defines for the bit fields in the USB_O_TXTYPE6 register.
  2599. //
  2600. //*****************************************************************************
  2601. #define USB_TXTYPE6_SPEED_M 0x000000C0 // Operating Speed
  2602. #define USB_TXTYPE6_SPEED_DFLT 0x00000000 // Default
  2603. #define USB_TXTYPE6_SPEED_FULL 0x00000080 // Full
  2604. #define USB_TXTYPE6_SPEED_LOW 0x000000C0 // Low
  2605. #define USB_TXTYPE6_PROTO_M 0x00000030 // Protocol
  2606. #define USB_TXTYPE6_PROTO_CTRL 0x00000000 // Control
  2607. #define USB_TXTYPE6_PROTO_ISOC 0x00000010 // Isochronous
  2608. #define USB_TXTYPE6_PROTO_BULK 0x00000020 // Bulk
  2609. #define USB_TXTYPE6_PROTO_INT 0x00000030 // Interrupt
  2610. #define USB_TXTYPE6_TEP_M 0x0000000F // Target Endpoint Number
  2611. #define USB_TXTYPE6_TEP_S 0
  2612. //*****************************************************************************
  2613. //
  2614. // The following are defines for the bit fields in the USB_O_TXINTERVAL6
  2615. // register.
  2616. //
  2617. //*****************************************************************************
  2618. #define USB_TXINTERVAL6_TXPOLL_M \
  2619. 0x000000FF // TX Polling
  2620. #define USB_TXINTERVAL6_NAKLMT_M \
  2621. 0x000000FF // NAK Limit
  2622. #define USB_TXINTERVAL6_TXPOLL_S \
  2623. 0
  2624. #define USB_TXINTERVAL6_NAKLMT_S \
  2625. 0
  2626. //*****************************************************************************
  2627. //
  2628. // The following are defines for the bit fields in the USB_O_RXTYPE6 register.
  2629. //
  2630. //*****************************************************************************
  2631. #define USB_RXTYPE6_SPEED_M 0x000000C0 // Operating Speed
  2632. #define USB_RXTYPE6_SPEED_DFLT 0x00000000 // Default
  2633. #define USB_RXTYPE6_SPEED_FULL 0x00000080 // Full
  2634. #define USB_RXTYPE6_SPEED_LOW 0x000000C0 // Low
  2635. #define USB_RXTYPE6_PROTO_M 0x00000030 // Protocol
  2636. #define USB_RXTYPE6_PROTO_CTRL 0x00000000 // Control
  2637. #define USB_RXTYPE6_PROTO_ISOC 0x00000010 // Isochronous
  2638. #define USB_RXTYPE6_PROTO_BULK 0x00000020 // Bulk
  2639. #define USB_RXTYPE6_PROTO_INT 0x00000030 // Interrupt
  2640. #define USB_RXTYPE6_TEP_M 0x0000000F // Target Endpoint Number
  2641. #define USB_RXTYPE6_TEP_S 0
  2642. //*****************************************************************************
  2643. //
  2644. // The following are defines for the bit fields in the USB_O_RXINTERVAL6
  2645. // register.
  2646. //
  2647. //*****************************************************************************
  2648. #define USB_RXINTERVAL6_TXPOLL_M \
  2649. 0x000000FF // RX Polling
  2650. #define USB_RXINTERVAL6_NAKLMT_M \
  2651. 0x000000FF // NAK Limit
  2652. #define USB_RXINTERVAL6_NAKLMT_S \
  2653. 0
  2654. #define USB_RXINTERVAL6_TXPOLL_S \
  2655. 0
  2656. //*****************************************************************************
  2657. //
  2658. // The following are defines for the bit fields in the USB_O_TXMAXP7 register.
  2659. //
  2660. //*****************************************************************************
  2661. #define USB_TXMAXP7_MAXLOAD_M 0x000007FF // Maximum Payload
  2662. #define USB_TXMAXP7_MAXLOAD_S 0
  2663. //*****************************************************************************
  2664. //
  2665. // The following are defines for the bit fields in the USB_O_TXCSRL7 register.
  2666. //
  2667. //*****************************************************************************
  2668. #define USB_TXCSRL7_NAKTO 0x00000080 // NAK Timeout
  2669. #define USB_TXCSRL7_CLRDT 0x00000040 // Clear Data Toggle
  2670. #define USB_TXCSRL7_STALLED 0x00000020 // Endpoint Stalled
  2671. #define USB_TXCSRL7_STALL 0x00000010 // Send STALL
  2672. #define USB_TXCSRL7_SETUP 0x00000010 // Setup Packet
  2673. #define USB_TXCSRL7_FLUSH 0x00000008 // Flush FIFO
  2674. #define USB_TXCSRL7_ERROR 0x00000004 // Error
  2675. #define USB_TXCSRL7_UNDRN 0x00000004 // Underrun
  2676. #define USB_TXCSRL7_FIFONE 0x00000002 // FIFO Not Empty
  2677. #define USB_TXCSRL7_TXRDY 0x00000001 // Transmit Packet Ready
  2678. //*****************************************************************************
  2679. //
  2680. // The following are defines for the bit fields in the USB_O_TXCSRH7 register.
  2681. //
  2682. //*****************************************************************************
  2683. #define USB_TXCSRH7_AUTOSET 0x00000080 // Auto Set
  2684. #define USB_TXCSRH7_ISO 0x00000040 // Isochronous Transfers
  2685. #define USB_TXCSRH7_MODE 0x00000020 // Mode
  2686. #define USB_TXCSRH7_DMAEN 0x00000010 // DMA Request Enable
  2687. #define USB_TXCSRH7_FDT 0x00000008 // Force Data Toggle
  2688. #define USB_TXCSRH7_DMAMOD 0x00000004 // DMA Request Mode
  2689. #define USB_TXCSRH7_DTWE 0x00000002 // Data Toggle Write Enable
  2690. #define USB_TXCSRH7_DT 0x00000001 // Data Toggle
  2691. //*****************************************************************************
  2692. //
  2693. // The following are defines for the bit fields in the USB_O_RXMAXP7 register.
  2694. //
  2695. //*****************************************************************************
  2696. #define USB_RXMAXP7_MAXLOAD_M 0x000007FF // Maximum Payload
  2697. #define USB_RXMAXP7_MAXLOAD_S 0
  2698. //*****************************************************************************
  2699. //
  2700. // The following are defines for the bit fields in the USB_O_RXCSRL7 register.
  2701. //
  2702. //*****************************************************************************
  2703. #define USB_RXCSRL7_CLRDT 0x00000080 // Clear Data Toggle
  2704. #define USB_RXCSRL7_STALLED 0x00000040 // Endpoint Stalled
  2705. #define USB_RXCSRL7_REQPKT 0x00000020 // Request Packet
  2706. #define USB_RXCSRL7_STALL 0x00000020 // Send STALL
  2707. #define USB_RXCSRL7_FLUSH 0x00000010 // Flush FIFO
  2708. #define USB_RXCSRL7_DATAERR 0x00000008 // Data Error
  2709. #define USB_RXCSRL7_NAKTO 0x00000008 // NAK Timeout
  2710. #define USB_RXCSRL7_ERROR 0x00000004 // Error
  2711. #define USB_RXCSRL7_OVER 0x00000004 // Overrun
  2712. #define USB_RXCSRL7_FULL 0x00000002 // FIFO Full
  2713. #define USB_RXCSRL7_RXRDY 0x00000001 // Receive Packet Ready
  2714. //*****************************************************************************
  2715. //
  2716. // The following are defines for the bit fields in the USB_O_RXCSRH7 register.
  2717. //
  2718. //*****************************************************************************
  2719. #define USB_RXCSRH7_AUTOCL 0x00000080 // Auto Clear
  2720. #define USB_RXCSRH7_ISO 0x00000040 // Isochronous Transfers
  2721. #define USB_RXCSRH7_AUTORQ 0x00000040 // Auto Request
  2722. #define USB_RXCSRH7_DMAEN 0x00000020 // DMA Request Enable
  2723. #define USB_RXCSRH7_PIDERR 0x00000010 // PID Error
  2724. #define USB_RXCSRH7_DISNYET 0x00000010 // Disable NYET
  2725. #define USB_RXCSRH7_DMAMOD 0x00000008 // DMA Request Mode
  2726. #define USB_RXCSRH7_DTWE 0x00000004 // Data Toggle Write Enable
  2727. #define USB_RXCSRH7_DT 0x00000002 // Data Toggle
  2728. //*****************************************************************************
  2729. //
  2730. // The following are defines for the bit fields in the USB_O_RXCOUNT7 register.
  2731. //
  2732. //*****************************************************************************
  2733. #define USB_RXCOUNT7_COUNT_M 0x00001FFF // Receive Packet Count
  2734. #define USB_RXCOUNT7_COUNT_S 0
  2735. //*****************************************************************************
  2736. //
  2737. // The following are defines for the bit fields in the USB_O_TXTYPE7 register.
  2738. //
  2739. //*****************************************************************************
  2740. #define USB_TXTYPE7_SPEED_M 0x000000C0 // Operating Speed
  2741. #define USB_TXTYPE7_SPEED_DFLT 0x00000000 // Default
  2742. #define USB_TXTYPE7_SPEED_FULL 0x00000080 // Full
  2743. #define USB_TXTYPE7_SPEED_LOW 0x000000C0 // Low
  2744. #define USB_TXTYPE7_PROTO_M 0x00000030 // Protocol
  2745. #define USB_TXTYPE7_PROTO_CTRL 0x00000000 // Control
  2746. #define USB_TXTYPE7_PROTO_ISOC 0x00000010 // Isochronous
  2747. #define USB_TXTYPE7_PROTO_BULK 0x00000020 // Bulk
  2748. #define USB_TXTYPE7_PROTO_INT 0x00000030 // Interrupt
  2749. #define USB_TXTYPE7_TEP_M 0x0000000F // Target Endpoint Number
  2750. #define USB_TXTYPE7_TEP_S 0
  2751. //*****************************************************************************
  2752. //
  2753. // The following are defines for the bit fields in the USB_O_TXINTERVAL7
  2754. // register.
  2755. //
  2756. //*****************************************************************************
  2757. #define USB_TXINTERVAL7_TXPOLL_M \
  2758. 0x000000FF // TX Polling
  2759. #define USB_TXINTERVAL7_NAKLMT_M \
  2760. 0x000000FF // NAK Limit
  2761. #define USB_TXINTERVAL7_NAKLMT_S \
  2762. 0
  2763. #define USB_TXINTERVAL7_TXPOLL_S \
  2764. 0
  2765. //*****************************************************************************
  2766. //
  2767. // The following are defines for the bit fields in the USB_O_RXTYPE7 register.
  2768. //
  2769. //*****************************************************************************
  2770. #define USB_RXTYPE7_SPEED_M 0x000000C0 // Operating Speed
  2771. #define USB_RXTYPE7_SPEED_DFLT 0x00000000 // Default
  2772. #define USB_RXTYPE7_SPEED_FULL 0x00000080 // Full
  2773. #define USB_RXTYPE7_SPEED_LOW 0x000000C0 // Low
  2774. #define USB_RXTYPE7_PROTO_M 0x00000030 // Protocol
  2775. #define USB_RXTYPE7_PROTO_CTRL 0x00000000 // Control
  2776. #define USB_RXTYPE7_PROTO_ISOC 0x00000010 // Isochronous
  2777. #define USB_RXTYPE7_PROTO_BULK 0x00000020 // Bulk
  2778. #define USB_RXTYPE7_PROTO_INT 0x00000030 // Interrupt
  2779. #define USB_RXTYPE7_TEP_M 0x0000000F // Target Endpoint Number
  2780. #define USB_RXTYPE7_TEP_S 0
  2781. //*****************************************************************************
  2782. //
  2783. // The following are defines for the bit fields in the USB_O_RXINTERVAL7
  2784. // register.
  2785. //
  2786. //*****************************************************************************
  2787. #define USB_RXINTERVAL7_TXPOLL_M \
  2788. 0x000000FF // RX Polling
  2789. #define USB_RXINTERVAL7_NAKLMT_M \
  2790. 0x000000FF // NAK Limit
  2791. #define USB_RXINTERVAL7_NAKLMT_S \
  2792. 0
  2793. #define USB_RXINTERVAL7_TXPOLL_S \
  2794. 0
  2795. //*****************************************************************************
  2796. //
  2797. // The following are defines for the bit fields in the USB_O_TXMAXP8 register.
  2798. //
  2799. //*****************************************************************************
  2800. #define USB_TXMAXP8_MAXLOAD_M 0x000007FF // Maximum Payload
  2801. #define USB_TXMAXP8_MAXLOAD_S 0
  2802. //*****************************************************************************
  2803. //
  2804. // The following are defines for the bit fields in the USB_O_TXCSRL8 register.
  2805. //
  2806. //*****************************************************************************
  2807. #define USB_TXCSRL8_NAKTO 0x00000080 // NAK Timeout
  2808. #define USB_TXCSRL8_CLRDT 0x00000040 // Clear Data Toggle
  2809. #define USB_TXCSRL8_STALLED 0x00000020 // Endpoint Stalled
  2810. #define USB_TXCSRL8_STALL 0x00000010 // Send STALL
  2811. #define USB_TXCSRL8_SETUP 0x00000010 // Setup Packet
  2812. #define USB_TXCSRL8_FLUSH 0x00000008 // Flush FIFO
  2813. #define USB_TXCSRL8_ERROR 0x00000004 // Error
  2814. #define USB_TXCSRL8_UNDRN 0x00000004 // Underrun
  2815. #define USB_TXCSRL8_FIFONE 0x00000002 // FIFO Not Empty
  2816. #define USB_TXCSRL8_TXRDY 0x00000001 // Transmit Packet Ready
  2817. //*****************************************************************************
  2818. //
  2819. // The following are defines for the bit fields in the USB_O_TXCSRH8 register.
  2820. //
  2821. //*****************************************************************************
  2822. #define USB_TXCSRH8_AUTOSET 0x00000080 // Auto Set
  2823. #define USB_TXCSRH8_ISO 0x00000040 // Isochronous Transfers
  2824. #define USB_TXCSRH8_MODE 0x00000020 // Mode
  2825. #define USB_TXCSRH8_DMAEN 0x00000010 // DMA Request Enable
  2826. #define USB_TXCSRH8_FDT 0x00000008 // Force Data Toggle
  2827. #define USB_TXCSRH8_DMAMOD 0x00000004 // DMA Request Mode
  2828. #define USB_TXCSRH8_DTWE 0x00000002 // Data Toggle Write Enable
  2829. #define USB_TXCSRH8_DT 0x00000001 // Data Toggle
  2830. //*****************************************************************************
  2831. //
  2832. // The following are defines for the bit fields in the USB_O_RXMAXP8 register.
  2833. //
  2834. //*****************************************************************************
  2835. #define USB_RXMAXP8_MAXLOAD_M 0x000007FF // Maximum Payload
  2836. #define USB_RXMAXP8_MAXLOAD_S 0
  2837. //*****************************************************************************
  2838. //
  2839. // The following are defines for the bit fields in the USB_O_RXCSRL8 register.
  2840. //
  2841. //*****************************************************************************
  2842. #define USB_RXCSRL8_CLRDT 0x00000080 // Clear Data Toggle
  2843. #define USB_RXCSRL8_STALLED 0x00000040 // Endpoint Stalled
  2844. #define USB_RXCSRL8_STALL 0x00000020 // Send STALL
  2845. #define USB_RXCSRL8_REQPKT 0x00000020 // Request Packet
  2846. #define USB_RXCSRL8_FLUSH 0x00000010 // Flush FIFO
  2847. #define USB_RXCSRL8_NAKTO 0x00000008 // NAK Timeout
  2848. #define USB_RXCSRL8_DATAERR 0x00000008 // Data Error
  2849. #define USB_RXCSRL8_OVER 0x00000004 // Overrun
  2850. #define USB_RXCSRL8_ERROR 0x00000004 // Error
  2851. #define USB_RXCSRL8_FULL 0x00000002 // FIFO Full
  2852. #define USB_RXCSRL8_RXRDY 0x00000001 // Receive Packet Ready
  2853. //*****************************************************************************
  2854. //
  2855. // The following are defines for the bit fields in the USB_O_RXCSRH8 register.
  2856. //
  2857. //*****************************************************************************
  2858. #define USB_RXCSRH8_AUTOCL 0x00000080 // Auto Clear
  2859. #define USB_RXCSRH8_AUTORQ 0x00000040 // Auto Request
  2860. #define USB_RXCSRH8_ISO 0x00000040 // Isochronous Transfers
  2861. #define USB_RXCSRH8_DMAEN 0x00000020 // DMA Request Enable
  2862. #define USB_RXCSRH8_DISNYET 0x00000010 // Disable NYET
  2863. #define USB_RXCSRH8_PIDERR 0x00000010 // PID Error
  2864. #define USB_RXCSRH8_DMAMOD 0x00000008 // DMA Request Mode
  2865. #define USB_RXCSRH8_DTWE 0x00000004 // Data Toggle Write Enable
  2866. #define USB_RXCSRH8_DT 0x00000002 // Data Toggle
  2867. //*****************************************************************************
  2868. //
  2869. // The following are defines for the bit fields in the USB_O_RXCOUNT8 register.
  2870. //
  2871. //*****************************************************************************
  2872. #define USB_RXCOUNT8_COUNT_M 0x00001FFF // Receive Packet Count
  2873. #define USB_RXCOUNT8_COUNT_S 0
  2874. //*****************************************************************************
  2875. //
  2876. // The following are defines for the bit fields in the USB_O_TXTYPE8 register.
  2877. //
  2878. //*****************************************************************************
  2879. #define USB_TXTYPE8_SPEED_M 0x000000C0 // Operating Speed
  2880. #define USB_TXTYPE8_SPEED_DFLT 0x00000000 // Default
  2881. #define USB_TXTYPE8_SPEED_FULL 0x00000080 // Full
  2882. #define USB_TXTYPE8_SPEED_LOW 0x000000C0 // Low
  2883. #define USB_TXTYPE8_PROTO_M 0x00000030 // Protocol
  2884. #define USB_TXTYPE8_PROTO_CTRL 0x00000000 // Control
  2885. #define USB_TXTYPE8_PROTO_ISOC 0x00000010 // Isochronous
  2886. #define USB_TXTYPE8_PROTO_BULK 0x00000020 // Bulk
  2887. #define USB_TXTYPE8_PROTO_INT 0x00000030 // Interrupt
  2888. #define USB_TXTYPE8_TEP_M 0x0000000F // Target Endpoint Number
  2889. #define USB_TXTYPE8_TEP_S 0
  2890. //*****************************************************************************
  2891. //
  2892. // The following are defines for the bit fields in the USB_O_TXINTERVAL8
  2893. // register.
  2894. //
  2895. //*****************************************************************************
  2896. #define USB_TXINTERVAL8_TXPOLL_M \
  2897. 0x000000FF // TX Polling
  2898. #define USB_TXINTERVAL8_NAKLMT_M \
  2899. 0x000000FF // NAK Limit
  2900. #define USB_TXINTERVAL8_NAKLMT_S \
  2901. 0
  2902. #define USB_TXINTERVAL8_TXPOLL_S \
  2903. 0
  2904. //*****************************************************************************
  2905. //
  2906. // The following are defines for the bit fields in the USB_O_RXTYPE8 register.
  2907. //
  2908. //*****************************************************************************
  2909. #define USB_RXTYPE8_SPEED_M 0x000000C0 // Operating Speed
  2910. #define USB_RXTYPE8_SPEED_DFLT 0x00000000 // Default
  2911. #define USB_RXTYPE8_SPEED_FULL 0x00000080 // Full
  2912. #define USB_RXTYPE8_SPEED_LOW 0x000000C0 // Low
  2913. #define USB_RXTYPE8_PROTO_M 0x00000030 // Protocol
  2914. #define USB_RXTYPE8_PROTO_CTRL 0x00000000 // Control
  2915. #define USB_RXTYPE8_PROTO_ISOC 0x00000010 // Isochronous
  2916. #define USB_RXTYPE8_PROTO_BULK 0x00000020 // Bulk
  2917. #define USB_RXTYPE8_PROTO_INT 0x00000030 // Interrupt
  2918. #define USB_RXTYPE8_TEP_M 0x0000000F // Target Endpoint Number
  2919. #define USB_RXTYPE8_TEP_S 0
  2920. //*****************************************************************************
  2921. //
  2922. // The following are defines for the bit fields in the USB_O_RXINTERVAL8
  2923. // register.
  2924. //
  2925. //*****************************************************************************
  2926. #define USB_RXINTERVAL8_NAKLMT_M \
  2927. 0x000000FF // NAK Limit
  2928. #define USB_RXINTERVAL8_TXPOLL_M \
  2929. 0x000000FF // RX Polling
  2930. #define USB_RXINTERVAL8_NAKLMT_S \
  2931. 0
  2932. #define USB_RXINTERVAL8_TXPOLL_S \
  2933. 0
  2934. //*****************************************************************************
  2935. //
  2936. // The following are defines for the bit fields in the USB_O_TXMAXP9 register.
  2937. //
  2938. //*****************************************************************************
  2939. #define USB_TXMAXP9_MAXLOAD_M 0x000007FF // Maximum Payload
  2940. #define USB_TXMAXP9_MAXLOAD_S 0
  2941. //*****************************************************************************
  2942. //
  2943. // The following are defines for the bit fields in the USB_O_TXCSRL9 register.
  2944. //
  2945. //*****************************************************************************
  2946. #define USB_TXCSRL9_NAKTO 0x00000080 // NAK Timeout
  2947. #define USB_TXCSRL9_CLRDT 0x00000040 // Clear Data Toggle
  2948. #define USB_TXCSRL9_STALLED 0x00000020 // Endpoint Stalled
  2949. #define USB_TXCSRL9_SETUP 0x00000010 // Setup Packet
  2950. #define USB_TXCSRL9_STALL 0x00000010 // Send STALL
  2951. #define USB_TXCSRL9_FLUSH 0x00000008 // Flush FIFO
  2952. #define USB_TXCSRL9_ERROR 0x00000004 // Error
  2953. #define USB_TXCSRL9_UNDRN 0x00000004 // Underrun
  2954. #define USB_TXCSRL9_FIFONE 0x00000002 // FIFO Not Empty
  2955. #define USB_TXCSRL9_TXRDY 0x00000001 // Transmit Packet Ready
  2956. //*****************************************************************************
  2957. //
  2958. // The following are defines for the bit fields in the USB_O_TXCSRH9 register.
  2959. //
  2960. //*****************************************************************************
  2961. #define USB_TXCSRH9_AUTOSET 0x00000080 // Auto Set
  2962. #define USB_TXCSRH9_ISO 0x00000040 // Isochronous Transfers
  2963. #define USB_TXCSRH9_MODE 0x00000020 // Mode
  2964. #define USB_TXCSRH9_DMAEN 0x00000010 // DMA Request Enable
  2965. #define USB_TXCSRH9_FDT 0x00000008 // Force Data Toggle
  2966. #define USB_TXCSRH9_DMAMOD 0x00000004 // DMA Request Mode
  2967. #define USB_TXCSRH9_DTWE 0x00000002 // Data Toggle Write Enable
  2968. #define USB_TXCSRH9_DT 0x00000001 // Data Toggle
  2969. //*****************************************************************************
  2970. //
  2971. // The following are defines for the bit fields in the USB_O_RXMAXP9 register.
  2972. //
  2973. //*****************************************************************************
  2974. #define USB_RXMAXP9_MAXLOAD_M 0x000007FF // Maximum Payload
  2975. #define USB_RXMAXP9_MAXLOAD_S 0
  2976. //*****************************************************************************
  2977. //
  2978. // The following are defines for the bit fields in the USB_O_RXCSRL9 register.
  2979. //
  2980. //*****************************************************************************
  2981. #define USB_RXCSRL9_CLRDT 0x00000080 // Clear Data Toggle
  2982. #define USB_RXCSRL9_STALLED 0x00000040 // Endpoint Stalled
  2983. #define USB_RXCSRL9_STALL 0x00000020 // Send STALL
  2984. #define USB_RXCSRL9_REQPKT 0x00000020 // Request Packet
  2985. #define USB_RXCSRL9_FLUSH 0x00000010 // Flush FIFO
  2986. #define USB_RXCSRL9_DATAERR 0x00000008 // Data Error
  2987. #define USB_RXCSRL9_NAKTO 0x00000008 // NAK Timeout
  2988. #define USB_RXCSRL9_ERROR 0x00000004 // Error
  2989. #define USB_RXCSRL9_OVER 0x00000004 // Overrun
  2990. #define USB_RXCSRL9_FULL 0x00000002 // FIFO Full
  2991. #define USB_RXCSRL9_RXRDY 0x00000001 // Receive Packet Ready
  2992. //*****************************************************************************
  2993. //
  2994. // The following are defines for the bit fields in the USB_O_RXCSRH9 register.
  2995. //
  2996. //*****************************************************************************
  2997. #define USB_RXCSRH9_AUTOCL 0x00000080 // Auto Clear
  2998. #define USB_RXCSRH9_ISO 0x00000040 // Isochronous Transfers
  2999. #define USB_RXCSRH9_AUTORQ 0x00000040 // Auto Request
  3000. #define USB_RXCSRH9_DMAEN 0x00000020 // DMA Request Enable
  3001. #define USB_RXCSRH9_PIDERR 0x00000010 // PID Error
  3002. #define USB_RXCSRH9_DISNYET 0x00000010 // Disable NYET
  3003. #define USB_RXCSRH9_DMAMOD 0x00000008 // DMA Request Mode
  3004. #define USB_RXCSRH9_DTWE 0x00000004 // Data Toggle Write Enable
  3005. #define USB_RXCSRH9_DT 0x00000002 // Data Toggle
  3006. //*****************************************************************************
  3007. //
  3008. // The following are defines for the bit fields in the USB_O_RXCOUNT9 register.
  3009. //
  3010. //*****************************************************************************
  3011. #define USB_RXCOUNT9_COUNT_M 0x00001FFF // Receive Packet Count
  3012. #define USB_RXCOUNT9_COUNT_S 0
  3013. //*****************************************************************************
  3014. //
  3015. // The following are defines for the bit fields in the USB_O_TXTYPE9 register.
  3016. //
  3017. //*****************************************************************************
  3018. #define USB_TXTYPE9_SPEED_M 0x000000C0 // Operating Speed
  3019. #define USB_TXTYPE9_SPEED_DFLT 0x00000000 // Default
  3020. #define USB_TXTYPE9_SPEED_FULL 0x00000080 // Full
  3021. #define USB_TXTYPE9_SPEED_LOW 0x000000C0 // Low
  3022. #define USB_TXTYPE9_PROTO_M 0x00000030 // Protocol
  3023. #define USB_TXTYPE9_PROTO_CTRL 0x00000000 // Control
  3024. #define USB_TXTYPE9_PROTO_ISOC 0x00000010 // Isochronous
  3025. #define USB_TXTYPE9_PROTO_BULK 0x00000020 // Bulk
  3026. #define USB_TXTYPE9_PROTO_INT 0x00000030 // Interrupt
  3027. #define USB_TXTYPE9_TEP_M 0x0000000F // Target Endpoint Number
  3028. #define USB_TXTYPE9_TEP_S 0
  3029. //*****************************************************************************
  3030. //
  3031. // The following are defines for the bit fields in the USB_O_TXINTERVAL9
  3032. // register.
  3033. //
  3034. //*****************************************************************************
  3035. #define USB_TXINTERVAL9_TXPOLL_M \
  3036. 0x000000FF // TX Polling
  3037. #define USB_TXINTERVAL9_NAKLMT_M \
  3038. 0x000000FF // NAK Limit
  3039. #define USB_TXINTERVAL9_TXPOLL_S \
  3040. 0
  3041. #define USB_TXINTERVAL9_NAKLMT_S \
  3042. 0
  3043. //*****************************************************************************
  3044. //
  3045. // The following are defines for the bit fields in the USB_O_RXTYPE9 register.
  3046. //
  3047. //*****************************************************************************
  3048. #define USB_RXTYPE9_SPEED_M 0x000000C0 // Operating Speed
  3049. #define USB_RXTYPE9_SPEED_DFLT 0x00000000 // Default
  3050. #define USB_RXTYPE9_SPEED_FULL 0x00000080 // Full
  3051. #define USB_RXTYPE9_SPEED_LOW 0x000000C0 // Low
  3052. #define USB_RXTYPE9_PROTO_M 0x00000030 // Protocol
  3053. #define USB_RXTYPE9_PROTO_CTRL 0x00000000 // Control
  3054. #define USB_RXTYPE9_PROTO_ISOC 0x00000010 // Isochronous
  3055. #define USB_RXTYPE9_PROTO_BULK 0x00000020 // Bulk
  3056. #define USB_RXTYPE9_PROTO_INT 0x00000030 // Interrupt
  3057. #define USB_RXTYPE9_TEP_M 0x0000000F // Target Endpoint Number
  3058. #define USB_RXTYPE9_TEP_S 0
  3059. //*****************************************************************************
  3060. //
  3061. // The following are defines for the bit fields in the USB_O_RXINTERVAL9
  3062. // register.
  3063. //
  3064. //*****************************************************************************
  3065. #define USB_RXINTERVAL9_TXPOLL_M \
  3066. 0x000000FF // RX Polling
  3067. #define USB_RXINTERVAL9_NAKLMT_M \
  3068. 0x000000FF // NAK Limit
  3069. #define USB_RXINTERVAL9_NAKLMT_S \
  3070. 0
  3071. #define USB_RXINTERVAL9_TXPOLL_S \
  3072. 0
  3073. //*****************************************************************************
  3074. //
  3075. // The following are defines for the bit fields in the USB_O_TXMAXP10 register.
  3076. //
  3077. //*****************************************************************************
  3078. #define USB_TXMAXP10_MAXLOAD_M 0x000007FF // Maximum Payload
  3079. #define USB_TXMAXP10_MAXLOAD_S 0
  3080. //*****************************************************************************
  3081. //
  3082. // The following are defines for the bit fields in the USB_O_TXCSRL10 register.
  3083. //
  3084. //*****************************************************************************
  3085. #define USB_TXCSRL10_NAKTO 0x00000080 // NAK Timeout
  3086. #define USB_TXCSRL10_CLRDT 0x00000040 // Clear Data Toggle
  3087. #define USB_TXCSRL10_STALLED 0x00000020 // Endpoint Stalled
  3088. #define USB_TXCSRL10_SETUP 0x00000010 // Setup Packet
  3089. #define USB_TXCSRL10_STALL 0x00000010 // Send STALL
  3090. #define USB_TXCSRL10_FLUSH 0x00000008 // Flush FIFO
  3091. #define USB_TXCSRL10_UNDRN 0x00000004 // Underrun
  3092. #define USB_TXCSRL10_ERROR 0x00000004 // Error
  3093. #define USB_TXCSRL10_FIFONE 0x00000002 // FIFO Not Empty
  3094. #define USB_TXCSRL10_TXRDY 0x00000001 // Transmit Packet Ready
  3095. //*****************************************************************************
  3096. //
  3097. // The following are defines for the bit fields in the USB_O_TXCSRH10 register.
  3098. //
  3099. //*****************************************************************************
  3100. #define USB_TXCSRH10_AUTOSET 0x00000080 // Auto Set
  3101. #define USB_TXCSRH10_ISO 0x00000040 // Isochronous Transfers
  3102. #define USB_TXCSRH10_MODE 0x00000020 // Mode
  3103. #define USB_TXCSRH10_DMAEN 0x00000010 // DMA Request Enable
  3104. #define USB_TXCSRH10_FDT 0x00000008 // Force Data Toggle
  3105. #define USB_TXCSRH10_DMAMOD 0x00000004 // DMA Request Mode
  3106. #define USB_TXCSRH10_DTWE 0x00000002 // Data Toggle Write Enable
  3107. #define USB_TXCSRH10_DT 0x00000001 // Data Toggle
  3108. //*****************************************************************************
  3109. //
  3110. // The following are defines for the bit fields in the USB_O_RXMAXP10 register.
  3111. //
  3112. //*****************************************************************************
  3113. #define USB_RXMAXP10_MAXLOAD_M 0x000007FF // Maximum Payload
  3114. #define USB_RXMAXP10_MAXLOAD_S 0
  3115. //*****************************************************************************
  3116. //
  3117. // The following are defines for the bit fields in the USB_O_RXCSRL10 register.
  3118. //
  3119. //*****************************************************************************
  3120. #define USB_RXCSRL10_CLRDT 0x00000080 // Clear Data Toggle
  3121. #define USB_RXCSRL10_STALLED 0x00000040 // Endpoint Stalled
  3122. #define USB_RXCSRL10_STALL 0x00000020 // Send STALL
  3123. #define USB_RXCSRL10_REQPKT 0x00000020 // Request Packet
  3124. #define USB_RXCSRL10_FLUSH 0x00000010 // Flush FIFO
  3125. #define USB_RXCSRL10_NAKTO 0x00000008 // NAK Timeout
  3126. #define USB_RXCSRL10_DATAERR 0x00000008 // Data Error
  3127. #define USB_RXCSRL10_OVER 0x00000004 // Overrun
  3128. #define USB_RXCSRL10_ERROR 0x00000004 // Error
  3129. #define USB_RXCSRL10_FULL 0x00000002 // FIFO Full
  3130. #define USB_RXCSRL10_RXRDY 0x00000001 // Receive Packet Ready
  3131. //*****************************************************************************
  3132. //
  3133. // The following are defines for the bit fields in the USB_O_RXCSRH10 register.
  3134. //
  3135. //*****************************************************************************
  3136. #define USB_RXCSRH10_AUTOCL 0x00000080 // Auto Clear
  3137. #define USB_RXCSRH10_AUTORQ 0x00000040 // Auto Request
  3138. #define USB_RXCSRH10_ISO 0x00000040 // Isochronous Transfers
  3139. #define USB_RXCSRH10_DMAEN 0x00000020 // DMA Request Enable
  3140. #define USB_RXCSRH10_PIDERR 0x00000010 // PID Error
  3141. #define USB_RXCSRH10_DISNYET 0x00000010 // Disable NYET
  3142. #define USB_RXCSRH10_DMAMOD 0x00000008 // DMA Request Mode
  3143. #define USB_RXCSRH10_DTWE 0x00000004 // Data Toggle Write Enable
  3144. #define USB_RXCSRH10_DT 0x00000002 // Data Toggle
  3145. //*****************************************************************************
  3146. //
  3147. // The following are defines for the bit fields in the USB_O_RXCOUNT10
  3148. // register.
  3149. //
  3150. //*****************************************************************************
  3151. #define USB_RXCOUNT10_COUNT_M 0x00001FFF // Receive Packet Count
  3152. #define USB_RXCOUNT10_COUNT_S 0
  3153. //*****************************************************************************
  3154. //
  3155. // The following are defines for the bit fields in the USB_O_TXTYPE10 register.
  3156. //
  3157. //*****************************************************************************
  3158. #define USB_TXTYPE10_SPEED_M 0x000000C0 // Operating Speed
  3159. #define USB_TXTYPE10_SPEED_DFLT 0x00000000 // Default
  3160. #define USB_TXTYPE10_SPEED_FULL 0x00000080 // Full
  3161. #define USB_TXTYPE10_SPEED_LOW 0x000000C0 // Low
  3162. #define USB_TXTYPE10_PROTO_M 0x00000030 // Protocol
  3163. #define USB_TXTYPE10_PROTO_CTRL 0x00000000 // Control
  3164. #define USB_TXTYPE10_PROTO_ISOC 0x00000010 // Isochronous
  3165. #define USB_TXTYPE10_PROTO_BULK 0x00000020 // Bulk
  3166. #define USB_TXTYPE10_PROTO_INT 0x00000030 // Interrupt
  3167. #define USB_TXTYPE10_TEP_M 0x0000000F // Target Endpoint Number
  3168. #define USB_TXTYPE10_TEP_S 0
  3169. //*****************************************************************************
  3170. //
  3171. // The following are defines for the bit fields in the USB_O_TXINTERVAL10
  3172. // register.
  3173. //
  3174. //*****************************************************************************
  3175. #define USB_TXINTERVAL10_NAKLMT_M \
  3176. 0x000000FF // NAK Limit
  3177. #define USB_TXINTERVAL10_TXPOLL_M \
  3178. 0x000000FF // TX Polling
  3179. #define USB_TXINTERVAL10_TXPOLL_S \
  3180. 0
  3181. #define USB_TXINTERVAL10_NAKLMT_S \
  3182. 0
  3183. //*****************************************************************************
  3184. //
  3185. // The following are defines for the bit fields in the USB_O_RXTYPE10 register.
  3186. //
  3187. //*****************************************************************************
  3188. #define USB_RXTYPE10_SPEED_M 0x000000C0 // Operating Speed
  3189. #define USB_RXTYPE10_SPEED_DFLT 0x00000000 // Default
  3190. #define USB_RXTYPE10_SPEED_FULL 0x00000080 // Full
  3191. #define USB_RXTYPE10_SPEED_LOW 0x000000C0 // Low
  3192. #define USB_RXTYPE10_PROTO_M 0x00000030 // Protocol
  3193. #define USB_RXTYPE10_PROTO_CTRL 0x00000000 // Control
  3194. #define USB_RXTYPE10_PROTO_ISOC 0x00000010 // Isochronous
  3195. #define USB_RXTYPE10_PROTO_BULK 0x00000020 // Bulk
  3196. #define USB_RXTYPE10_PROTO_INT 0x00000030 // Interrupt
  3197. #define USB_RXTYPE10_TEP_M 0x0000000F // Target Endpoint Number
  3198. #define USB_RXTYPE10_TEP_S 0
  3199. //*****************************************************************************
  3200. //
  3201. // The following are defines for the bit fields in the USB_O_RXINTERVAL10
  3202. // register.
  3203. //
  3204. //*****************************************************************************
  3205. #define USB_RXINTERVAL10_NAKLMT_M \
  3206. 0x000000FF // NAK Limit
  3207. #define USB_RXINTERVAL10_TXPOLL_M \
  3208. 0x000000FF // RX Polling
  3209. #define USB_RXINTERVAL10_TXPOLL_S \
  3210. 0
  3211. #define USB_RXINTERVAL10_NAKLMT_S \
  3212. 0
  3213. //*****************************************************************************
  3214. //
  3215. // The following are defines for the bit fields in the USB_O_TXMAXP11 register.
  3216. //
  3217. //*****************************************************************************
  3218. #define USB_TXMAXP11_MAXLOAD_M 0x000007FF // Maximum Payload
  3219. #define USB_TXMAXP11_MAXLOAD_S 0
  3220. //*****************************************************************************
  3221. //
  3222. // The following are defines for the bit fields in the USB_O_TXCSRL11 register.
  3223. //
  3224. //*****************************************************************************
  3225. #define USB_TXCSRL11_NAKTO 0x00000080 // NAK Timeout
  3226. #define USB_TXCSRL11_CLRDT 0x00000040 // Clear Data Toggle
  3227. #define USB_TXCSRL11_STALLED 0x00000020 // Endpoint Stalled
  3228. #define USB_TXCSRL11_STALL 0x00000010 // Send STALL
  3229. #define USB_TXCSRL11_SETUP 0x00000010 // Setup Packet
  3230. #define USB_TXCSRL11_FLUSH 0x00000008 // Flush FIFO
  3231. #define USB_TXCSRL11_ERROR 0x00000004 // Error
  3232. #define USB_TXCSRL11_UNDRN 0x00000004 // Underrun
  3233. #define USB_TXCSRL11_FIFONE 0x00000002 // FIFO Not Empty
  3234. #define USB_TXCSRL11_TXRDY 0x00000001 // Transmit Packet Ready
  3235. //*****************************************************************************
  3236. //
  3237. // The following are defines for the bit fields in the USB_O_TXCSRH11 register.
  3238. //
  3239. //*****************************************************************************
  3240. #define USB_TXCSRH11_AUTOSET 0x00000080 // Auto Set
  3241. #define USB_TXCSRH11_ISO 0x00000040 // Isochronous Transfers
  3242. #define USB_TXCSRH11_MODE 0x00000020 // Mode
  3243. #define USB_TXCSRH11_DMAEN 0x00000010 // DMA Request Enable
  3244. #define USB_TXCSRH11_FDT 0x00000008 // Force Data Toggle
  3245. #define USB_TXCSRH11_DMAMOD 0x00000004 // DMA Request Mode
  3246. #define USB_TXCSRH11_DTWE 0x00000002 // Data Toggle Write Enable
  3247. #define USB_TXCSRH11_DT 0x00000001 // Data Toggle
  3248. //*****************************************************************************
  3249. //
  3250. // The following are defines for the bit fields in the USB_O_RXMAXP11 register.
  3251. //
  3252. //*****************************************************************************
  3253. #define USB_RXMAXP11_MAXLOAD_M 0x000007FF // Maximum Payload
  3254. #define USB_RXMAXP11_MAXLOAD_S 0
  3255. //*****************************************************************************
  3256. //
  3257. // The following are defines for the bit fields in the USB_O_RXCSRL11 register.
  3258. //
  3259. //*****************************************************************************
  3260. #define USB_RXCSRL11_CLRDT 0x00000080 // Clear Data Toggle
  3261. #define USB_RXCSRL11_STALLED 0x00000040 // Endpoint Stalled
  3262. #define USB_RXCSRL11_STALL 0x00000020 // Send STALL
  3263. #define USB_RXCSRL11_REQPKT 0x00000020 // Request Packet
  3264. #define USB_RXCSRL11_FLUSH 0x00000010 // Flush FIFO
  3265. #define USB_RXCSRL11_DATAERR 0x00000008 // Data Error
  3266. #define USB_RXCSRL11_NAKTO 0x00000008 // NAK Timeout
  3267. #define USB_RXCSRL11_OVER 0x00000004 // Overrun
  3268. #define USB_RXCSRL11_ERROR 0x00000004 // Error
  3269. #define USB_RXCSRL11_FULL 0x00000002 // FIFO Full
  3270. #define USB_RXCSRL11_RXRDY 0x00000001 // Receive Packet Ready
  3271. //*****************************************************************************
  3272. //
  3273. // The following are defines for the bit fields in the USB_O_RXCSRH11 register.
  3274. //
  3275. //*****************************************************************************
  3276. #define USB_RXCSRH11_AUTOCL 0x00000080 // Auto Clear
  3277. #define USB_RXCSRH11_ISO 0x00000040 // Isochronous Transfers
  3278. #define USB_RXCSRH11_AUTORQ 0x00000040 // Auto Request
  3279. #define USB_RXCSRH11_DMAEN 0x00000020 // DMA Request Enable
  3280. #define USB_RXCSRH11_DISNYET 0x00000010 // Disable NYET
  3281. #define USB_RXCSRH11_PIDERR 0x00000010 // PID Error
  3282. #define USB_RXCSRH11_DMAMOD 0x00000008 // DMA Request Mode
  3283. #define USB_RXCSRH11_DTWE 0x00000004 // Data Toggle Write Enable
  3284. #define USB_RXCSRH11_DT 0x00000002 // Data Toggle
  3285. //*****************************************************************************
  3286. //
  3287. // The following are defines for the bit fields in the USB_O_RXCOUNT11
  3288. // register.
  3289. //
  3290. //*****************************************************************************
  3291. #define USB_RXCOUNT11_COUNT_M 0x00001FFF // Receive Packet Count
  3292. #define USB_RXCOUNT11_COUNT_S 0
  3293. //*****************************************************************************
  3294. //
  3295. // The following are defines for the bit fields in the USB_O_TXTYPE11 register.
  3296. //
  3297. //*****************************************************************************
  3298. #define USB_TXTYPE11_SPEED_M 0x000000C0 // Operating Speed
  3299. #define USB_TXTYPE11_SPEED_DFLT 0x00000000 // Default
  3300. #define USB_TXTYPE11_SPEED_FULL 0x00000080 // Full
  3301. #define USB_TXTYPE11_SPEED_LOW 0x000000C0 // Low
  3302. #define USB_TXTYPE11_PROTO_M 0x00000030 // Protocol
  3303. #define USB_TXTYPE11_PROTO_CTRL 0x00000000 // Control
  3304. #define USB_TXTYPE11_PROTO_ISOC 0x00000010 // Isochronous
  3305. #define USB_TXTYPE11_PROTO_BULK 0x00000020 // Bulk
  3306. #define USB_TXTYPE11_PROTO_INT 0x00000030 // Interrupt
  3307. #define USB_TXTYPE11_TEP_M 0x0000000F // Target Endpoint Number
  3308. #define USB_TXTYPE11_TEP_S 0
  3309. //*****************************************************************************
  3310. //
  3311. // The following are defines for the bit fields in the USB_O_TXINTERVAL11
  3312. // register.
  3313. //
  3314. //*****************************************************************************
  3315. #define USB_TXINTERVAL11_TXPOLL_M \
  3316. 0x000000FF // TX Polling
  3317. #define USB_TXINTERVAL11_NAKLMT_M \
  3318. 0x000000FF // NAK Limit
  3319. #define USB_TXINTERVAL11_NAKLMT_S \
  3320. 0
  3321. #define USB_TXINTERVAL11_TXPOLL_S \
  3322. 0
  3323. //*****************************************************************************
  3324. //
  3325. // The following are defines for the bit fields in the USB_O_RXTYPE11 register.
  3326. //
  3327. //*****************************************************************************
  3328. #define USB_RXTYPE11_SPEED_M 0x000000C0 // Operating Speed
  3329. #define USB_RXTYPE11_SPEED_DFLT 0x00000000 // Default
  3330. #define USB_RXTYPE11_SPEED_FULL 0x00000080 // Full
  3331. #define USB_RXTYPE11_SPEED_LOW 0x000000C0 // Low
  3332. #define USB_RXTYPE11_PROTO_M 0x00000030 // Protocol
  3333. #define USB_RXTYPE11_PROTO_CTRL 0x00000000 // Control
  3334. #define USB_RXTYPE11_PROTO_ISOC 0x00000010 // Isochronous
  3335. #define USB_RXTYPE11_PROTO_BULK 0x00000020 // Bulk
  3336. #define USB_RXTYPE11_PROTO_INT 0x00000030 // Interrupt
  3337. #define USB_RXTYPE11_TEP_M 0x0000000F // Target Endpoint Number
  3338. #define USB_RXTYPE11_TEP_S 0
  3339. //*****************************************************************************
  3340. //
  3341. // The following are defines for the bit fields in the USB_O_RXINTERVAL11
  3342. // register.
  3343. //
  3344. //*****************************************************************************
  3345. #define USB_RXINTERVAL11_NAKLMT_M \
  3346. 0x000000FF // NAK Limit
  3347. #define USB_RXINTERVAL11_TXPOLL_M \
  3348. 0x000000FF // RX Polling
  3349. #define USB_RXINTERVAL11_TXPOLL_S \
  3350. 0
  3351. #define USB_RXINTERVAL11_NAKLMT_S \
  3352. 0
  3353. //*****************************************************************************
  3354. //
  3355. // The following are defines for the bit fields in the USB_O_TXMAXP12 register.
  3356. //
  3357. //*****************************************************************************
  3358. #define USB_TXMAXP12_MAXLOAD_M 0x000007FF // Maximum Payload
  3359. #define USB_TXMAXP12_MAXLOAD_S 0
  3360. //*****************************************************************************
  3361. //
  3362. // The following are defines for the bit fields in the USB_O_TXCSRL12 register.
  3363. //
  3364. //*****************************************************************************
  3365. #define USB_TXCSRL12_NAKTO 0x00000080 // NAK Timeout
  3366. #define USB_TXCSRL12_CLRDT 0x00000040 // Clear Data Toggle
  3367. #define USB_TXCSRL12_STALLED 0x00000020 // Endpoint Stalled
  3368. #define USB_TXCSRL12_SETUP 0x00000010 // Setup Packet
  3369. #define USB_TXCSRL12_STALL 0x00000010 // Send STALL
  3370. #define USB_TXCSRL12_FLUSH 0x00000008 // Flush FIFO
  3371. #define USB_TXCSRL12_UNDRN 0x00000004 // Underrun
  3372. #define USB_TXCSRL12_ERROR 0x00000004 // Error
  3373. #define USB_TXCSRL12_FIFONE 0x00000002 // FIFO Not Empty
  3374. #define USB_TXCSRL12_TXRDY 0x00000001 // Transmit Packet Ready
  3375. //*****************************************************************************
  3376. //
  3377. // The following are defines for the bit fields in the USB_O_TXCSRH12 register.
  3378. //
  3379. //*****************************************************************************
  3380. #define USB_TXCSRH12_AUTOSET 0x00000080 // Auto Set
  3381. #define USB_TXCSRH12_ISO 0x00000040 // Isochronous Transfers
  3382. #define USB_TXCSRH12_MODE 0x00000020 // Mode
  3383. #define USB_TXCSRH12_DMAEN 0x00000010 // DMA Request Enable
  3384. #define USB_TXCSRH12_FDT 0x00000008 // Force Data Toggle
  3385. #define USB_TXCSRH12_DMAMOD 0x00000004 // DMA Request Mode
  3386. #define USB_TXCSRH12_DTWE 0x00000002 // Data Toggle Write Enable
  3387. #define USB_TXCSRH12_DT 0x00000001 // Data Toggle
  3388. //*****************************************************************************
  3389. //
  3390. // The following are defines for the bit fields in the USB_O_RXMAXP12 register.
  3391. //
  3392. //*****************************************************************************
  3393. #define USB_RXMAXP12_MAXLOAD_M 0x000007FF // Maximum Payload
  3394. #define USB_RXMAXP12_MAXLOAD_S 0
  3395. //*****************************************************************************
  3396. //
  3397. // The following are defines for the bit fields in the USB_O_RXCSRL12 register.
  3398. //
  3399. //*****************************************************************************
  3400. #define USB_RXCSRL12_CLRDT 0x00000080 // Clear Data Toggle
  3401. #define USB_RXCSRL12_STALLED 0x00000040 // Endpoint Stalled
  3402. #define USB_RXCSRL12_STALL 0x00000020 // Send STALL
  3403. #define USB_RXCSRL12_REQPKT 0x00000020 // Request Packet
  3404. #define USB_RXCSRL12_FLUSH 0x00000010 // Flush FIFO
  3405. #define USB_RXCSRL12_NAKTO 0x00000008 // NAK Timeout
  3406. #define USB_RXCSRL12_DATAERR 0x00000008 // Data Error
  3407. #define USB_RXCSRL12_ERROR 0x00000004 // Error
  3408. #define USB_RXCSRL12_OVER 0x00000004 // Overrun
  3409. #define USB_RXCSRL12_FULL 0x00000002 // FIFO Full
  3410. #define USB_RXCSRL12_RXRDY 0x00000001 // Receive Packet Ready
  3411. //*****************************************************************************
  3412. //
  3413. // The following are defines for the bit fields in the USB_O_RXCSRH12 register.
  3414. //
  3415. //*****************************************************************************
  3416. #define USB_RXCSRH12_AUTOCL 0x00000080 // Auto Clear
  3417. #define USB_RXCSRH12_ISO 0x00000040 // Isochronous Transfers
  3418. #define USB_RXCSRH12_AUTORQ 0x00000040 // Auto Request
  3419. #define USB_RXCSRH12_DMAEN 0x00000020 // DMA Request Enable
  3420. #define USB_RXCSRH12_PIDERR 0x00000010 // PID Error
  3421. #define USB_RXCSRH12_DISNYET 0x00000010 // Disable NYET
  3422. #define USB_RXCSRH12_DMAMOD 0x00000008 // DMA Request Mode
  3423. #define USB_RXCSRH12_DTWE 0x00000004 // Data Toggle Write Enable
  3424. #define USB_RXCSRH12_DT 0x00000002 // Data Toggle
  3425. //*****************************************************************************
  3426. //
  3427. // The following are defines for the bit fields in the USB_O_RXCOUNT12
  3428. // register.
  3429. //
  3430. //*****************************************************************************
  3431. #define USB_RXCOUNT12_COUNT_M 0x00001FFF // Receive Packet Count
  3432. #define USB_RXCOUNT12_COUNT_S 0
  3433. //*****************************************************************************
  3434. //
  3435. // The following are defines for the bit fields in the USB_O_TXTYPE12 register.
  3436. //
  3437. //*****************************************************************************
  3438. #define USB_TXTYPE12_SPEED_M 0x000000C0 // Operating Speed
  3439. #define USB_TXTYPE12_SPEED_DFLT 0x00000000 // Default
  3440. #define USB_TXTYPE12_SPEED_FULL 0x00000080 // Full
  3441. #define USB_TXTYPE12_SPEED_LOW 0x000000C0 // Low
  3442. #define USB_TXTYPE12_PROTO_M 0x00000030 // Protocol
  3443. #define USB_TXTYPE12_PROTO_CTRL 0x00000000 // Control
  3444. #define USB_TXTYPE12_PROTO_ISOC 0x00000010 // Isochronous
  3445. #define USB_TXTYPE12_PROTO_BULK 0x00000020 // Bulk
  3446. #define USB_TXTYPE12_PROTO_INT 0x00000030 // Interrupt
  3447. #define USB_TXTYPE12_TEP_M 0x0000000F // Target Endpoint Number
  3448. #define USB_TXTYPE12_TEP_S 0
  3449. //*****************************************************************************
  3450. //
  3451. // The following are defines for the bit fields in the USB_O_TXINTERVAL12
  3452. // register.
  3453. //
  3454. //*****************************************************************************
  3455. #define USB_TXINTERVAL12_TXPOLL_M \
  3456. 0x000000FF // TX Polling
  3457. #define USB_TXINTERVAL12_NAKLMT_M \
  3458. 0x000000FF // NAK Limit
  3459. #define USB_TXINTERVAL12_TXPOLL_S \
  3460. 0
  3461. #define USB_TXINTERVAL12_NAKLMT_S \
  3462. 0
  3463. //*****************************************************************************
  3464. //
  3465. // The following are defines for the bit fields in the USB_O_RXTYPE12 register.
  3466. //
  3467. //*****************************************************************************
  3468. #define USB_RXTYPE12_SPEED_M 0x000000C0 // Operating Speed
  3469. #define USB_RXTYPE12_SPEED_DFLT 0x00000000 // Default
  3470. #define USB_RXTYPE12_SPEED_FULL 0x00000080 // Full
  3471. #define USB_RXTYPE12_SPEED_LOW 0x000000C0 // Low
  3472. #define USB_RXTYPE12_PROTO_M 0x00000030 // Protocol
  3473. #define USB_RXTYPE12_PROTO_CTRL 0x00000000 // Control
  3474. #define USB_RXTYPE12_PROTO_ISOC 0x00000010 // Isochronous
  3475. #define USB_RXTYPE12_PROTO_BULK 0x00000020 // Bulk
  3476. #define USB_RXTYPE12_PROTO_INT 0x00000030 // Interrupt
  3477. #define USB_RXTYPE12_TEP_M 0x0000000F // Target Endpoint Number
  3478. #define USB_RXTYPE12_TEP_S 0
  3479. //*****************************************************************************
  3480. //
  3481. // The following are defines for the bit fields in the USB_O_RXINTERVAL12
  3482. // register.
  3483. //
  3484. //*****************************************************************************
  3485. #define USB_RXINTERVAL12_NAKLMT_M \
  3486. 0x000000FF // NAK Limit
  3487. #define USB_RXINTERVAL12_TXPOLL_M \
  3488. 0x000000FF // RX Polling
  3489. #define USB_RXINTERVAL12_NAKLMT_S \
  3490. 0
  3491. #define USB_RXINTERVAL12_TXPOLL_S \
  3492. 0
  3493. //*****************************************************************************
  3494. //
  3495. // The following are defines for the bit fields in the USB_O_TXMAXP13 register.
  3496. //
  3497. //*****************************************************************************
  3498. #define USB_TXMAXP13_MAXLOAD_M 0x000007FF // Maximum Payload
  3499. #define USB_TXMAXP13_MAXLOAD_S 0
  3500. //*****************************************************************************
  3501. //
  3502. // The following are defines for the bit fields in the USB_O_TXCSRL13 register.
  3503. //
  3504. //*****************************************************************************
  3505. #define USB_TXCSRL13_NAKTO 0x00000080 // NAK Timeout
  3506. #define USB_TXCSRL13_CLRDT 0x00000040 // Clear Data Toggle
  3507. #define USB_TXCSRL13_STALLED 0x00000020 // Endpoint Stalled
  3508. #define USB_TXCSRL13_SETUP 0x00000010 // Setup Packet
  3509. #define USB_TXCSRL13_STALL 0x00000010 // Send STALL
  3510. #define USB_TXCSRL13_FLUSH 0x00000008 // Flush FIFO
  3511. #define USB_TXCSRL13_UNDRN 0x00000004 // Underrun
  3512. #define USB_TXCSRL13_ERROR 0x00000004 // Error
  3513. #define USB_TXCSRL13_FIFONE 0x00000002 // FIFO Not Empty
  3514. #define USB_TXCSRL13_TXRDY 0x00000001 // Transmit Packet Ready
  3515. //*****************************************************************************
  3516. //
  3517. // The following are defines for the bit fields in the USB_O_TXCSRH13 register.
  3518. //
  3519. //*****************************************************************************
  3520. #define USB_TXCSRH13_AUTOSET 0x00000080 // Auto Set
  3521. #define USB_TXCSRH13_ISO 0x00000040 // Isochronous Transfers
  3522. #define USB_TXCSRH13_MODE 0x00000020 // Mode
  3523. #define USB_TXCSRH13_DMAEN 0x00000010 // DMA Request Enable
  3524. #define USB_TXCSRH13_FDT 0x00000008 // Force Data Toggle
  3525. #define USB_TXCSRH13_DMAMOD 0x00000004 // DMA Request Mode
  3526. #define USB_TXCSRH13_DTWE 0x00000002 // Data Toggle Write Enable
  3527. #define USB_TXCSRH13_DT 0x00000001 // Data Toggle
  3528. //*****************************************************************************
  3529. //
  3530. // The following are defines for the bit fields in the USB_O_RXMAXP13 register.
  3531. //
  3532. //*****************************************************************************
  3533. #define USB_RXMAXP13_MAXLOAD_M 0x000007FF // Maximum Payload
  3534. #define USB_RXMAXP13_MAXLOAD_S 0
  3535. //*****************************************************************************
  3536. //
  3537. // The following are defines for the bit fields in the USB_O_RXCSRL13 register.
  3538. //
  3539. //*****************************************************************************
  3540. #define USB_RXCSRL13_CLRDT 0x00000080 // Clear Data Toggle
  3541. #define USB_RXCSRL13_STALLED 0x00000040 // Endpoint Stalled
  3542. #define USB_RXCSRL13_REQPKT 0x00000020 // Request Packet
  3543. #define USB_RXCSRL13_STALL 0x00000020 // Send STALL
  3544. #define USB_RXCSRL13_FLUSH 0x00000010 // Flush FIFO
  3545. #define USB_RXCSRL13_NAKTO 0x00000008 // NAK Timeout
  3546. #define USB_RXCSRL13_DATAERR 0x00000008 // Data Error
  3547. #define USB_RXCSRL13_OVER 0x00000004 // Overrun
  3548. #define USB_RXCSRL13_ERROR 0x00000004 // Error
  3549. #define USB_RXCSRL13_FULL 0x00000002 // FIFO Full
  3550. #define USB_RXCSRL13_RXRDY 0x00000001 // Receive Packet Ready
  3551. //*****************************************************************************
  3552. //
  3553. // The following are defines for the bit fields in the USB_O_RXCSRH13 register.
  3554. //
  3555. //*****************************************************************************
  3556. #define USB_RXCSRH13_AUTOCL 0x00000080 // Auto Clear
  3557. #define USB_RXCSRH13_ISO 0x00000040 // Isochronous Transfers
  3558. #define USB_RXCSRH13_AUTORQ 0x00000040 // Auto Request
  3559. #define USB_RXCSRH13_DMAEN 0x00000020 // DMA Request Enable
  3560. #define USB_RXCSRH13_DISNYET 0x00000010 // Disable NYET
  3561. #define USB_RXCSRH13_PIDERR 0x00000010 // PID Error
  3562. #define USB_RXCSRH13_DMAMOD 0x00000008 // DMA Request Mode
  3563. #define USB_RXCSRH13_DTWE 0x00000004 // Data Toggle Write Enable
  3564. #define USB_RXCSRH13_DT 0x00000002 // Data Toggle
  3565. //*****************************************************************************
  3566. //
  3567. // The following are defines for the bit fields in the USB_O_RXCOUNT13
  3568. // register.
  3569. //
  3570. //*****************************************************************************
  3571. #define USB_RXCOUNT13_COUNT_M 0x00001FFF // Receive Packet Count
  3572. #define USB_RXCOUNT13_COUNT_S 0
  3573. //*****************************************************************************
  3574. //
  3575. // The following are defines for the bit fields in the USB_O_TXTYPE13 register.
  3576. //
  3577. //*****************************************************************************
  3578. #define USB_TXTYPE13_SPEED_M 0x000000C0 // Operating Speed
  3579. #define USB_TXTYPE13_SPEED_DFLT 0x00000000 // Default
  3580. #define USB_TXTYPE13_SPEED_FULL 0x00000080 // Full
  3581. #define USB_TXTYPE13_SPEED_LOW 0x000000C0 // Low
  3582. #define USB_TXTYPE13_PROTO_M 0x00000030 // Protocol
  3583. #define USB_TXTYPE13_PROTO_CTRL 0x00000000 // Control
  3584. #define USB_TXTYPE13_PROTO_ISOC 0x00000010 // Isochronous
  3585. #define USB_TXTYPE13_PROTO_BULK 0x00000020 // Bulk
  3586. #define USB_TXTYPE13_PROTO_INT 0x00000030 // Interrupt
  3587. #define USB_TXTYPE13_TEP_M 0x0000000F // Target Endpoint Number
  3588. #define USB_TXTYPE13_TEP_S 0
  3589. //*****************************************************************************
  3590. //
  3591. // The following are defines for the bit fields in the USB_O_TXINTERVAL13
  3592. // register.
  3593. //
  3594. //*****************************************************************************
  3595. #define USB_TXINTERVAL13_NAKLMT_M \
  3596. 0x000000FF // NAK Limit
  3597. #define USB_TXINTERVAL13_TXPOLL_M \
  3598. 0x000000FF // TX Polling
  3599. #define USB_TXINTERVAL13_TXPOLL_S \
  3600. 0
  3601. #define USB_TXINTERVAL13_NAKLMT_S \
  3602. 0
  3603. //*****************************************************************************
  3604. //
  3605. // The following are defines for the bit fields in the USB_O_RXTYPE13 register.
  3606. //
  3607. //*****************************************************************************
  3608. #define USB_RXTYPE13_SPEED_M 0x000000C0 // Operating Speed
  3609. #define USB_RXTYPE13_SPEED_DFLT 0x00000000 // Default
  3610. #define USB_RXTYPE13_SPEED_FULL 0x00000080 // Full
  3611. #define USB_RXTYPE13_SPEED_LOW 0x000000C0 // Low
  3612. #define USB_RXTYPE13_PROTO_M 0x00000030 // Protocol
  3613. #define USB_RXTYPE13_PROTO_CTRL 0x00000000 // Control
  3614. #define USB_RXTYPE13_PROTO_ISOC 0x00000010 // Isochronous
  3615. #define USB_RXTYPE13_PROTO_BULK 0x00000020 // Bulk
  3616. #define USB_RXTYPE13_PROTO_INT 0x00000030 // Interrupt
  3617. #define USB_RXTYPE13_TEP_M 0x0000000F // Target Endpoint Number
  3618. #define USB_RXTYPE13_TEP_S 0
  3619. //*****************************************************************************
  3620. //
  3621. // The following are defines for the bit fields in the USB_O_RXINTERVAL13
  3622. // register.
  3623. //
  3624. //*****************************************************************************
  3625. #define USB_RXINTERVAL13_TXPOLL_M \
  3626. 0x000000FF // RX Polling
  3627. #define USB_RXINTERVAL13_NAKLMT_M \
  3628. 0x000000FF // NAK Limit
  3629. #define USB_RXINTERVAL13_TXPOLL_S \
  3630. 0
  3631. #define USB_RXINTERVAL13_NAKLMT_S \
  3632. 0
  3633. //*****************************************************************************
  3634. //
  3635. // The following are defines for the bit fields in the USB_O_TXMAXP14 register.
  3636. //
  3637. //*****************************************************************************
  3638. #define USB_TXMAXP14_MAXLOAD_M 0x000007FF // Maximum Payload
  3639. #define USB_TXMAXP14_MAXLOAD_S 0
  3640. //*****************************************************************************
  3641. //
  3642. // The following are defines for the bit fields in the USB_O_TXCSRL14 register.
  3643. //
  3644. //*****************************************************************************
  3645. #define USB_TXCSRL14_NAKTO 0x00000080 // NAK Timeout
  3646. #define USB_TXCSRL14_CLRDT 0x00000040 // Clear Data Toggle
  3647. #define USB_TXCSRL14_STALLED 0x00000020 // Endpoint Stalled
  3648. #define USB_TXCSRL14_STALL 0x00000010 // Send STALL
  3649. #define USB_TXCSRL14_SETUP 0x00000010 // Setup Packet
  3650. #define USB_TXCSRL14_FLUSH 0x00000008 // Flush FIFO
  3651. #define USB_TXCSRL14_ERROR 0x00000004 // Error
  3652. #define USB_TXCSRL14_UNDRN 0x00000004 // Underrun
  3653. #define USB_TXCSRL14_FIFONE 0x00000002 // FIFO Not Empty
  3654. #define USB_TXCSRL14_TXRDY 0x00000001 // Transmit Packet Ready
  3655. //*****************************************************************************
  3656. //
  3657. // The following are defines for the bit fields in the USB_O_TXCSRH14 register.
  3658. //
  3659. //*****************************************************************************
  3660. #define USB_TXCSRH14_AUTOSET 0x00000080 // Auto Set
  3661. #define USB_TXCSRH14_ISO 0x00000040 // Isochronous Transfers
  3662. #define USB_TXCSRH14_MODE 0x00000020 // Mode
  3663. #define USB_TXCSRH14_DMAEN 0x00000010 // DMA Request Enable
  3664. #define USB_TXCSRH14_FDT 0x00000008 // Force Data Toggle
  3665. #define USB_TXCSRH14_DMAMOD 0x00000004 // DMA Request Mode
  3666. #define USB_TXCSRH14_DTWE 0x00000002 // Data Toggle Write Enable
  3667. #define USB_TXCSRH14_DT 0x00000001 // Data Toggle
  3668. //*****************************************************************************
  3669. //
  3670. // The following are defines for the bit fields in the USB_O_RXMAXP14 register.
  3671. //
  3672. //*****************************************************************************
  3673. #define USB_RXMAXP14_MAXLOAD_M 0x000007FF // Maximum Payload
  3674. #define USB_RXMAXP14_MAXLOAD_S 0
  3675. //*****************************************************************************
  3676. //
  3677. // The following are defines for the bit fields in the USB_O_RXCSRL14 register.
  3678. //
  3679. //*****************************************************************************
  3680. #define USB_RXCSRL14_CLRDT 0x00000080 // Clear Data Toggle
  3681. #define USB_RXCSRL14_STALLED 0x00000040 // Endpoint Stalled
  3682. #define USB_RXCSRL14_REQPKT 0x00000020 // Request Packet
  3683. #define USB_RXCSRL14_STALL 0x00000020 // Send STALL
  3684. #define USB_RXCSRL14_FLUSH 0x00000010 // Flush FIFO
  3685. #define USB_RXCSRL14_DATAERR 0x00000008 // Data Error
  3686. #define USB_RXCSRL14_NAKTO 0x00000008 // NAK Timeout
  3687. #define USB_RXCSRL14_OVER 0x00000004 // Overrun
  3688. #define USB_RXCSRL14_ERROR 0x00000004 // Error
  3689. #define USB_RXCSRL14_FULL 0x00000002 // FIFO Full
  3690. #define USB_RXCSRL14_RXRDY 0x00000001 // Receive Packet Ready
  3691. //*****************************************************************************
  3692. //
  3693. // The following are defines for the bit fields in the USB_O_RXCSRH14 register.
  3694. //
  3695. //*****************************************************************************
  3696. #define USB_RXCSRH14_AUTOCL 0x00000080 // Auto Clear
  3697. #define USB_RXCSRH14_AUTORQ 0x00000040 // Auto Request
  3698. #define USB_RXCSRH14_ISO 0x00000040 // Isochronous Transfers
  3699. #define USB_RXCSRH14_DMAEN 0x00000020 // DMA Request Enable
  3700. #define USB_RXCSRH14_PIDERR 0x00000010 // PID Error
  3701. #define USB_RXCSRH14_DISNYET 0x00000010 // Disable NYET
  3702. #define USB_RXCSRH14_DMAMOD 0x00000008 // DMA Request Mode
  3703. #define USB_RXCSRH14_DTWE 0x00000004 // Data Toggle Write Enable
  3704. #define USB_RXCSRH14_DT 0x00000002 // Data Toggle
  3705. //*****************************************************************************
  3706. //
  3707. // The following are defines for the bit fields in the USB_O_RXCOUNT14
  3708. // register.
  3709. //
  3710. //*****************************************************************************
  3711. #define USB_RXCOUNT14_COUNT_M 0x00001FFF // Receive Packet Count
  3712. #define USB_RXCOUNT14_COUNT_S 0
  3713. //*****************************************************************************
  3714. //
  3715. // The following are defines for the bit fields in the USB_O_TXTYPE14 register.
  3716. //
  3717. //*****************************************************************************
  3718. #define USB_TXTYPE14_SPEED_M 0x000000C0 // Operating Speed
  3719. #define USB_TXTYPE14_SPEED_DFLT 0x00000000 // Default
  3720. #define USB_TXTYPE14_SPEED_FULL 0x00000080 // Full
  3721. #define USB_TXTYPE14_SPEED_LOW 0x000000C0 // Low
  3722. #define USB_TXTYPE14_PROTO_M 0x00000030 // Protocol
  3723. #define USB_TXTYPE14_PROTO_CTRL 0x00000000 // Control
  3724. #define USB_TXTYPE14_PROTO_ISOC 0x00000010 // Isochronous
  3725. #define USB_TXTYPE14_PROTO_BULK 0x00000020 // Bulk
  3726. #define USB_TXTYPE14_PROTO_INT 0x00000030 // Interrupt
  3727. #define USB_TXTYPE14_TEP_M 0x0000000F // Target Endpoint Number
  3728. #define USB_TXTYPE14_TEP_S 0
  3729. //*****************************************************************************
  3730. //
  3731. // The following are defines for the bit fields in the USB_O_TXINTERVAL14
  3732. // register.
  3733. //
  3734. //*****************************************************************************
  3735. #define USB_TXINTERVAL14_TXPOLL_M \
  3736. 0x000000FF // TX Polling
  3737. #define USB_TXINTERVAL14_NAKLMT_M \
  3738. 0x000000FF // NAK Limit
  3739. #define USB_TXINTERVAL14_TXPOLL_S \
  3740. 0
  3741. #define USB_TXINTERVAL14_NAKLMT_S \
  3742. 0
  3743. //*****************************************************************************
  3744. //
  3745. // The following are defines for the bit fields in the USB_O_RXTYPE14 register.
  3746. //
  3747. //*****************************************************************************
  3748. #define USB_RXTYPE14_SPEED_M 0x000000C0 // Operating Speed
  3749. #define USB_RXTYPE14_SPEED_DFLT 0x00000000 // Default
  3750. #define USB_RXTYPE14_SPEED_FULL 0x00000080 // Full
  3751. #define USB_RXTYPE14_SPEED_LOW 0x000000C0 // Low
  3752. #define USB_RXTYPE14_PROTO_M 0x00000030 // Protocol
  3753. #define USB_RXTYPE14_PROTO_CTRL 0x00000000 // Control
  3754. #define USB_RXTYPE14_PROTO_ISOC 0x00000010 // Isochronous
  3755. #define USB_RXTYPE14_PROTO_BULK 0x00000020 // Bulk
  3756. #define USB_RXTYPE14_PROTO_INT 0x00000030 // Interrupt
  3757. #define USB_RXTYPE14_TEP_M 0x0000000F // Target Endpoint Number
  3758. #define USB_RXTYPE14_TEP_S 0
  3759. //*****************************************************************************
  3760. //
  3761. // The following are defines for the bit fields in the USB_O_RXINTERVAL14
  3762. // register.
  3763. //
  3764. //*****************************************************************************
  3765. #define USB_RXINTERVAL14_TXPOLL_M \
  3766. 0x000000FF // RX Polling
  3767. #define USB_RXINTERVAL14_NAKLMT_M \
  3768. 0x000000FF // NAK Limit
  3769. #define USB_RXINTERVAL14_TXPOLL_S \
  3770. 0
  3771. #define USB_RXINTERVAL14_NAKLMT_S \
  3772. 0
  3773. //*****************************************************************************
  3774. //
  3775. // The following are defines for the bit fields in the USB_O_TXMAXP15 register.
  3776. //
  3777. //*****************************************************************************
  3778. #define USB_TXMAXP15_MAXLOAD_M 0x000007FF // Maximum Payload
  3779. #define USB_TXMAXP15_MAXLOAD_S 0
  3780. //*****************************************************************************
  3781. //
  3782. // The following are defines for the bit fields in the USB_O_TXCSRL15 register.
  3783. //
  3784. //*****************************************************************************
  3785. #define USB_TXCSRL15_NAKTO 0x00000080 // NAK Timeout
  3786. #define USB_TXCSRL15_CLRDT 0x00000040 // Clear Data Toggle
  3787. #define USB_TXCSRL15_STALLED 0x00000020 // Endpoint Stalled
  3788. #define USB_TXCSRL15_SETUP 0x00000010 // Setup Packet
  3789. #define USB_TXCSRL15_STALL 0x00000010 // Send STALL
  3790. #define USB_TXCSRL15_FLUSH 0x00000008 // Flush FIFO
  3791. #define USB_TXCSRL15_UNDRN 0x00000004 // Underrun
  3792. #define USB_TXCSRL15_ERROR 0x00000004 // Error
  3793. #define USB_TXCSRL15_FIFONE 0x00000002 // FIFO Not Empty
  3794. #define USB_TXCSRL15_TXRDY 0x00000001 // Transmit Packet Ready
  3795. //*****************************************************************************
  3796. //
  3797. // The following are defines for the bit fields in the USB_O_TXCSRH15 register.
  3798. //
  3799. //*****************************************************************************
  3800. #define USB_TXCSRH15_AUTOSET 0x00000080 // Auto Set
  3801. #define USB_TXCSRH15_ISO 0x00000040 // Isochronous Transfers
  3802. #define USB_TXCSRH15_MODE 0x00000020 // Mode
  3803. #define USB_TXCSRH15_DMAEN 0x00000010 // DMA Request Enable
  3804. #define USB_TXCSRH15_FDT 0x00000008 // Force Data Toggle
  3805. #define USB_TXCSRH15_DMAMOD 0x00000004 // DMA Request Mode
  3806. #define USB_TXCSRH15_DTWE 0x00000002 // Data Toggle Write Enable
  3807. #define USB_TXCSRH15_DT 0x00000001 // Data Toggle
  3808. //*****************************************************************************
  3809. //
  3810. // The following are defines for the bit fields in the USB_O_RXMAXP15 register.
  3811. //
  3812. //*****************************************************************************
  3813. #define USB_RXMAXP15_MAXLOAD_M 0x000007FF // Maximum Payload
  3814. #define USB_RXMAXP15_MAXLOAD_S 0
  3815. //*****************************************************************************
  3816. //
  3817. // The following are defines for the bit fields in the USB_O_RXCSRL15 register.
  3818. //
  3819. //*****************************************************************************
  3820. #define USB_RXCSRL15_CLRDT 0x00000080 // Clear Data Toggle
  3821. #define USB_RXCSRL15_STALLED 0x00000040 // Endpoint Stalled
  3822. #define USB_RXCSRL15_STALL 0x00000020 // Send STALL
  3823. #define USB_RXCSRL15_REQPKT 0x00000020 // Request Packet
  3824. #define USB_RXCSRL15_FLUSH 0x00000010 // Flush FIFO
  3825. #define USB_RXCSRL15_DATAERR 0x00000008 // Data Error
  3826. #define USB_RXCSRL15_NAKTO 0x00000008 // NAK Timeout
  3827. #define USB_RXCSRL15_ERROR 0x00000004 // Error
  3828. #define USB_RXCSRL15_OVER 0x00000004 // Overrun
  3829. #define USB_RXCSRL15_FULL 0x00000002 // FIFO Full
  3830. #define USB_RXCSRL15_RXRDY 0x00000001 // Receive Packet Ready
  3831. //*****************************************************************************
  3832. //
  3833. // The following are defines for the bit fields in the USB_O_RXCSRH15 register.
  3834. //
  3835. //*****************************************************************************
  3836. #define USB_RXCSRH15_AUTOCL 0x00000080 // Auto Clear
  3837. #define USB_RXCSRH15_AUTORQ 0x00000040 // Auto Request
  3838. #define USB_RXCSRH15_ISO 0x00000040 // Isochronous Transfers
  3839. #define USB_RXCSRH15_DMAEN 0x00000020 // DMA Request Enable
  3840. #define USB_RXCSRH15_PIDERR 0x00000010 // PID Error
  3841. #define USB_RXCSRH15_DISNYET 0x00000010 // Disable NYET
  3842. #define USB_RXCSRH15_DMAMOD 0x00000008 // DMA Request Mode
  3843. #define USB_RXCSRH15_DTWE 0x00000004 // Data Toggle Write Enable
  3844. #define USB_RXCSRH15_DT 0x00000002 // Data Toggle
  3845. //*****************************************************************************
  3846. //
  3847. // The following are defines for the bit fields in the USB_O_RXCOUNT15
  3848. // register.
  3849. //
  3850. //*****************************************************************************
  3851. #define USB_RXCOUNT15_COUNT_M 0x00001FFF // Receive Packet Count
  3852. #define USB_RXCOUNT15_COUNT_S 0
  3853. //*****************************************************************************
  3854. //
  3855. // The following are defines for the bit fields in the USB_O_TXTYPE15 register.
  3856. //
  3857. //*****************************************************************************
  3858. #define USB_TXTYPE15_SPEED_M 0x000000C0 // Operating Speed
  3859. #define USB_TXTYPE15_SPEED_DFLT 0x00000000 // Default
  3860. #define USB_TXTYPE15_SPEED_FULL 0x00000080 // Full
  3861. #define USB_TXTYPE15_SPEED_LOW 0x000000C0 // Low
  3862. #define USB_TXTYPE15_PROTO_M 0x00000030 // Protocol
  3863. #define USB_TXTYPE15_PROTO_CTRL 0x00000000 // Control
  3864. #define USB_TXTYPE15_PROTO_ISOC 0x00000010 // Isochronous
  3865. #define USB_TXTYPE15_PROTO_BULK 0x00000020 // Bulk
  3866. #define USB_TXTYPE15_PROTO_INT 0x00000030 // Interrupt
  3867. #define USB_TXTYPE15_TEP_M 0x0000000F // Target Endpoint Number
  3868. #define USB_TXTYPE15_TEP_S 0
  3869. //*****************************************************************************
  3870. //
  3871. // The following are defines for the bit fields in the USB_O_TXINTERVAL15
  3872. // register.
  3873. //
  3874. //*****************************************************************************
  3875. #define USB_TXINTERVAL15_TXPOLL_M \
  3876. 0x000000FF // TX Polling
  3877. #define USB_TXINTERVAL15_NAKLMT_M \
  3878. 0x000000FF // NAK Limit
  3879. #define USB_TXINTERVAL15_NAKLMT_S \
  3880. 0
  3881. #define USB_TXINTERVAL15_TXPOLL_S \
  3882. 0
  3883. //*****************************************************************************
  3884. //
  3885. // The following are defines for the bit fields in the USB_O_RXTYPE15 register.
  3886. //
  3887. //*****************************************************************************
  3888. #define USB_RXTYPE15_SPEED_M 0x000000C0 // Operating Speed
  3889. #define USB_RXTYPE15_SPEED_DFLT 0x00000000 // Default
  3890. #define USB_RXTYPE15_SPEED_FULL 0x00000080 // Full
  3891. #define USB_RXTYPE15_SPEED_LOW 0x000000C0 // Low
  3892. #define USB_RXTYPE15_PROTO_M 0x00000030 // Protocol
  3893. #define USB_RXTYPE15_PROTO_CTRL 0x00000000 // Control
  3894. #define USB_RXTYPE15_PROTO_ISOC 0x00000010 // Isochronous
  3895. #define USB_RXTYPE15_PROTO_BULK 0x00000020 // Bulk
  3896. #define USB_RXTYPE15_PROTO_INT 0x00000030 // Interrupt
  3897. #define USB_RXTYPE15_TEP_M 0x0000000F // Target Endpoint Number
  3898. #define USB_RXTYPE15_TEP_S 0
  3899. //*****************************************************************************
  3900. //
  3901. // The following are defines for the bit fields in the USB_O_RXINTERVAL15
  3902. // register.
  3903. //
  3904. //*****************************************************************************
  3905. #define USB_RXINTERVAL15_TXPOLL_M \
  3906. 0x000000FF // RX Polling
  3907. #define USB_RXINTERVAL15_NAKLMT_M \
  3908. 0x000000FF // NAK Limit
  3909. #define USB_RXINTERVAL15_TXPOLL_S \
  3910. 0
  3911. #define USB_RXINTERVAL15_NAKLMT_S \
  3912. 0
  3913. //*****************************************************************************
  3914. //
  3915. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT1
  3916. // register.
  3917. //
  3918. //*****************************************************************************
  3919. #define USB_RQPKTCOUNT1_M 0x0000FFFF // Block Transfer Packet Count
  3920. #define USB_RQPKTCOUNT1_S 0
  3921. //*****************************************************************************
  3922. //
  3923. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT2
  3924. // register.
  3925. //
  3926. //*****************************************************************************
  3927. #define USB_RQPKTCOUNT2_M 0x0000FFFF // Block Transfer Packet Count
  3928. #define USB_RQPKTCOUNT2_S 0
  3929. //*****************************************************************************
  3930. //
  3931. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT3
  3932. // register.
  3933. //
  3934. //*****************************************************************************
  3935. #define USB_RQPKTCOUNT3_M 0x0000FFFF // Block Transfer Packet Count
  3936. #define USB_RQPKTCOUNT3_S 0
  3937. //*****************************************************************************
  3938. //
  3939. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT4
  3940. // register.
  3941. //
  3942. //*****************************************************************************
  3943. #define USB_RQPKTCOUNT4_COUNT_M 0x0000FFFF // Block Transfer Packet Count
  3944. #define USB_RQPKTCOUNT4_COUNT_S 0
  3945. //*****************************************************************************
  3946. //
  3947. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT5
  3948. // register.
  3949. //
  3950. //*****************************************************************************
  3951. #define USB_RQPKTCOUNT5_COUNT_M 0x0000FFFF // Block Transfer Packet Count
  3952. #define USB_RQPKTCOUNT5_COUNT_S 0
  3953. //*****************************************************************************
  3954. //
  3955. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT6
  3956. // register.
  3957. //
  3958. //*****************************************************************************
  3959. #define USB_RQPKTCOUNT6_COUNT_M 0x0000FFFF // Block Transfer Packet Count
  3960. #define USB_RQPKTCOUNT6_COUNT_S 0
  3961. //*****************************************************************************
  3962. //
  3963. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT7
  3964. // register.
  3965. //
  3966. //*****************************************************************************
  3967. #define USB_RQPKTCOUNT7_COUNT_M 0x0000FFFF // Block Transfer Packet Count
  3968. #define USB_RQPKTCOUNT7_COUNT_S 0
  3969. //*****************************************************************************
  3970. //
  3971. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT8
  3972. // register.
  3973. //
  3974. //*****************************************************************************
  3975. #define USB_RQPKTCOUNT8_COUNT_M 0x0000FFFF // Block Transfer Packet Count
  3976. #define USB_RQPKTCOUNT8_COUNT_S 0
  3977. //*****************************************************************************
  3978. //
  3979. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT9
  3980. // register.
  3981. //
  3982. //*****************************************************************************
  3983. #define USB_RQPKTCOUNT9_COUNT_M 0x0000FFFF // Block Transfer Packet Count
  3984. #define USB_RQPKTCOUNT9_COUNT_S 0
  3985. //*****************************************************************************
  3986. //
  3987. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT10
  3988. // register.
  3989. //
  3990. //*****************************************************************************
  3991. #define USB_RQPKTCOUNT10_COUNT_M \
  3992. 0x0000FFFF // Block Transfer Packet Count
  3993. #define USB_RQPKTCOUNT10_COUNT_S \
  3994. 0
  3995. //*****************************************************************************
  3996. //
  3997. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT11
  3998. // register.
  3999. //
  4000. //*****************************************************************************
  4001. #define USB_RQPKTCOUNT11_COUNT_M \
  4002. 0x0000FFFF // Block Transfer Packet Count
  4003. #define USB_RQPKTCOUNT11_COUNT_S \
  4004. 0
  4005. //*****************************************************************************
  4006. //
  4007. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT12
  4008. // register.
  4009. //
  4010. //*****************************************************************************
  4011. #define USB_RQPKTCOUNT12_COUNT_M \
  4012. 0x0000FFFF // Block Transfer Packet Count
  4013. #define USB_RQPKTCOUNT12_COUNT_S \
  4014. 0
  4015. //*****************************************************************************
  4016. //
  4017. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT13
  4018. // register.
  4019. //
  4020. //*****************************************************************************
  4021. #define USB_RQPKTCOUNT13_COUNT_M \
  4022. 0x0000FFFF // Block Transfer Packet Count
  4023. #define USB_RQPKTCOUNT13_COUNT_S \
  4024. 0
  4025. //*****************************************************************************
  4026. //
  4027. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT14
  4028. // register.
  4029. //
  4030. //*****************************************************************************
  4031. #define USB_RQPKTCOUNT14_COUNT_M \
  4032. 0x0000FFFF // Block Transfer Packet Count
  4033. #define USB_RQPKTCOUNT14_COUNT_S \
  4034. 0
  4035. //*****************************************************************************
  4036. //
  4037. // The following are defines for the bit fields in the USB_O_RQPKTCOUNT15
  4038. // register.
  4039. //
  4040. //*****************************************************************************
  4041. #define USB_RQPKTCOUNT15_COUNT_M \
  4042. 0x0000FFFF // Block Transfer Packet Count
  4043. #define USB_RQPKTCOUNT15_COUNT_S \
  4044. 0
  4045. //*****************************************************************************
  4046. //
  4047. // The following are defines for the bit fields in the USB_O_RXDPKTBUFDIS
  4048. // register.
  4049. //
  4050. //*****************************************************************************
  4051. #define USB_RXDPKTBUFDIS_EP15 0x00008000 // EP15 RX Double-Packet Buffer
  4052. // Disable
  4053. #define USB_RXDPKTBUFDIS_EP14 0x00004000 // EP14 RX Double-Packet Buffer
  4054. // Disable
  4055. #define USB_RXDPKTBUFDIS_EP13 0x00002000 // EP13 RX Double-Packet Buffer
  4056. // Disable
  4057. #define USB_RXDPKTBUFDIS_EP12 0x00001000 // EP12 RX Double-Packet Buffer
  4058. // Disable
  4059. #define USB_RXDPKTBUFDIS_EP11 0x00000800 // EP11 RX Double-Packet Buffer
  4060. // Disable
  4061. #define USB_RXDPKTBUFDIS_EP10 0x00000400 // EP10 RX Double-Packet Buffer
  4062. // Disable
  4063. #define USB_RXDPKTBUFDIS_EP9 0x00000200 // EP9 RX Double-Packet Buffer
  4064. // Disable
  4065. #define USB_RXDPKTBUFDIS_EP8 0x00000100 // EP8 RX Double-Packet Buffer
  4066. // Disable
  4067. #define USB_RXDPKTBUFDIS_EP7 0x00000080 // EP7 RX Double-Packet Buffer
  4068. // Disable
  4069. #define USB_RXDPKTBUFDIS_EP6 0x00000040 // EP6 RX Double-Packet Buffer
  4070. // Disable
  4071. #define USB_RXDPKTBUFDIS_EP5 0x00000020 // EP5 RX Double-Packet Buffer
  4072. // Disable
  4073. #define USB_RXDPKTBUFDIS_EP4 0x00000010 // EP4 RX Double-Packet Buffer
  4074. // Disable
  4075. #define USB_RXDPKTBUFDIS_EP3 0x00000008 // EP3 RX Double-Packet Buffer
  4076. // Disable
  4077. #define USB_RXDPKTBUFDIS_EP2 0x00000004 // EP2 RX Double-Packet Buffer
  4078. // Disable
  4079. #define USB_RXDPKTBUFDIS_EP1 0x00000002 // EP1 RX Double-Packet Buffer
  4080. // Disable
  4081. //*****************************************************************************
  4082. //
  4083. // The following are defines for the bit fields in the USB_O_TXDPKTBUFDIS
  4084. // register.
  4085. //
  4086. //*****************************************************************************
  4087. #define USB_TXDPKTBUFDIS_EP15 0x00008000 // EP15 TX Double-Packet Buffer
  4088. // Disable
  4089. #define USB_TXDPKTBUFDIS_EP14 0x00004000 // EP14 TX Double-Packet Buffer
  4090. // Disable
  4091. #define USB_TXDPKTBUFDIS_EP13 0x00002000 // EP13 TX Double-Packet Buffer
  4092. // Disable
  4093. #define USB_TXDPKTBUFDIS_EP12 0x00001000 // EP12 TX Double-Packet Buffer
  4094. // Disable
  4095. #define USB_TXDPKTBUFDIS_EP11 0x00000800 // EP11 TX Double-Packet Buffer
  4096. // Disable
  4097. #define USB_TXDPKTBUFDIS_EP10 0x00000400 // EP10 TX Double-Packet Buffer
  4098. // Disable
  4099. #define USB_TXDPKTBUFDIS_EP9 0x00000200 // EP9 TX Double-Packet Buffer
  4100. // Disable
  4101. #define USB_TXDPKTBUFDIS_EP8 0x00000100 // EP8 TX Double-Packet Buffer
  4102. // Disable
  4103. #define USB_TXDPKTBUFDIS_EP7 0x00000080 // EP7 TX Double-Packet Buffer
  4104. // Disable
  4105. #define USB_TXDPKTBUFDIS_EP6 0x00000040 // EP6 TX Double-Packet Buffer
  4106. // Disable
  4107. #define USB_TXDPKTBUFDIS_EP5 0x00000020 // EP5 TX Double-Packet Buffer
  4108. // Disable
  4109. #define USB_TXDPKTBUFDIS_EP4 0x00000010 // EP4 TX Double-Packet Buffer
  4110. // Disable
  4111. #define USB_TXDPKTBUFDIS_EP3 0x00000008 // EP3 TX Double-Packet Buffer
  4112. // Disable
  4113. #define USB_TXDPKTBUFDIS_EP2 0x00000004 // EP2 TX Double-Packet Buffer
  4114. // Disable
  4115. #define USB_TXDPKTBUFDIS_EP1 0x00000002 // EP1 TX Double-Packet Buffer
  4116. // Disable
  4117. //*****************************************************************************
  4118. //
  4119. // The following are defines for the bit fields in the USB_O_EPC register.
  4120. //
  4121. //*****************************************************************************
  4122. #define USB_EPC_PFLTACT_M 0x00000300 // Power Fault Action
  4123. #define USB_EPC_PFLTACT_UNCHG 0x00000000 // Unchanged
  4124. #define USB_EPC_PFLTACT_TRIS 0x00000100 // Tristate
  4125. #define USB_EPC_PFLTACT_LOW 0x00000200 // Low
  4126. #define USB_EPC_PFLTACT_HIGH 0x00000300 // High
  4127. #define USB_EPC_PFLTAEN 0x00000040 // Power Fault Action Enable
  4128. #define USB_EPC_PFLTSEN_HIGH 0x00000020 // Power Fault Sense
  4129. #define USB_EPC_PFLTEN 0x00000010 // Power Fault Input Enable
  4130. #define USB_EPC_EPENDE 0x00000004 // EPEN Drive Enable
  4131. #define USB_EPC_EPEN_M 0x00000003 // External Power Supply Enable
  4132. // Configuration
  4133. #define USB_EPC_EPEN_LOW 0x00000000 // Power Enable Active Low
  4134. #define USB_EPC_EPEN_HIGH 0x00000001 // Power Enable Active High
  4135. #define USB_EPC_EPEN_VBLOW 0x00000002 // Power Enable High if VBUS Low
  4136. #define USB_EPC_EPEN_VBHIGH 0x00000003 // Power Enable High if VBUS High
  4137. //*****************************************************************************
  4138. //
  4139. // The following are defines for the bit fields in the USB_O_EPCRIS register.
  4140. //
  4141. //*****************************************************************************
  4142. #define USB_EPCRIS_PF 0x00000001 // USB Power Fault Interrupt Status
  4143. //*****************************************************************************
  4144. //
  4145. // The following are defines for the bit fields in the USB_O_EPCIM register.
  4146. //
  4147. //*****************************************************************************
  4148. #define USB_EPCIM_PF 0x00000001 // USB Power Fault Interrupt Mask
  4149. //*****************************************************************************
  4150. //
  4151. // The following are defines for the bit fields in the USB_O_EPCISC register.
  4152. //
  4153. //*****************************************************************************
  4154. #define USB_EPCISC_PF 0x00000001 // USB Power Fault Interrupt Status
  4155. // and Clear
  4156. //*****************************************************************************
  4157. //
  4158. // The following are defines for the bit fields in the USB_O_DRRIS register.
  4159. //
  4160. //*****************************************************************************
  4161. #define USB_DRRIS_RESUME 0x00000001 // RESUME Interrupt Status
  4162. //*****************************************************************************
  4163. //
  4164. // The following are defines for the bit fields in the USB_O_DRIM register.
  4165. //
  4166. //*****************************************************************************
  4167. #define USB_DRIM_RESUME 0x00000001 // RESUME Interrupt Mask
  4168. //*****************************************************************************
  4169. //
  4170. // The following are defines for the bit fields in the USB_O_DRISC register.
  4171. //
  4172. //*****************************************************************************
  4173. #define USB_DRISC_RESUME 0x00000001 // RESUME Interrupt Status and
  4174. // Clear
  4175. //*****************************************************************************
  4176. //
  4177. // The following are defines for the bit fields in the USB_O_GPCS register.
  4178. //
  4179. //*****************************************************************************
  4180. #define USB_GPCS_DEVMODOTG 0x00000002 // Enable Device Mode
  4181. #define USB_GPCS_DEVMOD 0x00000001 // Device Mode
  4182. //*****************************************************************************
  4183. //
  4184. // The following are defines for the bit fields in the USB_O_VDC register.
  4185. //
  4186. //*****************************************************************************
  4187. #define USB_VDC_VBDEN 0x00000001 // VBUS Droop Enable
  4188. //*****************************************************************************
  4189. //
  4190. // The following are defines for the bit fields in the USB_O_VDCRIS register.
  4191. //
  4192. //*****************************************************************************
  4193. #define USB_VDCRIS_VD 0x00000001 // VBUS Droop Raw Interrupt Status
  4194. //*****************************************************************************
  4195. //
  4196. // The following are defines for the bit fields in the USB_O_VDCIM register.
  4197. //
  4198. //*****************************************************************************
  4199. #define USB_VDCIM_VD 0x00000001 // VBUS Droop Interrupt Mask
  4200. //*****************************************************************************
  4201. //
  4202. // The following are defines for the bit fields in the USB_O_VDCISC register.
  4203. //
  4204. //*****************************************************************************
  4205. #define USB_VDCISC_VD 0x00000001 // VBUS Droop Interrupt Status and
  4206. // Clear
  4207. //*****************************************************************************
  4208. //
  4209. // The following are defines for the bit fields in the USB_O_IDVRIS register.
  4210. //
  4211. //*****************************************************************************
  4212. #define USB_IDVRIS_ID 0x00000001 // ID Valid Detect Raw Interrupt
  4213. // Status
  4214. //*****************************************************************************
  4215. //
  4216. // The following are defines for the bit fields in the USB_O_IDVIM register.
  4217. //
  4218. //*****************************************************************************
  4219. #define USB_IDVIM_ID 0x00000001 // ID Valid Detect Interrupt Mask
  4220. //*****************************************************************************
  4221. //
  4222. // The following are defines for the bit fields in the USB_O_IDVISC register.
  4223. //
  4224. //*****************************************************************************
  4225. #define USB_IDVISC_ID 0x00000001 // ID Valid Detect Interrupt Status
  4226. // and Clear
  4227. //*****************************************************************************
  4228. //
  4229. // The following are defines for the bit fields in the USB_O_DMASEL register.
  4230. //
  4231. //*****************************************************************************
  4232. #define USB_DMASEL_DMACTX_M 0x00F00000 // DMA C TX Select
  4233. #define USB_DMASEL_DMACRX_M 0x000F0000 // DMA C RX Select
  4234. #define USB_DMASEL_DMABTX_M 0x0000F000 // DMA B TX Select
  4235. #define USB_DMASEL_DMABRX_M 0x00000F00 // DMA B RX Select
  4236. #define USB_DMASEL_DMAATX_M 0x000000F0 // DMA A TX Select
  4237. #define USB_DMASEL_DMAARX_M 0x0000000F // DMA A RX Select
  4238. #define USB_DMASEL_DMABTX_S 12
  4239. #define USB_DMASEL_DMABRX_S 8
  4240. #define USB_DMASEL_DMAATX_S 4
  4241. #define USB_DMASEL_DMAARX_S 0
  4242. //*****************************************************************************
  4243. //
  4244. // The following definitions are deprecated.
  4245. //
  4246. //*****************************************************************************
  4247. #ifndef DEPRECATED
  4248. //*****************************************************************************
  4249. //
  4250. // The following are deprecated defines for the bit fields in the
  4251. // USB_O_TXFIFOADD register.
  4252. //
  4253. //*****************************************************************************
  4254. #define USB_TXFIFOADD_ADDR_2048 0x00000009 // 2048
  4255. #define USB_TXFIFOADD_ADDR_1024 0x00000008 // 1024
  4256. #define USB_TXFIFOADD_ADDR_512 0x00000007 // 512
  4257. #define USB_TXFIFOADD_ADDR_256 0x00000006 // 256
  4258. #define USB_TXFIFOADD_ADDR_128 0x00000005 // 128
  4259. #define USB_TXFIFOADD_ADDR_64 0x00000004 // 64
  4260. #define USB_TXFIFOADD_ADDR_32 0x00000003 // 32
  4261. #define USB_TXFIFOADD_ADDR_16 0x00000002 // 16
  4262. #define USB_TXFIFOADD_ADDR_8 0x00000001 // 8
  4263. #define USB_TXFIFOADD_ADDR_0 0x00000000 // 0
  4264. //*****************************************************************************
  4265. //
  4266. // The following are deprecated defines for the bit fields in the
  4267. // USB_O_RXFIFOADD register.
  4268. //
  4269. //*****************************************************************************
  4270. #define USB_RXFIFOADD_ADDR_2048 0x00000009 // 2048
  4271. #define USB_RXFIFOADD_ADDR_1024 0x00000008 // 1024
  4272. #define USB_RXFIFOADD_ADDR_512 0x00000007 // 512
  4273. #define USB_RXFIFOADD_ADDR_256 0x00000006 // 256
  4274. #define USB_RXFIFOADD_ADDR_128 0x00000005 // 128
  4275. #define USB_RXFIFOADD_ADDR_64 0x00000004 // 64
  4276. #define USB_RXFIFOADD_ADDR_32 0x00000003 // 32
  4277. #define USB_RXFIFOADD_ADDR_16 0x00000002 // 16
  4278. #define USB_RXFIFOADD_ADDR_8 0x00000001 // 8
  4279. #define USB_RXFIFOADD_ADDR_0 0x00000000 // 0
  4280. #endif
  4281. #endif // __HW_USB_H__