usb_host_ehci.h 24 KB

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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016 NXP
  4. *
  5. * Redistribution and use in source and binary forms, with or without modification,
  6. * are permitted provided that the following conditions are met:
  7. *
  8. * o Redistributions of source code must retain the above copyright notice, this list
  9. * of conditions and the following disclaimer.
  10. *
  11. * o Redistributions in binary form must reproduce the above copyright notice, this
  12. * list of conditions and the following disclaimer in the documentation and/or
  13. * other materials provided with the distribution.
  14. *
  15. * o Neither the name of the copyright holder nor the names of its
  16. * contributors may be used to endorse or promote products derived from this
  17. * software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #ifndef _USB_HOST_CONTROLLER_EHCI_H_
  31. #define _USB_HOST_CONTROLLER_EHCI_H_
  32. /*******************************************************************************
  33. * KHCI private public structures, enumerations, macros, functions
  34. ******************************************************************************/
  35. /*******************************************************************************
  36. * Definitions
  37. ******************************************************************************/
  38. /* EHCI host macros */
  39. #define EHCI_HOST_T_INVALID_VALUE (1U)
  40. #define EHCI_HOST_POINTER_TYPE_ITD (0x00U)
  41. #define EHCI_HOST_POINTER_TYPE_QH (0x00000002U)
  42. #define EHCI_HOST_POINTER_TYPE_SITD (0x00000004U)
  43. #define EHCI_HOST_POINTER_TYPE_FSTN (0x00000006U)
  44. #define EHCI_HOST_POINTER_TYPE_MASK (0x00000006U)
  45. #define EHCI_HOST_POINTER_ADDRESS_MASK (0xFFFFFFE0U)
  46. #define EHCI_HOST_PID_OUT (0U)
  47. #define EHCI_HOST_PID_IN (1U)
  48. #define EHCI_HOST_PID_SETUP (2U)
  49. #define EHCI_HOST_QH_RL_SHIFT (28U)
  50. #define EHCI_HOST_QH_RL_MASK (0xF0000000U)
  51. #define EHCI_HOST_QH_C_SHIFT (27U)
  52. #define EHCI_HOST_QH_MAX_PACKET_LENGTH_SHIFT (16U)
  53. #define EHCI_HOST_QH_MAX_PACKET_LENGTH_MASK (0x07FF0000U)
  54. #define EHCI_HOST_QH_H_SHIFT (15U)
  55. #define EHCI_HOST_QH_DTC_SHIFT (14U)
  56. #define EHCI_HOST_QH_EPS_SHIFT (12U)
  57. #define EHCI_HOST_QH_ENDPT_SHIFT (8U)
  58. #define EHCI_HOST_QH_I_SHIFT (7U)
  59. #define EHCI_HOST_QH_DEVICE_ADDRESS_SHIFT (0U)
  60. #define EHCI_HOST_QH_MULT_SHIFT (30U)
  61. #define EHCI_HOST_QH_PORT_NUMBER_SHIFT (23U)
  62. #define EHCI_HOST_QH_HUB_ADDR_SHIFT (16U)
  63. #define EHCI_HOST_QH_UFRAME_CMASK_SHIFT (8U)
  64. #define EHCI_HOST_QH_UFRAME_SMASK_SHIFT (0U)
  65. #define EHCI_HOST_QH_STATUS_ERROR_MASK (0x0000007EU)
  66. #define EHCI_HOST_QH_STATUS_NOSTALL_ERROR_MASK (0x0000003EU)
  67. #define EHCI_HOST_QTD_DT_SHIFT (31U)
  68. #define EHCI_HOST_QTD_DT_MASK (0x80000000U)
  69. #define EHCI_HOST_QTD_TOTAL_BYTES_SHIFT (16U)
  70. #define EHCI_HOST_QTD_TOTAL_BYTES_MASK (0x7FFF0000U)
  71. #define EHCI_HOST_QTD_IOC_MASK (0x00008000U)
  72. #define EHCI_HOST_QTD_C_PAGE_SHIFT (12U)
  73. #define EHCI_HOST_QTD_CERR_SHIFT (10U)
  74. #define EHCI_HOST_QTD_CERR_MAX_VALUE (0x00000003U)
  75. #define EHCI_HOST_QTD_PID_CODE_SHIFT (8U)
  76. #define EHCI_HOST_QTD_STATUS_SHIFT (0U)
  77. #define EHCI_HOST_QTD_CURRENT_OFFSET_MASK (0x00000FFFU)
  78. #define EHCI_HOST_QTD_BUFFER_POINTER_SHIFT (12U)
  79. #define EHCI_HOST_QTD_STATUS_ACTIVE_MASK (0x00000080U)
  80. #define EHCI_HOST_QTD_STATUS_MASK (0x000000ffU)
  81. #define EHCI_HOST_QTD_STATUS_ERROR_MASK (0x0000007EU)
  82. #define EHCI_HOST_QTD_STATUS_STALL_ERROR_MASK (0x00000040U)
  83. #define EHCI_HOST_ITD_STATUS_ACTIVE_MASK (0x80000000U)
  84. #define EHCI_HOST_ITD_TRANSACTION_LEN_SHIFT (16U)
  85. #define EHCI_HOST_ITD_TRANSACTION_LEN_MASK (0x0FFF0000U)
  86. #define EHCI_HOST_ITD_IOC_SHIFT (15U)
  87. #define EHCI_HOST_ITD_PG_SHIFT (12U)
  88. #define EHCI_HOST_ITD_TRANSACTION_OFFSET_SHIFT (0U)
  89. #define EHCI_HOST_ITD_TRANSACTION_OFFSET_MASK (0x00000FFFU)
  90. #define EHCI_HOST_ITD_BUFFER_POINTER_SHIFT (12U)
  91. #define EHCI_HOST_ITD_ENDPT_SHIFT (8U)
  92. #define EHCI_HOST_ITD_DEVICE_ADDRESS_SHIFT (0U)
  93. #define EHCI_HOST_ITD_MAX_PACKET_SIZE_SHIFT (0U)
  94. #define EHCI_HOST_ITD_MULT_SHIFT (0U)
  95. #define EHCI_HOST_ITD_DIRECTION_SHIFT (11U)
  96. #define EHCI_HOST_SITD_STATUS_ACTIVE_MASK (0x00000080U)
  97. #define EHCI_HOST_SITD_DIRECTION_SHIFT (31U)
  98. #define EHCI_HOST_SITD_PORT_NUMBER_SHIFT (24U)
  99. #define EHCI_HOST_SITD_HUB_ADDR_SHIFT (16U)
  100. #define EHCI_HOST_SITD_ENDPT_SHIFT (8U)
  101. #define EHCI_HOST_SITD_DEVICE_ADDRESS_SHIFT (0U)
  102. #define EHCI_HOST_SITD_CMASK_SHIFT (8U)
  103. #define EHCI_HOST_SITD_SMASK_SHIFT (0U)
  104. #define EHCI_HOST_SITD_TOTAL_BYTES_SHIFT (16U)
  105. #define EHCI_HOST_SITD_TOTAL_BYTES_MASK (0x03FF0000U)
  106. #define EHCI_HOST_SITD_TP_SHIFT (3U)
  107. #define EHCI_HOST_SITD_TCOUNT_SHIFT (0U)
  108. #define EHCI_HOST_SITD_IOC_SHIFT (31U)
  109. /* register related MACROs */
  110. #define EHCI_PORTSC1_W1_BITS (0x0000002AU)
  111. #define EHCI_MAX_UFRAME_VALUE (0x00003FFFU)
  112. /* task event */
  113. #define EHCI_TASK_EVENT_DEVICE_ATTACH (0x01U)
  114. #define EHCI_TASK_EVENT_TRANSACTION_DONE (0x02U)
  115. #define EHCI_TASK_EVENT_DEVICE_DETACH (0x04U)
  116. #define EHCI_TASK_EVENT_PORT_CHANGE (0x08U)
  117. #define EHCI_TASK_EVENT_TIMER0 (0x10U)
  118. #define EHCI_TASK_EVENT_TIMER1 (0x20U)
  119. #define USB_HostEhciLock() USB_OsaMutexLock(ehciInstance->ehciMutex)
  120. #define USB_HostEhciUnlock() USB_OsaMutexUnlock(ehciInstance->ehciMutex)
  121. /*******************************************************************************
  122. * KHCI driver public structures, enumerations, macros, functions
  123. ******************************************************************************/
  124. /*!
  125. * @addtogroup usb_host_controller_ehci
  126. * @{
  127. */
  128. /*! @brief The maximum supported ISO pipe number */
  129. #define USB_HOST_EHCI_ISO_NUMBER USB_HOST_CONFIG_EHCI_MAX_ITD
  130. /*! @brief Check the port connect state delay if the state is unstable */
  131. #define USB_HOST_EHCI_PORT_CONNECT_DEBOUNCE_DELAY (101U)
  132. /*! @brief Delay for port reset */
  133. #define USB_HOST_EHCI_PORT_RESET_DELAY (11U)
  134. /*! @brief The SITD inserts a frame interval for putting more SITD continuously.
  135. * There is an interval when an application sends two FS/LS ISO transfers.
  136. * When the interval is less than the macro, the two transfers are continuous in the frame list. Otherwise, the two
  137. * transfers
  138. * are not continuous.
  139. * For example:
  140. * - Use case 1: when inserting the SITD first, the inserted frame = the current frame value + this MACRO value.
  141. * - Use case 2: when inserting SITD is not first, choose between the last inserted frame value and the
  142. * current frame value according to the following criteria:
  143. * If the interval is less than the MACRO value, the new SITD is continuous with the last SITD.
  144. * If not, the new SITD inserting frame = the current frame value + this MACRO value.
  145. */
  146. #define USB_HOST_EHCI_ISO_BOUNCE_FRAME_NUMBER (2U)
  147. /*! @brief The ITD inserts a micro-frame interval for putting more ITD continuously.
  148. * There is an interval when an application sends two HS ISO transfers.
  149. * When the interval is less than the macro, the two transfers are continuous in the frame list. Otherwise, the two
  150. * transfers
  151. * are not continuous.
  152. * For example:
  153. * - Use case 1: when inserting ITD first, the inserted micro-frame = the current micro-frame value + this MACRO value.
  154. * - Use case 2: when inserting ITD is not first, choose between the last inserted micro-frame value and the
  155. * current micro-frame value according to the following criteria:
  156. * If the interval is less than this MACRO value, the new ITD is continuous with the last ITD.
  157. * If not, the new ITD inserting micro-frame = the current micro-frame value + this MACRO value.
  158. */
  159. #define USB_HOST_EHCI_ISO_BOUNCE_UFRAME_NUMBER (16U)
  160. /*! @brief Control or bulk transaction timeout value (unit: 100 ms) */
  161. #define USB_HOST_EHCI_CONTROL_BULK_TIME_OUT_VALUE (20U)
  162. #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U))
  163. typedef enum _bus_ehci_suspend_request_state
  164. {
  165. kBus_EhciIdle = 0U,
  166. kBus_EhciStartSuspend,
  167. kBus_EhciSuspended,
  168. kBus_EhciStartResume,
  169. } bus_ehci_suspend_request_state_t;
  170. #endif
  171. /*! @brief EHCI state for device attachment/detachment. */
  172. typedef enum _host_ehci_device_state_
  173. {
  174. kEHCIDevicePhyAttached = 1, /*!< Device is physically attached */
  175. kEHCIDeviceAttached, /*!< Device is attached and initialized */
  176. kEHCIDeviceDetached, /*!< Device is detached and de-initialized */
  177. } host_ehci_device_state_t;
  178. /*! @brief EHCI pipe structure */
  179. typedef struct _usb_host_ehci_pipe
  180. {
  181. usb_host_pipe_t pipeCommon; /*!< Common pipe information */
  182. void *ehciQh; /*!< Control/bulk/interrupt: QH; ISO: usb_host_ehci_iso_t*/
  183. /* bandwidth */
  184. uint16_t uframeInterval; /*!< Micro-frame interval value */
  185. uint16_t startFrame; /*!<
  186. Bandwidth start frame: its value is from 0 to frame_list.
  187. */
  188. uint16_t dataTime; /*!<
  189. Bandwidth time value:
  190. - When the host works as HS: it's the data bandwidth value.
  191. - When the host works as FS/LS:
  192. - For FS/LS device, it's the data bandwidth value when transferring the data by FS/LS.
  193. - For HS device, it's the data bandwidth value when transferring the data by HS.
  194. */
  195. uint16_t startSplitTime; /*!<
  196. Start splitting the bandwidth time value:
  197. - When the host works as HS, it is the start split bandwidth value.
  198. */
  199. uint16_t completeSplitTime; /*!<
  200. Complete splitting the bandwidth time value:
  201. - When host works as HS, it is the complete split bandwidth value.
  202. */
  203. uint8_t startUframe; /*!<
  204. Bandwidth start micro-frame: its value is from 0 to 7.
  205. */
  206. uint8_t uframeSmask; /*!<
  207. Start micro-frame.
  208. - When host works as an HS:
  209. - For FS/LS device, it's the interrupt or ISO transfer start-split mask.
  210. - For HS device, it's the interrupt transfer start micro-frame mask.
  211. - When host works as FS/LS, it's the interrupt and ISO start micro-frame mask
  212. */
  213. uint8_t uframeCmask; /*!<
  214. Complete micro-frame
  215. - When host works as HS:
  216. - For FS/LS device, it's the interrupt or ISO transfer complete-split mask.
  217. */
  218. } usb_host_ehci_pipe_t;
  219. /*! @brief EHCI QH structure. See the USB EHCI specification */
  220. typedef struct _usb_host_ehci_qh
  221. {
  222. uint32_t horizontalLinkPointer; /*!< QH specification filed, queue head a horizontal link pointer */
  223. uint32_t
  224. staticEndpointStates[2]; /*!< QH specification filed, static endpoint state and configuration information */
  225. uint32_t currentQtdPointer; /*!< QH specification filed, current qTD pointer */
  226. uint32_t nextQtdPointer; /*!< QH specification filed, next qTD pointer */
  227. uint32_t alternateNextQtdPointer; /*!< QH specification filed, alternate next qTD pointer */
  228. uint32_t
  229. transferOverlayResults[6]; /*!< QH specification filed, transfer overlay configuration and transfer results */
  230. /* reserved space */
  231. usb_host_ehci_pipe_t *ehciPipePointer; /*!< EHCI pipe pointer */
  232. usb_host_transfer_t *ehciTransferHead; /*!< Transfer list head on this QH */
  233. usb_host_transfer_t *ehciTransferTail; /*!< Transfer list tail on this QH */
  234. uint16_t timeOutValue; /*!< Its maximum value is USB_HOST_EHCI_CONTROL_BULK_TIME_OUT_VALUE. When the value is
  235. zero, the transfer times out. */
  236. uint16_t timeOutLabel; /*!< It's used to judge the transfer timeout. The EHCI driver maintain the value */
  237. } usb_host_ehci_qh_t;
  238. /*! @brief EHCI QTD structure. See the USB EHCI specification. */
  239. typedef struct _usb_host_ehci_qtd
  240. {
  241. uint32_t nextQtdPointer; /*!< QTD specification filed, the next QTD pointer */
  242. uint32_t alternateNextQtdPointer; /*!< QTD specification filed, alternate next QTD pointer */
  243. uint32_t transferResults[2]; /*!< QTD specification filed, transfer results fields */
  244. uint32_t bufferPointers[4]; /*!< QTD specification filed, transfer buffer fields */
  245. } usb_host_ehci_qtd_t;
  246. /*! @brief EHCI ITD structure. See the USB EHCI specification. */
  247. typedef struct _usb_host_ehci_itd
  248. {
  249. uint32_t nextLinkPointer; /*!< ITD specification filed, the next linker pointer */
  250. uint32_t transactions[8]; /*!< ITD specification filed, transactions information */
  251. uint32_t bufferPointers[7]; /*!< ITD specification filed, transfer buffer fields */
  252. /* add space */
  253. struct _usb_host_ehci_itd *nextItdPointer; /*!< Next ITD pointer */
  254. uint32_t frameEntryIndex; /*!< The ITD inserted frame value */
  255. uint32_t reserved[6]; /*!< Reserved fields for 32 bytes align */
  256. } usb_host_ehci_itd_t;
  257. /*! @brief EHCI SITD structure. See the USB EHCI specification. */
  258. typedef struct _usb_host_ehci_sitd
  259. {
  260. uint32_t nextLinkPointer; /*!< SITD specification filed, the next linker pointer */
  261. uint32_t endpointStates[2]; /*!< SITD specification filed, endpoint configuration information */
  262. uint32_t transferResults[3]; /*!< SITD specification filed, transfer result fields */
  263. uint32_t backPointer; /*!< SITD specification filed, back pointer */
  264. /* reserved space */
  265. uint16_t frameEntryIndex; /*!< The SITD inserted frame value */
  266. uint8_t nextSitdIndex; /*!< The next SITD index; Get the next SITD pointer through adding base address with the
  267. index. 0xFF means invalid. */
  268. uint8_t reserved; /*!< Reserved fields for 32 bytes align */
  269. } usb_host_ehci_sitd_t;
  270. /*! @brief EHCI ISO structure; An ISO pipe has an instance of this structure to keep the ISO pipe-specific information.
  271. */
  272. typedef struct _usb_host_ehci_iso
  273. {
  274. struct _usb_host_ehci_iso *next; /*!< Next instance pointer */
  275. usb_host_pipe_t *ehciPipePointer; /*!< This ISO's EHCI pipe pointer */
  276. usb_host_transfer_t *ehciTransferHead; /*!< Transfer list head on this ISO pipe */
  277. usb_host_transfer_t *ehciTransferTail; /*!< Transfer list head on this ISO pipe */
  278. uint16_t lastLinkFrame; /*!< It means that the inserted frame for ISO ITD/SITD. 0xFFFF is invalid. For ITD, it is a
  279. micro-frame value. For SITD, it is a frame value */
  280. } usb_host_ehci_iso_t;
  281. /*! @brief EHCI instance structure */
  282. typedef struct _usb_host_ehci_instance
  283. {
  284. usb_host_handle hostHandle; /*!< Related host handle*/
  285. uint32_t *ehciUnitBase; /*!< Keep the QH/QTD/ITD/SITD buffer pointer for release*/
  286. uint8_t *ehciFrameList; /*!< The frame list of the current ehci instance*/
  287. usb_host_ehci_qh_t *ehciQhList; /*!< Idle QH list pointer */
  288. usb_host_ehci_qtd_t *ehciQtdHead; /*!< Idle QTD list pointer head */
  289. usb_host_ehci_qtd_t *ehciQtdTail; /*!< Idle QTD list pointer tail (recently used qTD will be used)*/
  290. usb_host_ehci_itd_t *ehciItdList; /*!< Idle ITD list pointer*/
  291. usb_host_ehci_sitd_t *ehciSitdIndexBase; /*!< SITD buffer's start pointer*/
  292. usb_host_ehci_sitd_t *ehciSitdList; /*!< Idle SITD list pointer*/
  293. usb_host_ehci_iso_t *ehciIsoList; /*!< Idle ISO list pointer*/
  294. USBHS_Type *ehciIpBase; /*!< EHCI IP base address*/
  295. usb_host_ehci_qh_t *shedFirstQh; /*!< First async QH*/
  296. usb_host_ehci_pipe_t *ehciPipeIndexBase; /*!< Pipe buffer's start pointer*/
  297. usb_host_ehci_pipe_t *ehciPipeList; /*!< Idle pipe list pointer*/
  298. usb_host_ehci_pipe_t *ehciRunningPipeList; /*!< Running pipe list pointer*/
  299. usb_osa_mutex_handle ehciMutex; /*!< EHCI mutex*/
  300. usb_osa_event_handle taskEventHandle; /*!< EHCI task event*/
  301. #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U))
  302. uint64_t matchTick;
  303. USBPHY_Type *registerPhyBase; /*!< The base address of the PHY register */
  304. #if (defined(FSL_FEATURE_SOC_USBNC_COUNT) && (FSL_FEATURE_SOC_USBNC_COUNT > 0U))
  305. USBNC_Type *registerNcBase; /*!< The base address of the USBNC register */
  306. #endif
  307. #endif
  308. uint8_t controllerId; /*!< EHCI controller ID*/
  309. uint8_t deviceAttached; /*!< Device attach/detach state, see #host_ehci_device_state_t */
  310. uint8_t firstDeviceSpeed; /*!< The first device's speed, the controller's work speed*/
  311. uint8_t ehciItdNumber; /*!< Idle ITD number*/
  312. uint8_t ehciSitdNumber; /*!< Idle SITD number*/
  313. uint8_t ehciQtdNumber; /*!< Idle QTD number*/
  314. #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U))
  315. bus_ehci_suspend_request_state_t busSuspendStatus; /*!< Bus Suspend Status*/
  316. #endif
  317. } usb_host_ehci_instance_t;
  318. /*! @brief EHCI data structure */
  319. typedef struct _usb_host_ehci_data
  320. {
  321. #if ((defined(USB_HOST_CONFIG_EHCI_MAX_QH)) && (USB_HOST_CONFIG_EHCI_MAX_QH > 0U))
  322. usb_host_ehci_qh_t ehciQh[USB_HOST_CONFIG_EHCI_MAX_QH]; /*!< Idle QH list array*/
  323. #endif
  324. #if ((defined(USB_HOST_CONFIG_EHCI_MAX_QTD)) && (USB_HOST_CONFIG_EHCI_MAX_QTD > 0U))
  325. usb_host_ehci_qtd_t ehciQtd[USB_HOST_CONFIG_EHCI_MAX_QTD]; /*!< Idle QTD list array*/
  326. #endif
  327. #if ((defined(USB_HOST_CONFIG_EHCI_MAX_ITD)) && (USB_HOST_CONFIG_EHCI_MAX_ITD > 0U))
  328. usb_host_ehci_itd_t ehciItd[USB_HOST_CONFIG_EHCI_MAX_ITD]; /*!< Idle ITD list array*/
  329. #endif
  330. #if ((defined(USB_HOST_CONFIG_EHCI_MAX_SITD)) && (USB_HOST_CONFIG_EHCI_MAX_SITD > 0U))
  331. usb_host_ehci_sitd_t ehciSitd[USB_HOST_CONFIG_EHCI_MAX_SITD]; /*!< Idle SITD list array*/
  332. #endif
  333. #if ((defined(USB_HOST_EHCI_ISO_NUMBER)) && (USB_HOST_EHCI_ISO_NUMBER > 0U))
  334. usb_host_ehci_iso_t ehciIso[USB_HOST_EHCI_ISO_NUMBER]; /*!< Idle ISO list array*/
  335. #endif
  336. #if ((defined(USB_HOST_CONFIG_MAX_PIPES)) && (USB_HOST_CONFIG_MAX_PIPES > 0U))
  337. usb_host_ehci_pipe_t ehciPipe[USB_HOST_CONFIG_MAX_PIPES]; /*!< Idle pipe list array*/
  338. #endif
  339. } usb_host_ehci_data_t;
  340. /*******************************************************************************
  341. * API
  342. ******************************************************************************/
  343. #ifdef __cplusplus
  344. extern "C" {
  345. #endif
  346. /*!
  347. * @name USB host EHCI APIs
  348. * @{
  349. */
  350. /*!
  351. * @brief Creates the USB host EHCI instance.
  352. *
  353. * This function initializes the USB host EHCI controller driver.
  354. *
  355. * @param[in] controllerId The controller ID of the USB IP. Please refer to the enumeration usb_controller_index_t.
  356. * @param[in] upperLayerHandle The host level handle.
  357. * @param[out] controllerHandle return the controller instance handle.
  358. *
  359. * @retval kStatus_USB_Success The host is initialized successfully.
  360. * @retval kStatus_USB_AllocFail Allocating memory failed.
  361. * @retval kStatus_USB_Error Host mutex create fail, KHCI/EHCI mutex or KHCI/EHCI event create fail.
  362. * Or, KHCI/EHCI IP initialize fail.
  363. */
  364. extern usb_status_t USB_HostEhciCreate(uint8_t controllerId,
  365. usb_host_handle upperLayerHandle,
  366. usb_host_controller_handle *controllerHandle);
  367. /*!
  368. * @brief Destroys the USB host EHCI instance.
  369. *
  370. * This function de-initializes The USB host EHCI controller driver.
  371. *
  372. * @param[in] controllerHandle The controller handle.
  373. *
  374. * @retval kStatus_USB_Success The host is initialized successfully.
  375. */
  376. extern usb_status_t USB_HostEhciDestory(usb_host_controller_handle controllerHandle);
  377. /*!
  378. * @brief Opens the USB host pipe.
  379. *
  380. * This function opens a pipe according to the pipe_init_ptr parameter.
  381. *
  382. * @param[in] controllerHandle The controller handle.
  383. * @param[out] pipeHandle The pipe handle pointer, it is used to return the pipe handle.
  384. * @param[in] pipeInit It is used to initialize the pipe.
  385. *
  386. * @retval kStatus_USB_Success The host is initialized successfully.
  387. * @retval kStatus_USB_Error There is no idle pipe.
  388. * Or, there is no idle QH for EHCI.
  389. * Or, bandwidth allocate fail for EHCI.
  390. */
  391. extern usb_status_t USB_HostEhciOpenPipe(usb_host_controller_handle controllerHandle,
  392. usb_host_pipe_handle *pipeHandle,
  393. usb_host_pipe_init_t *pipeInit);
  394. /*!
  395. * @brief Closes the USB host pipe.
  396. *
  397. * This function closes a pipe and releases related resources.
  398. *
  399. * @param[in] controllerHandle The controller handle.
  400. * @param[in] pipeHandle The closing pipe handle.
  401. *
  402. * @retval kStatus_USB_Success The host is initialized successfully.
  403. */
  404. extern usb_status_t USB_HostEhciClosePipe(usb_host_controller_handle controllerHandle, usb_host_pipe_handle pipeHandle);
  405. /*!
  406. * @brief Sends data to the pipe.
  407. *
  408. * This function requests to send the transfer to the specified pipe.
  409. *
  410. * @param[in] controllerHandle The controller handle.
  411. * @param[in] pipeHandle The sending pipe handle.
  412. * @param[in] transfer The transfer information.
  413. *
  414. * @retval kStatus_USB_Success Sent successfully.
  415. * @retval kStatus_USB_LackSwapBuffer There is no swap buffer for KHCI.
  416. * @retval kStatus_USB_Error There is no idle QTD/ITD/SITD for EHCI.
  417. */
  418. extern usb_status_t USB_HostEhciWritePipe(usb_host_controller_handle controllerHandle,
  419. usb_host_pipe_handle pipeHandle,
  420. usb_host_transfer_t *transfer);
  421. /*!
  422. * @brief Receives data from the pipe.
  423. *
  424. * This function requests to receive the transfer from the specified pipe.
  425. *
  426. * @param[in] controllerHandle The controller handle.
  427. * @param[in] pipeHandle The receiving pipe handle.
  428. * @param[in] transfer The transfer information.
  429. * @retval kStatus_USB_Success Send successfully.
  430. * @retval kStatus_USB_LackSwapBuffer There is no swap buffer for KHCI.
  431. * @retval kStatus_USB_Error There is no idle QTD/ITD/SITD for EHCI.
  432. */
  433. extern usb_status_t USB_HostEhciReadpipe(usb_host_controller_handle controllerHandle,
  434. usb_host_pipe_handle pipeHandle,
  435. usb_host_transfer_t *transfer);
  436. /*!
  437. * @brief Controls the EHCI.
  438. *
  439. * This function controls the EHCI.
  440. *
  441. * @param[in] controllerHandle The controller handle.
  442. * @param[in] ioctlEvent See enumeration host_bus_control_t.
  443. * @param[in] ioctlParam The control parameter.
  444. *
  445. * @retval kStatus_USB_Success Cancel successfully.
  446. * @retval kStatus_USB_InvalidHandle The controllerHandle is a NULL pointer.
  447. */
  448. extern usb_status_t USB_HostEhciIoctl(usb_host_controller_handle controllerHandle,
  449. uint32_t ioctlEvent,
  450. void *ioctlParam);
  451. /*! @}*/
  452. #ifdef __cplusplus
  453. }
  454. #endif
  455. /*! @}*/
  456. #endif /* _USB_HOST_CONTROLLER_EHCI_H_ */