drv_rtc.c 5.0 KB

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  1. /*
  2. * Copyright (c) 2020-2021, Bluetrum Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-01-28 greedyhao first version
  9. * 2021-03-19 iysheng modify just set time first power up
  10. */
  11. #include "board.h"
  12. #include <time.h>
  13. #include <sys/time.h>
  14. #ifdef BSP_USING_ONCHIP_RTC
  15. //#define DRV_DEBUG
  16. #define LOG_TAG "drv.rtc"
  17. #include <drv_log.h>
  18. static struct rt_device rtc;
  19. /************** HAL Start *******************/
  20. #define IRTC_ENTER_CRITICAL() uint32_t cpu_ie = PICCON & BIT(0); PICCONCLR = BIT(0);
  21. #define IRTC_EXIT_CRITICAL() PICCON |= cpu_ie
  22. uint8_t get_weekday(struct tm *const _tm)
  23. {
  24. uint8_t weekday;
  25. time_t secs = timegm(_tm);
  26. weekday = (secs / 86400 + 4) % 7;
  27. return weekday;
  28. }
  29. void irtc_write(uint32_t cmd)
  30. {
  31. RTCDAT = cmd;
  32. while (RTCCON & RTC_CON_TRANS_DONE);
  33. }
  34. uint8_t irtc_read(void)
  35. {
  36. RTCDAT = 0x00;
  37. while (RTCCON & RTC_CON_TRANS_DONE);
  38. return (uint8_t)RTCDAT;
  39. }
  40. void irtc_time_write(uint32_t cmd, uint32_t dat)
  41. {
  42. IRTC_ENTER_CRITICAL();
  43. RTCCON |= RTC_CON_CHIP_SELECT;
  44. irtc_write(cmd | RTC_WR);
  45. irtc_write((uint8_t)(dat >> 24));
  46. irtc_write((uint8_t)(dat >> 16));
  47. irtc_write((uint8_t)(dat >> 8));
  48. irtc_write((uint8_t)(dat >> 0));
  49. RTCCON &= ~RTC_CON_CHIP_SELECT;
  50. IRTC_EXIT_CRITICAL();
  51. }
  52. uint32_t irtc_time_read(uint32_t cmd)
  53. {
  54. uint32_t rd_val;
  55. IRTC_ENTER_CRITICAL();
  56. RTCCON |= RTC_CON_CHIP_SELECT;
  57. irtc_write(cmd | RTC_RD);
  58. *((uint8_t *)&rd_val + 3) = irtc_read();
  59. *((uint8_t *)&rd_val + 2) = irtc_read();
  60. *((uint8_t *)&rd_val + 1) = irtc_read();
  61. *((uint8_t *)&rd_val + 0) = irtc_read();
  62. RTCCON &= ~RTC_CON_CHIP_SELECT;
  63. IRTC_EXIT_CRITICAL();
  64. return rd_val;
  65. }
  66. void irtc_sfr_write(uint32_t cmd, uint8_t dat)
  67. {
  68. IRTC_ENTER_CRITICAL();
  69. RTCCON |= RTC_CON_CHIP_SELECT;
  70. irtc_write(cmd | RTC_WR);
  71. irtc_write(dat);
  72. RTCCON &= ~RTC_CON_CHIP_SELECT;
  73. IRTC_EXIT_CRITICAL();
  74. }
  75. uint8_t irtc_sfr_read(uint32_t cmd)
  76. {
  77. uint8_t rd_val;
  78. IRTC_ENTER_CRITICAL();
  79. RTCCON |= RTC_CON_CHIP_SELECT;
  80. irtc_write(cmd | RTC_RD);
  81. rd_val = irtc_read();
  82. RTCCON &= ~RTC_CON_CHIP_SELECT;
  83. IRTC_EXIT_CRITICAL();
  84. }
  85. void hal_rtc_init(void)
  86. {
  87. time_t sec = 0;
  88. struct tm tm_new = {0};
  89. uint8_t temp = irtc_sfr_read(RTCCON0_CMD);
  90. temp &= ~RTC_CON0_XOSC32K_ENABLE;
  91. temp |= RTC_CON0_EXTERNAL_32K;
  92. irtc_sfr_write(RTCCON0_CMD, temp);
  93. temp = irtc_sfr_read(RTCCON2_CMD);
  94. irtc_sfr_write(RTCCON2_CMD, temp | RTC_CON2_32K_SELECT);
  95. temp = irtc_sfr_read(RTCCON0_CMD);
  96. if (temp & RTC_CON0_PWRUP_FIRST) {
  97. temp &= ~RTC_CON0_PWRUP_FIRST;
  98. irtc_sfr_write(RTCCON0_CMD, temp); /* First power on */
  99. tm_new.tm_mday = 29;
  100. tm_new.tm_mon = 1 - 1;
  101. tm_new.tm_year = 2021 - 1900;
  102. sec = timegm(&tm_new);
  103. irtc_time_write(RTCCNT_CMD, sec);
  104. }
  105. }
  106. /************** HAL End *******************/
  107. static time_t get_rtc_timestamp(void)
  108. {
  109. time_t sec = 0;
  110. sec = irtc_time_read(RTCCNT_CMD);
  111. LOG_D("get rtc time.");
  112. return sec;
  113. }
  114. static rt_err_t set_rtc_time_stamp(time_t time_stamp)
  115. {
  116. irtc_time_write(RTCCNT_CMD, time_stamp);
  117. return RT_EOK;
  118. }
  119. static void rt_rtc_init(void)
  120. {
  121. hal_rtc_init();
  122. }
  123. static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
  124. {
  125. rt_err_t result = RT_EOK;
  126. RT_ASSERT(dev != RT_NULL);
  127. switch (cmd)
  128. {
  129. case RT_DEVICE_CTRL_RTC_GET_TIME:
  130. *(rt_uint32_t *)args = get_rtc_timestamp();
  131. LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
  132. break;
  133. case RT_DEVICE_CTRL_RTC_SET_TIME:
  134. if (set_rtc_time_stamp(*(rt_uint32_t *)args))
  135. {
  136. result = -RT_ERROR;
  137. }
  138. LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
  139. break;
  140. }
  141. return result;
  142. }
  143. #ifdef RT_USING_DEVICE_OPS
  144. const static struct rt_device_ops rtc_ops =
  145. {
  146. RT_NULL,
  147. RT_NULL,
  148. RT_NULL,
  149. RT_NULL,
  150. RT_NULL,
  151. rt_rtc_control
  152. };
  153. #endif
  154. static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint32_t flag)
  155. {
  156. RT_ASSERT(device != RT_NULL);
  157. rt_rtc_init();
  158. #ifdef RT_USING_DEVICE_OPS
  159. device->ops = &rtc_ops;
  160. #else
  161. device->init = RT_NULL;
  162. device->open = RT_NULL;
  163. device->close = RT_NULL;
  164. device->read = RT_NULL;
  165. device->write = RT_NULL;
  166. device->control = rt_rtc_control;
  167. #endif
  168. device->type = RT_Device_Class_RTC;
  169. device->rx_indicate = RT_NULL;
  170. device->tx_complete = RT_NULL;
  171. device->user_data = RT_NULL;
  172. /* register a character device */
  173. return rt_device_register(device, name, flag);
  174. }
  175. int rt_hw_rtc_init(void)
  176. {
  177. rt_err_t result;
  178. result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
  179. if (result != RT_EOK)
  180. {
  181. LOG_E("rtc register err code: %d", result);
  182. return result;
  183. }
  184. LOG_D("rtc init success");
  185. return RT_EOK;
  186. }
  187. INIT_DEVICE_EXPORT(rt_hw_rtc_init);
  188. #endif /* BSP_USING_ONCHIP_RTC */