drv_hwtimer.c 12 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 zylx first version
  9. */
  10. #include <board.h>
  11. #ifdef BSP_USING_TIM
  12. #include "drv_config.h"
  13. //#define DRV_DEBUG
  14. #define LOG_TAG "drv.hwtimer"
  15. #include <drv_log.h>
  16. #ifdef RT_USING_HWTIMER
  17. enum
  18. {
  19. #ifdef BSP_USING_TIM1
  20. TIM1_INDEX,
  21. #endif
  22. #ifdef BSP_USING_TIM2
  23. TIM2_INDEX,
  24. #endif
  25. #ifdef BSP_USING_TIM3
  26. TIM3_INDEX,
  27. #endif
  28. #ifdef BSP_USING_TIM4
  29. TIM4_INDEX,
  30. #endif
  31. #ifdef BSP_USING_TIM5
  32. TIM5_INDEX,
  33. #endif
  34. #ifdef BSP_USING_TIM6
  35. TIM6_INDEX,
  36. #endif
  37. #ifdef BSP_USING_TIM7
  38. TIM7_INDEX,
  39. #endif
  40. #ifdef BSP_USING_TIM8
  41. TIM8_INDEX,
  42. #endif
  43. #ifdef BSP_USING_TIM9
  44. TIM9_INDEX,
  45. #endif
  46. #ifdef BSP_USING_TIM10
  47. TIM10_INDEX,
  48. #endif
  49. #ifdef BSP_USING_TIM11
  50. TIM11_INDEX,
  51. #endif
  52. #ifdef BSP_USING_TIM12
  53. TIM12_INDEX,
  54. #endif
  55. #ifdef BSP_USING_TIM13
  56. TIM13_INDEX,
  57. #endif
  58. #ifdef BSP_USING_TIM14
  59. TIM14_INDEX,
  60. #endif
  61. #ifdef BSP_USING_TIM15
  62. TIM15_INDEX,
  63. #endif
  64. #ifdef BSP_USING_TIM16
  65. TIM16_INDEX,
  66. #endif
  67. #ifdef BSP_USING_TIM17
  68. TIM17_INDEX,
  69. #endif
  70. };
  71. struct stm32_hwtimer
  72. {
  73. rt_hwtimer_t time_device;
  74. TIM_HandleTypeDef tim_handle;
  75. IRQn_Type tim_irqn;
  76. char *name;
  77. };
  78. static struct stm32_hwtimer stm32_hwtimer_obj[] =
  79. {
  80. #ifdef BSP_USING_TIM1
  81. TIM1_CONFIG,
  82. #endif
  83. #ifdef BSP_USING_TIM2
  84. TIM2_CONFIG,
  85. #endif
  86. #ifdef BSP_USING_TIM3
  87. TIM3_CONFIG,
  88. #endif
  89. #ifdef BSP_USING_TIM4
  90. TIM4_CONFIG,
  91. #endif
  92. #ifdef BSP_USING_TIM5
  93. TIM5_CONFIG,
  94. #endif
  95. #ifdef BSP_USING_TIM6
  96. TIM6_CONFIG,
  97. #endif
  98. #ifdef BSP_USING_TIM7
  99. TIM7_CONFIG,
  100. #endif
  101. #ifdef BSP_USING_TIM8
  102. TIM8_CONFIG,
  103. #endif
  104. #ifdef BSP_USING_TIM9
  105. TIM9_CONFIG,
  106. #endif
  107. #ifdef BSP_USING_TIM10
  108. TIM10_CONFIG,
  109. #endif
  110. #ifdef BSP_USING_TIM11
  111. TIM11_CONFIG,
  112. #endif
  113. #ifdef BSP_USING_TIM12
  114. TIM12_CONFIG,
  115. #endif
  116. #ifdef BSP_USING_TIM13
  117. TIM13_CONFIG,
  118. #endif
  119. #ifdef BSP_USING_TIM14
  120. TIM14_CONFIG,
  121. #endif
  122. #ifdef BSP_USING_TIM15
  123. TIM15_CONFIG,
  124. #endif
  125. #ifdef BSP_USING_TIM16
  126. TIM16_CONFIG,
  127. #endif
  128. #ifdef BSP_USING_TIM17
  129. TIM17_CONFIG,
  130. #endif
  131. };
  132. static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
  133. {
  134. uint32_t prescaler_value = 0;
  135. TIM_HandleTypeDef *tim = RT_NULL;
  136. struct stm32_hwtimer *tim_device = RT_NULL;
  137. RT_ASSERT(timer != RT_NULL);
  138. if (state)
  139. {
  140. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  141. tim_device = (struct stm32_hwtimer *)timer;
  142. /* time init */
  143. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  144. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  145. #elif defined(SOC_SERIES_STM32L4)
  146. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  147. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0)
  148. if (0)
  149. #endif
  150. {
  151. #ifndef SOC_SERIES_STM32F0
  152. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * 2 / 10000) - 1;
  153. #endif
  154. }
  155. else
  156. {
  157. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * 2 / 10000) - 1;
  158. }
  159. tim->Init.Period = 10000 - 1;
  160. tim->Init.Prescaler = prescaler_value;
  161. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  162. if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
  163. {
  164. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  165. }
  166. else
  167. {
  168. tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
  169. }
  170. tim->Init.RepetitionCounter = 0;
  171. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0)
  172. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  173. #endif
  174. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  175. {
  176. LOG_E("%s init failed", tim_device->name);
  177. return;
  178. }
  179. else
  180. {
  181. /* set the TIMx priority */
  182. HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
  183. /* enable the TIMx global Interrupt */
  184. HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
  185. /* clear update flag */
  186. __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
  187. /* enable update request source */
  188. __HAL_TIM_URS_ENABLE(tim);
  189. LOG_D("%s init success", tim_device->name);
  190. }
  191. }
  192. }
  193. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  194. {
  195. rt_err_t result = RT_EOK;
  196. TIM_HandleTypeDef *tim = RT_NULL;
  197. RT_ASSERT(timer != RT_NULL);
  198. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  199. /* set tim cnt */
  200. __HAL_TIM_SET_AUTORELOAD(tim, t);
  201. if (opmode == HWTIMER_MODE_ONESHOT)
  202. {
  203. /* set timer to single mode */
  204. tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
  205. }
  206. /* start timer */
  207. if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
  208. {
  209. LOG_E("TIM2 start failed");
  210. result = -RT_ERROR;
  211. }
  212. return result;
  213. }
  214. static void timer_stop(rt_hwtimer_t *timer)
  215. {
  216. TIM_HandleTypeDef *tim = RT_NULL;
  217. RT_ASSERT(timer != RT_NULL);
  218. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  219. /* stop timer */
  220. HAL_TIM_Base_Stop_IT(tim);
  221. }
  222. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  223. {
  224. TIM_HandleTypeDef *tim = RT_NULL;
  225. rt_err_t result = RT_EOK;
  226. RT_ASSERT(timer != RT_NULL);
  227. RT_ASSERT(arg != RT_NULL);
  228. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  229. switch (cmd)
  230. {
  231. case HWTIMER_CTRL_FREQ_SET:
  232. {
  233. rt_uint32_t freq;
  234. rt_uint16_t val;
  235. /* set timer frequence */
  236. freq = *((rt_uint32_t *)arg);
  237. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  238. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  239. #elif defined(SOC_SERIES_STM32L4)
  240. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  241. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0)
  242. if (0)
  243. #endif
  244. {
  245. #if defined(SOC_SERIES_STM32L4)
  246. val = HAL_RCC_GetPCLK2Freq() / freq;
  247. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  248. val = HAL_RCC_GetPCLK2Freq() * 2 / freq;
  249. #endif
  250. }
  251. else
  252. {
  253. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  254. val = HAL_RCC_GetPCLK1Freq() * 2 / freq;
  255. #elif defined(SOC_SERIES_STM32F0)
  256. val = HAL_RCC_GetPCLK1Freq() / freq;
  257. #endif
  258. }
  259. __HAL_TIM_SET_PRESCALER(tim, val - 1);
  260. /* Update frequency value */
  261. tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
  262. }
  263. break;
  264. default:
  265. {
  266. result = -RT_ENOSYS;
  267. }
  268. break;
  269. }
  270. return result;
  271. }
  272. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  273. {
  274. TIM_HandleTypeDef *tim = RT_NULL;
  275. RT_ASSERT(timer != RT_NULL);
  276. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  277. return tim->Instance->CNT;
  278. }
  279. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  280. static const struct rt_hwtimer_ops _ops =
  281. {
  282. .init = timer_init,
  283. .start = timer_start,
  284. .stop = timer_stop,
  285. .count_get = timer_counter_get,
  286. .control = timer_ctrl,
  287. };
  288. #ifdef BSP_USING_TIM2
  289. void TIM2_IRQHandler(void)
  290. {
  291. /* enter interrupt */
  292. rt_interrupt_enter();
  293. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
  294. /* leave interrupt */
  295. rt_interrupt_leave();
  296. }
  297. #endif
  298. #ifdef BSP_USING_TIM3
  299. void TIM3_IRQHandler(void)
  300. {
  301. /* enter interrupt */
  302. rt_interrupt_enter();
  303. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
  304. /* leave interrupt */
  305. rt_interrupt_leave();
  306. }
  307. #endif
  308. #ifdef BSP_USING_TIM4
  309. void TIM4_IRQHandler(void)
  310. {
  311. /* enter interrupt */
  312. rt_interrupt_enter();
  313. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
  314. /* leave interrupt */
  315. rt_interrupt_leave();
  316. }
  317. #endif
  318. #ifdef BSP_USING_TIM5
  319. void TIM5_IRQHandler(void)
  320. {
  321. /* enter interrupt */
  322. rt_interrupt_enter();
  323. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
  324. /* leave interrupt */
  325. rt_interrupt_leave();
  326. }
  327. #endif
  328. #ifdef BSP_USING_TIM11
  329. void TIM1_TRG_COM_TIM11_IRQHandler(void)
  330. {
  331. /* enter interrupt */
  332. rt_interrupt_enter();
  333. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
  334. /* leave interrupt */
  335. rt_interrupt_leave();
  336. }
  337. #endif
  338. #ifdef BSP_USING_TIM13
  339. void TIM8_UP_TIM13_IRQHandler(void)
  340. {
  341. /* enter interrupt */
  342. rt_interrupt_enter();
  343. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
  344. /* leave interrupt */
  345. rt_interrupt_leave();
  346. }
  347. #endif
  348. #ifdef BSP_USING_TIM14
  349. #if defined(SOC_SERIES_STM32F4)
  350. void TIM8_TRG_COM_TIM14_IRQHandler(void)
  351. #elif defined(SOC_SERIES_STM32F0)
  352. void TIM14_IRQHandler(void)
  353. #endif
  354. {
  355. /* enter interrupt */
  356. rt_interrupt_enter();
  357. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
  358. /* leave interrupt */
  359. rt_interrupt_leave();
  360. }
  361. #endif
  362. #ifdef BSP_USING_TIM15
  363. void TIM1_BRK_TIM15_IRQHandler(void)
  364. {
  365. /* enter interrupt */
  366. rt_interrupt_enter();
  367. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
  368. /* leave interrupt */
  369. rt_interrupt_leave();
  370. }
  371. #endif
  372. #ifdef BSP_USING_TIM16
  373. #if defined(SOC_SERIES_STM32L4)
  374. void TIM1_UP_TIM16_IRQHandler(void)
  375. #elif defined(SOC_SERIES_STM32F0)
  376. void TIM16_IRQHandler(void)
  377. #endif
  378. {
  379. /* enter interrupt */
  380. rt_interrupt_enter();
  381. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
  382. /* leave interrupt */
  383. rt_interrupt_leave();
  384. }
  385. #endif
  386. #ifdef BSP_USING_TIM17
  387. #if defined(SOC_SERIES_STM32L4)
  388. void TIM1_TRG_COM_TIM17_IRQHandler(void)
  389. #elif defined(SOC_SERIES_STM32F0)
  390. void TIM17_IRQHandler(void)
  391. #endif
  392. {
  393. /* enter interrupt */
  394. rt_interrupt_enter();
  395. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
  396. /* leave interrupt */
  397. rt_interrupt_leave();
  398. }
  399. #endif
  400. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  401. {
  402. #ifdef BSP_USING_TIM2
  403. if (htim->Instance == TIM2)
  404. {
  405. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
  406. }
  407. #endif
  408. #ifdef BSP_USING_TIM3
  409. if (htim->Instance == TIM3)
  410. {
  411. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
  412. }
  413. #endif
  414. #ifdef BSP_USING_TIM4
  415. if (htim->Instance == TIM4)
  416. {
  417. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
  418. }
  419. #endif
  420. #ifdef BSP_USING_TIM5
  421. if (htim->Instance == TIM5)
  422. {
  423. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
  424. }
  425. #endif
  426. #ifdef BSP_USING_TIM11
  427. if (htim->Instance == TIM11)
  428. {
  429. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
  430. }
  431. #endif
  432. #ifdef BSP_USING_TIM13
  433. if (htim->Instance == TIM13)
  434. {
  435. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
  436. }
  437. #endif
  438. #ifdef BSP_USING_TIM14
  439. if (htim->Instance == TIM14)
  440. {
  441. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
  442. }
  443. #endif
  444. #ifdef BSP_USING_TIM15
  445. if (htim->Instance == TIM15)
  446. {
  447. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
  448. }
  449. #endif
  450. #ifdef BSP_USING_TIM16
  451. if (htim->Instance == TIM16)
  452. {
  453. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
  454. }
  455. #endif
  456. #ifdef BSP_USING_TIM17
  457. if (htim->Instance == TIM17)
  458. {
  459. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
  460. }
  461. #endif
  462. }
  463. static int stm32_hwtimer_init(void)
  464. {
  465. int i = 0;
  466. int result = RT_EOK;
  467. for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
  468. {
  469. stm32_hwtimer_obj[i].time_device.info = &_info;
  470. stm32_hwtimer_obj[i].time_device.ops = &_ops;
  471. if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
  472. {
  473. LOG_D("%s register success", stm32_hwtimer_obj[i].name);
  474. }
  475. else
  476. {
  477. LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
  478. result = -RT_ERROR;
  479. }
  480. }
  481. return result;
  482. }
  483. INIT_BOARD_EXPORT(stm32_hwtimer_init);
  484. #endif /* RT_USING_HWTIMER */
  485. #endif /* BSP_USING_TIM */