drv_codec_icodec.c 23 KB

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  1. #include <rthw.h>
  2. #include <rtthread.h>
  3. #include <rtdevice.h>
  4. #include <drivers/audio.h>
  5. #ifdef RT_USING_FINSH
  6. #include <finsh.h>
  7. #endif
  8. #include "board.h"
  9. #include "dma.h"
  10. #ifdef RT_USING_ICODEC
  11. #include "drv_gpio.h"
  12. #include "drv_clock.h"
  13. #include "drv_aic.h"
  14. #include "drv_aic_i2s.h"
  15. #include "drv_codec_icodec.h"
  16. #define CODEC_DEBUG 0
  17. #if CODEC_DEBUG
  18. #define CODEC_DBG(...) rt_kprintf("[CODEC]"),rt_kprintf(__VA_ARGS__)
  19. #else
  20. #define CODEC_DBG(...)
  21. #endif
  22. /*
  23. * Sampling rate
  24. */
  25. const int sample_attr[] =
  26. {
  27. 8000, 11025, 12000, 16000,
  28. 22050, 24000, 32000, 44100,
  29. 48000, 88200, 96000, 176400,
  30. 192000,
  31. };
  32. static uint8_t _g_icodec_reg_defcache[SCODA_MAX_REG_NUM] =
  33. {
  34. #if 1
  35. /* reg 0x0 ... 0x9 */
  36. 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x03,
  37. /* reg 0xa ... 0x13 */
  38. 0x00,0x40,0x30,0x80,0x01,0x00,0x00,0x00,0x0f,0x40,
  39. /* reg 0x14 ... 0x1d */
  40. 0x07,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x00,0xff,
  41. /* reg 0x1e ... 0x27 */
  42. 0x00,0x06,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  43. /* reg 0x28 ... 0x31 */
  44. 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  45. /* reg 0x32 ... 0x39 */
  46. 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  47. /* extern reg */
  48. 0x00,0x00,0x00,0x00,0x00,
  49. 0x00,0x00,0x00,0x00,
  50. 0x00,0x00,0x00,0x00,
  51. 0x34,0x07,0x44,0x1f,0x00,
  52. #else
  53. /* reg 0x0 ... 0x9 */
  54. 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x03,
  55. /* reg 0xa ... 0x13 */
  56. 0x00,0x00,0x30,0xb0,0x01,0x00,0x00,0x00,0x0F,0x40,
  57. /* reg 0x14 ... 0x1d */
  58. 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0x00,0xff,
  59. /* reg 0x1e ... 0x27 */
  60. 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  61. /* reg 0x28 ... 0x31 */
  62. 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  63. /* reg 0x32 ... 0x39 */
  64. 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  65. /* extern reg */
  66. 0x00,0x00,0x00,0x00,0x00,
  67. 0x00,0x00,0x00,0x00,
  68. 0x00,0x00,0x00,0x00,
  69. 0x34,0x07,0x44,0x1f,0x00,
  70. #endif
  71. };
  72. static int jz_icodec_reg_volatile(uint32_t reg)
  73. {
  74. if (reg > SCODA_MAX_REG_NUM)
  75. return 1;
  76. switch (reg)
  77. {
  78. case SCODA_REG_SR:
  79. case SCODA_REG_SR2:
  80. case SCODA_REG_SIGR:
  81. case SCODA_REG_SIGR3:
  82. case SCODA_REG_SIGR5:
  83. case SCODA_REG_SIGR7:
  84. case SCODA_REG_MR:
  85. case SCODA_REG_IFR:
  86. case SCODA_REG_IFR2:
  87. case SCODA_REG_SR_ADC_AGCDGL:
  88. case SCODA_REG_SR_ADC_AGCDGR:
  89. case SCODA_REG_SR_ADC_AGCAGL:
  90. case SCODA_REG_SR_ADC_AGCAGR:
  91. case SCODA_REG_SR_TR1:
  92. case SCODA_REG_SR_TR2:
  93. case SCODA_REG_SR_TR_SRCDAC:
  94. return 1;
  95. default:
  96. return 0;
  97. }
  98. }
  99. static int jz_icodec_reg_writable(uint32_t reg)
  100. {
  101. if (reg > SCODA_MAX_REG_NUM)
  102. return 0;
  103. switch (reg) {
  104. case SCODA_REG_SR:
  105. case SCODA_REG_SR2:
  106. case SCODA_REG_SIGR:
  107. case SCODA_REG_SIGR3:
  108. case SCODA_REG_SIGR5:
  109. case SCODA_REG_SIGR7:
  110. case SCODA_REG_MR:
  111. case SCODA_REG_SR_ADC_AGCDGL:
  112. case SCODA_REG_SR_ADC_AGCDGR:
  113. case SCODA_REG_SR_ADC_AGCAGL:
  114. case SCODA_REG_SR_ADC_AGCAGR:
  115. case SCODA_REG_SR_TR1:
  116. case SCODA_REG_SR_TR2:
  117. case SCODA_REG_SR_TR_SRCDAC:
  118. return 0;
  119. default:
  120. return 1;
  121. }
  122. }
  123. static int jz_icodec_reg_readable(uint32_t reg)
  124. {
  125. if (reg > SCODA_MAX_REG_NUM)
  126. return 0;
  127. else
  128. return 1;
  129. }
  130. static uint8_t jz_icodec_reg_read(struct jz_icodec *icodec, uint32_t reg)
  131. {
  132. int ret = 0;
  133. uint8_t val = 0;
  134. if (!jz_icodec_reg_volatile(reg))
  135. {
  136. val = icodec_hw_read(icodec, reg);
  137. if ((reg == SCODA_REG_GCR_DACL) || (reg == SCODA_REG_GCR_DACR)) {
  138. if (val < 32)
  139. val = 31 - val;
  140. else
  141. val = 95 - val;
  142. }
  143. return val;
  144. }
  145. if (jz_icodec_reg_readable(reg))
  146. return icodec_hw_read(icodec, reg);
  147. return 0;
  148. }
  149. static int jz_icodec_reg_write(struct jz_icodec *codec, uint16_t reg, int value)
  150. {
  151. int ret = 0;
  152. int val = value;
  153. if (jz_icodec_reg_writable(reg))
  154. {
  155. if (!jz_icodec_reg_volatile(reg))
  156. {
  157. if((reg == SCODA_REG_GCR_DACL)||(reg == SCODA_REG_GCR_DACR))
  158. {
  159. if(val < 32)
  160. val = 31 - val;
  161. else
  162. val = 95 - val;
  163. }
  164. _g_icodec_reg_defcache[reg] = val;
  165. }
  166. return icodec_hw_write(codec, reg, val);
  167. }
  168. return 0;
  169. }
  170. static int jz_icodec_reg_update_bits(struct jz_icodec *icodec, uint16_t reg, uint32_t mask, uint16_t value)
  171. {
  172. uint8_t change;
  173. uint8_t old, new;
  174. int ret;
  175. ret = jz_icodec_reg_read(icodec, reg);
  176. if (ret < 0)
  177. return ret;
  178. old = ret;
  179. new = (old & ~mask) | (value & mask);
  180. change = old != new;
  181. if (change)
  182. ret = jz_icodec_reg_write(icodec, reg, new);
  183. if (ret < 0)
  184. return ret;
  185. return change;
  186. }
  187. static int jz_icodec_set_sampling_rate(struct jz_icodec *icodec, int rate)
  188. {
  189. /* sampling rate */
  190. int speed_sel = 0;
  191. if(rate == icodec->replay_config.samplerate)
  192. return rate;
  193. /* set sampling rate */
  194. for (speed_sel = 0; rate > sample_attr[speed_sel]; speed_sel++) ;
  195. jz_icodec_reg_update_bits(icodec, SCODA_REG_FCR_DAC, SCODA_FCR_FREQ_MASK, (speed_sel << SCODA_FCR_FREQ_SHIFT));
  196. jz_icodec_reg_update_bits(icodec, SCODA_REG_FCR_ADC, SCODA_FCR_FREQ_MASK, (speed_sel << SCODA_FCR_FREQ_SHIFT));
  197. rate = sample_attr[speed_sel];
  198. icodec->replay_config.samplerate = rate;
  199. return rate;
  200. }
  201. static void jz_icodec_hw_params(struct jz_icodec* icodec,int stream)
  202. {
  203. int playback = (stream == AUDIO_STREAM_REPLAY);
  204. int speed_sel = 0;
  205. int bit_width_sel = 3;
  206. int aicr_reg = playback ? SCODA_REG_AICR_DAC : SCODA_REG_AICR_ADC;
  207. int fcr_reg = playback ? SCODA_REG_FCR_DAC : SCODA_REG_FCR_ADC;
  208. /* bit width */
  209. switch (icodec->replay_config.samplefmt)
  210. {
  211. case AUDIO_FMT_PCM_S16_LE:
  212. bit_width_sel = 0;
  213. break;
  214. case AUDIO_FMT_PCM_S24_LE:
  215. bit_width_sel = 3;
  216. break;
  217. }
  218. /*sample rate*/
  219. for (speed_sel = 0; icodec->replay_config.samplerate > sample_attr[speed_sel]; speed_sel++);
  220. jz_icodec_reg_update_bits(icodec, aicr_reg, SCODA_AICR_DAC_ADWL_MASK,(bit_width_sel << SCODA_AICR_DAC_ADWL_SHIFT));
  221. jz_icodec_reg_update_bits(icodec, fcr_reg, SCODA_FCR_FREQ_MASK,(speed_sel << SCODA_FCR_FREQ_SHIFT));
  222. }
  223. static int jz_icodec_digital_mute(struct jz_icodec *icodec, int mute)
  224. {
  225. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_DAC, SCODA_CR_DAC_SMUTE_MASK, (!!mute) << SCODA_CR_DAC_SMUTE_SHIFT);
  226. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_ADC, SCODA_CR_ADC_SMUTE_MASK, (!!mute) << SCODA_CR_ADC_SMUTE_SHIFT);
  227. return 0;
  228. }
  229. static void jz_icodec_startup(struct jz_icodec *icodec)
  230. {
  231. /*power on codec*/
  232. if (jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_VIC, SCODA_CR_VIC_SB_MASK, 0))
  233. rt_thread_delay(rt_tick_from_millisecond(250));
  234. if (jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_VIC, SCODA_CR_VIC_SB_SLEEP_MASK, 0))
  235. rt_thread_delay(rt_tick_from_millisecond(400));
  236. }
  237. static void jz_icodec_shutdown(struct jz_icodec *icodec)
  238. {
  239. /*power off codec*/
  240. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_VIC, SCODA_CR_VIC_SB_SLEEP_MASK, 1);
  241. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_VIC, SCODA_CR_VIC_SB_MASK, 1);
  242. }
  243. static void jz_icodec_mute_stream(struct jz_icodec *icodec, int mute, int stream)
  244. {
  245. if(stream == AUDIO_STREAM_REPLAY)
  246. {
  247. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_DAC, SCODA_CR_DAC_SMUTE_MASK, (!!mute) << SCODA_CR_DAC_SMUTE_SHIFT);
  248. }
  249. else if(stream == AUDIO_STREAM_RECORD)
  250. {
  251. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_ADC, SCODA_CR_ADC_SMUTE_MASK, (!!mute) << SCODA_CR_ADC_SMUTE_SHIFT);
  252. }
  253. }
  254. #define VOLUME_MIN 0
  255. #define VOLUME_MAX 100
  256. #define REPLAY_REG_MAX (63)
  257. static int jz_icodec_set_replay_volume(struct jz_icodec *icodec,int val)
  258. {
  259. int phyValue = 0;
  260. /* get current volume */
  261. if (val < VOLUME_MIN)
  262. val = VOLUME_MIN;
  263. else if(val >= VOLUME_MAX)
  264. val = VOLUME_MAX;
  265. phyValue = (val* REPLAY_REG_MAX) / VOLUME_MAX;
  266. CODEC_DBG("volume = %d\n",val);
  267. jz_icodec_reg_write(icodec,SCODA_REG_GCR_DACL,phyValue);
  268. jz_icodec_reg_write(icodec,SCODA_REG_GCR_DACR,phyValue);
  269. icodec->user_replay_volume = jz_icodec_reg_read(icodec,SCODA_REG_GCR_DACL);
  270. if (val == 0)
  271. {
  272. jz_icodec_digital_mute(icodec,1);
  273. }
  274. else
  275. {
  276. jz_icodec_digital_mute(icodec,0);
  277. }
  278. return val;
  279. }
  280. #define REPLAY_MIXER_REG_MAX 31
  281. int jz_icodec_set_replay_mixer_volume(struct jz_icodec *icodec,int val)
  282. {
  283. int phyValue = 0;
  284. /* get current volume */
  285. if (val < VOLUME_MIN)
  286. val = VOLUME_MIN;
  287. else if(val >= VOLUME_MAX)
  288. val = VOLUME_MAX;
  289. phyValue = (val * REPLAY_MIXER_REG_MAX) / VOLUME_MAX;
  290. jz_icodec_reg_write(icodec,SCODA_REG_GCR_MIXDACL,phyValue);
  291. jz_icodec_reg_write(icodec,SCODA_REG_GCR_MIXDACR,phyValue);
  292. return val;
  293. }
  294. #define DIGITAL_CAP_REG_MAX 43
  295. int jz_icodec_set_digital_capture_volume(struct jz_icodec *icodec,int val)
  296. {
  297. int phyValue = 0;
  298. /* get current volume */
  299. if (val < VOLUME_MIN)
  300. val = VOLUME_MIN;
  301. else if(val >= VOLUME_MAX)
  302. val = VOLUME_MAX;
  303. phyValue = (val * DIGITAL_CAP_REG_MAX) / VOLUME_MAX;
  304. jz_icodec_reg_write(icodec,SCODA_REG_GCR_ADCL,phyValue);
  305. jz_icodec_reg_write(icodec,SCODA_REG_GCR_ADCR,phyValue);
  306. return val;
  307. }
  308. #define DIGITAL_CAP_MIX_REG_MAX 31
  309. int jz_icodec_set_digital_capture_mixer_volume(struct jz_icodec *icodec,int val)
  310. {
  311. int phyValue = 0;
  312. /* get current volume */
  313. if (val < VOLUME_MIN)
  314. val = VOLUME_MIN;
  315. else if(val >= VOLUME_MAX)
  316. val = VOLUME_MAX;
  317. phyValue = (val * DIGITAL_CAP_MIX_REG_MAX) / VOLUME_MAX;
  318. jz_icodec_reg_write(icodec,SCODA_REG_GCR_MIXADCL,phyValue);
  319. jz_icodec_reg_write(icodec,SCODA_REG_GCR_MIXADCR,phyValue);
  320. return val;
  321. }
  322. #define MIC_REG_MAX 4
  323. int aic_icodec_set_mic_volume(struct jz_icodec *icodec,int val)
  324. {
  325. int phyValue = 0;
  326. /* get current volume */
  327. if (val < VOLUME_MIN)
  328. val = VOLUME_MIN;
  329. else if(val >= VOLUME_MAX)
  330. val = VOLUME_MAX;
  331. phyValue = MIC_REG_MAX - (val) * MIC_REG_MAX / VOLUME_MAX;
  332. jz_icodec_reg_write(icodec,SCODA_REG_GCR_MIC1,phyValue);
  333. return val;
  334. }
  335. enum
  336. {
  337. AMIC_ON = 0,
  338. DMIC_ON = 1,
  339. };
  340. void jz_icodec_adc_mic_select(struct jz_icodec *icodec, int dmic)
  341. {
  342. if(dmic == DMIC_ON)
  343. {
  344. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_ADC, SCODA_CR_ADC_MIC_SEL_MASK, (1 << SCODA_CR_ADC_MIC_SEL_SHIFT));
  345. }
  346. else
  347. {
  348. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_ADC, SCODA_CR_ADC_MIC_SEL_MASK, (0 << SCODA_CR_ADC_MIC_SEL_SHIFT));
  349. }
  350. }
  351. void jz_icodec_adc_capture_enable(struct jz_icodec *icodec,int enable)
  352. {
  353. if(enable)
  354. {
  355. jz_icodec_reg_update_bits(icodec, SCODA_REG_AICR_ADC, SCODA_AICR_ADC_SB_MASK, (0 << SCODA_AICR_ADC_SB_SHIFT));
  356. }
  357. else
  358. {
  359. jz_icodec_reg_update_bits(icodec, SCODA_REG_AICR_ADC, SCODA_AICR_ADC_SB_MASK, (1 << SCODA_AICR_ADC_SB_SHIFT));
  360. }
  361. }
  362. /*********************************************************************************************************
  363. ** Audio device
  364. *********************************************************************************************************/
  365. static rt_err_t icodec_getcaps (struct rt_audio_device *audio,struct rt_audio_caps *caps)
  366. {
  367. rt_err_t result = RT_EOK;
  368. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  369. CODEC_DBG("type = %d\n",caps->main_type);
  370. switch (caps->main_type)
  371. {
  372. case AUDIO_TYPE_QUERY: /* qurey the types of hw_codec device */
  373. {
  374. switch (caps->sub_type)
  375. {
  376. case AUDIO_TYPE_QUERY:
  377. caps->udata.mask = AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER;
  378. break;
  379. default:
  380. result = -RT_ERROR;
  381. break;
  382. }
  383. break;
  384. }
  385. case AUDIO_TYPE_OUTPUT: /* Provide capabilities of OUTPUT unit */
  386. switch (caps->sub_type)
  387. {
  388. case AUDIO_DSP_PARAM:
  389. if (audio->replay == NULL)
  390. {
  391. result = -RT_ERROR;
  392. break;
  393. }
  394. caps->udata.config.channels = icodec->replay_config.channels;
  395. caps->udata.config.samplefmt = icodec->replay_config.samplefmt;
  396. caps->udata.config.samplerate = icodec->replay_config.samplerate;
  397. caps->udata.config.samplefmts = icodec->replay_config.samplefmts;
  398. break;
  399. default:
  400. result = -RT_ERROR;
  401. break;
  402. }
  403. break;
  404. case AUDIO_TYPE_MIXER: /* report the Mixer Units */
  405. switch (caps->sub_type)
  406. {
  407. case AUDIO_MIXER_QUERY:
  408. caps->udata.mask = AUDIO_MIXER_VOLUME | AUDIO_MIXER_DIGITAL | AUDIO_MIXER_LINE;
  409. break;
  410. case AUDIO_MIXER_VOLUME:
  411. caps->udata.value = icodec->user_replay_volume;
  412. break;
  413. case AUDIO_MIXER_DIGITAL:
  414. break;
  415. case AUDIO_MIXER_LINE:
  416. break;
  417. default:
  418. result = -RT_ERROR;
  419. break;
  420. }
  421. break;
  422. default:
  423. result = -RT_ERROR;
  424. break;
  425. }
  426. return result;
  427. }
  428. static rt_err_t icodec_configure (struct rt_audio_device *audio,struct rt_audio_caps *caps)
  429. {
  430. rt_err_t result = RT_EOK;
  431. struct jz_icodec *icodec = (struct jz_icodec *) audio->parent.user_data;
  432. CODEC_DBG("type = %d\n",caps->main_type);
  433. switch (caps->main_type)
  434. {
  435. case AUDIO_TYPE_MIXER:
  436. switch (caps->sub_type)
  437. {
  438. case AUDIO_MIXER_VOLUME:
  439. {
  440. int volume = caps->udata.value;
  441. jz_icodec_set_replay_volume(icodec, volume);
  442. }
  443. break;
  444. case AUDIO_MIXER_DIGITAL:
  445. {
  446. int gain = caps->udata.value;
  447. jz_icodec_set_replay_mixer_volume(icodec, gain);
  448. }
  449. break;
  450. case AUDIO_MIXER_LINE:
  451. {
  452. int gain = caps->udata.value;
  453. //set linein valume...
  454. }
  455. break;
  456. case AUDIO_MIXER_EXTEND:
  457. break;
  458. default:
  459. result = -RT_ERROR;
  460. break;
  461. }
  462. break;
  463. case AUDIO_TYPE_OUTPUT:
  464. {
  465. switch (caps->sub_type)
  466. {
  467. case AUDIO_DSP_PARAM:
  468. {
  469. CODEC_DBG(" AUDIO_TYPE_OUTPUT:\n");CODEC_DBG(" Number of channels: %u\n", caps->udata.config.channels);CODEC_DBG(" Sample rate: %u\n", caps->udata.config.samplerate);CODEC_DBG(" Sample format: %u\n", caps->udata.config.samplefmt);
  470. //upgrate codec chip
  471. icodec->i2s->channels = caps->udata.config.channels;
  472. icodec->i2s->rates = caps->udata.config.samplerate;
  473. icodec->i2s->fmt_width = rt_audio_format_to_bits(caps->udata.config.samplefmt);
  474. aic_i2s_hw_params(icodec->i2s, AUDIO_STREAM_REPLAY);
  475. aic_i2s_set_sysclk(icodec->i2s, icodec->i2s->rates);
  476. //save config
  477. icodec->replay_config.channels = caps->udata.config.channels;
  478. icodec->replay_config.samplefmt = caps->udata.config.samplefmt;
  479. icodec->replay_config.samplerate = caps->udata.config.samplerate;
  480. icodec->replay_config.samplefmts = caps->udata.config.samplefmts;
  481. break;
  482. }
  483. case AUDIO_DSP_SAMPLERATE:
  484. {
  485. int rate = caps->udata.value;
  486. jz_icodec_set_sampling_rate(icodec, rate);
  487. break;
  488. }
  489. default:
  490. result = -RT_ERROR;
  491. break;
  492. }
  493. }
  494. break;
  495. default:
  496. result = -RT_ERROR;
  497. break;
  498. }
  499. return result;
  500. }
  501. static rt_err_t icodec_init (struct rt_audio_device *audio)
  502. {
  503. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  504. uint16_t i;
  505. /* disable shutdown */
  506. gpio_set_value(AUDIO_SHUTDOWN_PORT,AUDIO_SHUTDOWN_PIN,AUDIO_SHUTDOWN_MUTE);
  507. rt_thread_delay(RT_TICK_PER_SECOND / 4);
  508. gpio_set_value(AUDIO_SHUTDOWN_PORT,AUDIO_SHUTDOWN_PIN,!AUDIO_SHUTDOWN_MUTE);
  509. rt_thread_delay(RT_TICK_PER_SECOND / 4);
  510. /* write default value ... */
  511. for (i = 0; i < sizeof(_g_icodec_reg_defcache); ++i)
  512. {
  513. jz_icodec_reg_write(icodec, i, _g_icodec_reg_defcache[i]);
  514. }
  515. /* power off codec */
  516. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_VIC, SCODA_CR_VIC_SB_SLEEP_MASK, 1);
  517. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_VIC, SCODA_CR_VIC_SB_MASK, 1);
  518. /* codec select enable 24M clock*/
  519. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_CK , SCODA_CR_CK_MCLK_DIV_MASK, 1 << SCODA_CR_CK_MCLK_DIV_SHIFT);
  520. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_CK , SCODA_CR_CK_SDCLK_MASK, 0 << SCODA_CR_CK_SDCLK_SHIFT);
  521. jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_CK , SCODA_CR_CRYSTAL_MASK, 0 << SCODA_CR_CRYSTAL_SHIFT);
  522. /*codec select Dac/Adc i2s interface*/
  523. jz_icodec_reg_update_bits(icodec, SCODA_REG_AICR_DAC, SCODA_AICR_DAC_SLAVE_MASK, 0);
  524. jz_icodec_reg_update_bits(icodec, SCODA_REG_AICR_DAC, SCODA_AICR_DAC_AUDIO_MASK, SCODA_AICR_DAC_AUDIOIF_I2S);
  525. jz_icodec_reg_update_bits(icodec, SCODA_REG_AICR_ADC, SCODA_AICR_ADC_AUDIO_MASK, 0);
  526. jz_icodec_reg_update_bits(icodec, SCODA_REG_AICR_ADC, SCODA_AICR_ADC_AUDIO_MASK, SCODA_AICR_ADC_AUDIOIF_I2S);
  527. /*codec generated IRQ is a high level */
  528. jz_icodec_reg_update_bits(icodec, SCODA_REG_ICR, SCODA_ICR_INT_FORM_MASK, SCODA_ICR_INT_FORM_LOW);
  529. /*codec irq mask*/
  530. jz_icodec_reg_write(icodec, SCODA_REG_IMR, SCODA_IMR_COMMON_MASK);
  531. jz_icodec_reg_write(icodec, SCODA_REG_IMR2, SCODA_IMR2_COMMON_MASK);
  532. /*codec clear all irq*/
  533. jz_icodec_reg_write(icodec, SCODA_REG_IFR, SCODA_IMR_COMMON_MASK);
  534. jz_icodec_reg_write(icodec, SCODA_REG_IFR2, SCODA_IMR2_COMMON_MASK);
  535. /* PCM Format */
  536. #if (ICODEC_PCM_FORMAT == AUDIO_FMT_PCM_S16_LE)
  537. jz_icodec_reg_update_bits(icodec, SCODA_REG_AICR_DAC, SCODA_AICR_DAC_ADWL_MASK, (0 << SCODA_AICR_DAC_ADWL_SHIFT));
  538. jz_icodec_reg_update_bits(icodec, SCODA_REG_AICR_ADC, SCODA_AICR_ADC_ADWL_MASK, (0 << SCODA_AICR_ADC_ADWL_SHIFT));
  539. #endif
  540. /* sampling rate */
  541. jz_icodec_set_sampling_rate(icodec,ICODEC_SAMPLING_RATE);
  542. /*power on codec*/
  543. jz_icodec_digital_mute(icodec,0);
  544. if (jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_VIC, SCODA_CR_VIC_SB_MASK, 0))
  545. rt_thread_delay(rt_tick_from_millisecond(250));
  546. if (jz_icodec_reg_update_bits(icodec, SCODA_REG_CR_VIC, SCODA_CR_VIC_SB_SLEEP_MASK, 0))
  547. rt_thread_delay(rt_tick_from_millisecond(400));
  548. return RT_EOK;
  549. }
  550. static rt_err_t icodec_shutdown (struct rt_audio_device *audio)
  551. {
  552. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  553. #ifdef AUDIO_SHUTDOWN_PORT
  554. gpio_set_value(AUDIO_SHUTDOWN_PORT,AUDIO_SHUTDOWN_PIN,AUDIO_SHUTDOWN_MUTE);
  555. #endif
  556. return RT_EOK;
  557. }
  558. rt_err_t icodec_start (struct rt_audio_device *audio,int stream)
  559. {
  560. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  561. aic_i2s_trigger(icodec->i2s,I2S_TRIGGER_START,stream);
  562. return RT_EOK;
  563. }
  564. rt_err_t icodec_stop (struct rt_audio_device *audio,int stream)
  565. {
  566. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  567. aic_i2s_trigger(icodec->i2s,I2S_TRIGGER_STOP,stream);
  568. return RT_EOK;
  569. }
  570. static rt_err_t icodec_suspend (struct rt_audio_device *audio,int stream)
  571. {
  572. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  573. aic_i2s_trigger(icodec->i2s,I2S_TRIGGER_SUSPEND,stream);
  574. return RT_EOK;
  575. }
  576. static rt_err_t icodec_resume (struct rt_audio_device *audio,int stream)
  577. {
  578. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  579. aic_i2s_trigger(icodec->i2s,I2S_TRIGGER_RESUME,stream);
  580. return RT_EOK;
  581. }
  582. static rt_err_t icodec_control (struct rt_audio_device *audio, int cmd, void *args)
  583. {
  584. rt_err_t result = RT_EOK;
  585. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  586. switch (cmd)
  587. {
  588. case AUDIO_CTL_HWRESET:
  589. break;
  590. case AUDIO_CTL_GETBUFFERINFO:
  591. {
  592. struct rt_audio_buf_info *info = (struct rt_audio_buf_info *)args;
  593. if(info != RT_NULL)
  594. {
  595. info->buffer_count = CFG_I2S_DMA_PAGE_NUM;
  596. info->buffer_size = CFG_I2S_DMA_PAGE_SIZE;
  597. }
  598. }
  599. break;
  600. default:
  601. result = -RT_ERROR;
  602. break;
  603. }
  604. return result;
  605. }
  606. static void codec_write_complete(void *data, void *pbuf)
  607. {
  608. struct rt_audio_device *audio = (struct rt_audio_device *)data;
  609. /* notify transmitted complete. */
  610. rt_audio_tx_complete(audio,pbuf);
  611. }
  612. static rt_size_t icodec_transmit (struct rt_audio_device *audio,const void *writeBuf,void *readBuf, rt_size_t size)
  613. {
  614. struct jz_icodec *icodec = (struct jz_icodec *)audio->parent.user_data;
  615. CODEC_DBG("writeBuf = %x,readBuf=%x,size=%d\n",(rt_uint32_t)writeBuf,(rt_uint32_t)readBuf,size);
  616. if(writeBuf != RT_NULL)
  617. {
  618. return aic_i2s_send(icodec->i2s, writeBuf, size, codec_write_complete, (void *)audio);
  619. }
  620. return 0;
  621. }
  622. static struct jz_icodec _g_jz_icodec =
  623. {
  624. .mapped_base = AIC_BASE + 0xA0,
  625. .user_replay_volume = 31,
  626. };
  627. static struct rt_audio_device _g_audio_device;
  628. const struct rt_audio_ops _g_audio_ops =
  629. {
  630. .getcaps = icodec_getcaps,
  631. .configure = icodec_configure,
  632. .init = icodec_init,
  633. .shutdown = icodec_shutdown,
  634. .start = icodec_start,
  635. .stop = icodec_stop,
  636. .suspend = icodec_suspend ,
  637. .resume = icodec_resume ,
  638. .control = icodec_control,
  639. .transmit = icodec_transmit,
  640. };
  641. int rt_hw_codec_init(void)
  642. {
  643. int result;
  644. struct rt_audio_device *audio = &_g_audio_device;
  645. struct jz_icodec *icodec = &_g_jz_icodec;
  646. struct jz_i2s *i2s;
  647. rt_kprintf("init i2s....\n");
  648. i2s = rt_hw_aic_i2s_init();
  649. if(i2s == RT_NULL)
  650. {
  651. CODEC_DBG("i2s device not found!\r\n");
  652. return -RT_EIO;
  653. }
  654. icodec->i2s = i2s;
  655. #ifdef AUDIO_DEVICE_USE_PRIVATE_BUFFER
  656. {
  657. rt_uint8_t *mempool = (rt_uint8_t *)rt_malloc(CODEC_MP_SZ);
  658. if(mempool == RT_NULL)
  659. {
  660. CODEC_DBG("no memory...\n");
  661. return -RT_ENOMEM;
  662. }
  663. rt_mp_init(&icodec->mp,"codecbuf",mempool,CODEC_MP_SZ,CODEC_MP_BLOCK_SZ);
  664. }
  665. #endif /* AUDIO_DEVICE_USE_PRIVATE_BUFFER */
  666. //init default configuration
  667. {
  668. icodec->replay_config.channels = 2;
  669. icodec->replay_config.samplefmt = AUDIO_FMT_PCM_S16_LE;
  670. icodec->replay_config.samplerate = 44100;
  671. icodec->replay_config.samplefmts = AUDIO_FMT_PCM_S16_LE;
  672. }
  673. audio->ops = (struct rt_audio_ops *)&_g_audio_ops;
  674. result = rt_audio_register(audio,"sound0",RT_DEVICE_FLAG_WRONLY,icodec);
  675. if(result != RT_EOK)
  676. {
  677. CODEC_DBG("icodec device register error..\n");
  678. return result;
  679. }
  680. rt_kprintf("codec initialization done!\n");
  681. return RT_EOK;
  682. }
  683. INIT_DEVICE_EXPORT(rt_hw_codec_init);
  684. #endif /* RT_USING_ICODEC */