davinci_serial.c 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2011-01-13 weety first version
  9. */
  10. #include <rtthread.h>
  11. #include <rthw.h>
  12. #include <dm36x.h>
  13. #include <rtdevice.h>
  14. static struct rt_serial_device davinci_serial_dev0;
  15. static struct rt_serial_device davinci_serial_dev1;
  16. #define LSR_DR 0x01 /* Data ready */
  17. #define LSR_THRE 0x20 /* Xmit holding register empty */
  18. //#define USTAT_TXB_EMPTY 0x02 /* tx buffer empty */
  19. #define BPS 115200 /* serial baudrate */
  20. typedef struct uartport
  21. {
  22. volatile rt_uint32_t rbr;
  23. volatile rt_uint32_t ier;
  24. volatile rt_uint32_t fcr;
  25. volatile rt_uint32_t lcr;
  26. volatile rt_uint32_t mcr;
  27. volatile rt_uint32_t lsr;
  28. volatile rt_uint32_t msr;
  29. volatile rt_uint32_t scr;
  30. volatile rt_uint32_t dll;
  31. volatile rt_uint32_t dlh;
  32. volatile rt_uint32_t res[2];
  33. volatile rt_uint32_t pwremu_mgmt;
  34. volatile rt_uint32_t mdr;
  35. }uartport;
  36. #define thr rbr
  37. #define iir fcr
  38. #define UART0 ((struct uartport *)DAVINCI_UART0_BASE)
  39. #define UART1 ((struct uartport *)DM365_UART1_BASE)
  40. /**
  41. * This function will handle serial
  42. */
  43. void rt_davinci_serial_handler(int vector, void *param)
  44. {
  45. struct rt_serial_device *dev = (struct rt_serial_device *)param;
  46. rt_hw_serial_isr(dev, RT_SERIAL_EVENT_RX_IND);
  47. }
  48. /**
  49. * UART device in RT-Thread
  50. */
  51. static rt_err_t davinci_uart_configure(struct rt_serial_device *serial,
  52. struct serial_configure *cfg)
  53. {
  54. return RT_EOK;
  55. }
  56. static rt_err_t davinci_uart_control(struct rt_serial_device *serial,
  57. int cmd, void *arg)
  58. {
  59. uartport *uart = serial->parent.user_data;
  60. switch (cmd)
  61. {
  62. case RT_DEVICE_CTRL_CLR_INT:
  63. /* disable rx irq */
  64. if (uart == UART0)
  65. rt_hw_interrupt_mask(IRQ_UARTINT0);
  66. else if (uart == UART1)
  67. rt_hw_interrupt_mask(IRQ_UARTINT1);
  68. break;
  69. case RT_DEVICE_CTRL_SET_INT:
  70. /* enable rx irq */
  71. if (uart == UART0)
  72. rt_hw_interrupt_umask(IRQ_UARTINT0);
  73. else if (uart == UART1)
  74. rt_hw_interrupt_umask(IRQ_UARTINT1);
  75. break;
  76. }
  77. return RT_EOK;
  78. }
  79. static int davinci_uart_putc(struct rt_serial_device *serial, char c)
  80. {
  81. rt_uint32_t level;
  82. uartport *uart = serial->parent.user_data;
  83. while (!(uart->lsr & LSR_THRE));
  84. uart->thr = c;
  85. return 1;
  86. }
  87. static int davinci_uart_getc(struct rt_serial_device *serial)
  88. {
  89. int result;
  90. uartport *uart = serial->parent.user_data;
  91. if (uart->lsr & LSR_DR)
  92. {
  93. result = uart->rbr & 0xff;
  94. }
  95. else
  96. {
  97. result = -1;
  98. }
  99. return result;
  100. }
  101. static const struct rt_uart_ops davinci_uart_ops =
  102. {
  103. davinci_uart_configure,
  104. davinci_uart_control,
  105. davinci_uart_putc,
  106. davinci_uart_getc,
  107. };
  108. void davinci_uart0_init(void)
  109. {
  110. rt_uint32_t divisor;
  111. divisor = (24000000 + (115200 * (16 / 2))) / (16 * 115200);
  112. UART0->ier = 0;
  113. UART0->lcr = 0x83; //8N1
  114. UART0->dll = 0;
  115. UART0->dlh = 0;
  116. UART0->lcr = 0x03;
  117. UART0->mcr = 0x03; //RTS,CTS
  118. UART0->fcr = 0x07; //FIFO
  119. UART0->lcr = 0x83;
  120. UART0->dll = divisor & 0xff;
  121. UART0->dlh = (divisor >> 8) & 0xff;
  122. UART0->lcr = 0x03;
  123. UART0->mdr = 0; //16x over-sampling
  124. UART0->pwremu_mgmt = 0x6000;
  125. rt_hw_interrupt_install(IRQ_UARTINT0, rt_davinci_serial_handler,
  126. (void *)&davinci_serial_dev0, "UART0");
  127. rt_hw_interrupt_mask(IRQ_UARTINT0);
  128. UART0->ier = 0x05;
  129. }
  130. void davinci_uart_gpio_init()
  131. {
  132. rt_uint32_t val;
  133. val = davinci_readl(PINMUX3);
  134. val &= 0xf3ffffff; /* gio23 RS485_CTRL */
  135. val |= 0x60000000; /*UART1_TXD (gio25)*/
  136. davinci_writel(val, PINMUX3);
  137. val = davinci_readl(PINMUX4);
  138. val |= 0x0000c000; /* UART1_RXD (gio34) */
  139. davinci_writel(val, PINMUX4);
  140. val = davinci_readl(DAVINCI_GPIO_BASE + 0x10);
  141. val &= ~(1 << 23);
  142. davinci_writel(val, DAVINCI_GPIO_BASE + 0x10);
  143. davinci_writel((1<<23), DAVINCI_GPIO_BASE + 0x1C);
  144. }
  145. void davinci_uart1_init(void)
  146. {
  147. rt_uint32_t divisor;
  148. rt_uint32_t freq;
  149. rt_uint32_t baudrate;
  150. struct clk *clk;
  151. davinci_uart_gpio_init();
  152. psc_change_state(DAVINCI_DM365_LPSC_UART1, PSC_ENABLE);
  153. clk = clk_get("UART1");
  154. freq = clk_get_rate(clk);
  155. baudrate = 9600;
  156. divisor = (freq + (baudrate * (16 / 2))) / (16 * baudrate);
  157. UART1->ier = 0;
  158. UART1->lcr = 0x87; //8N2, 0x83 8N1
  159. UART1->dll = 0;
  160. UART1->dlh = 0;
  161. UART1->lcr = 0x07;
  162. UART1->mcr = 0x03; //RTS,CTS
  163. UART1->fcr = 0x07; //FIFO
  164. UART1->lcr = 0x87;
  165. UART1->dll = divisor & 0xff;
  166. UART1->dlh = (divisor >> 8) & 0xff;
  167. UART1->lcr = 0x07;
  168. UART1->mdr = 0; //16x over-sampling
  169. UART1->pwremu_mgmt = 0x6000;
  170. rt_hw_interrupt_install(IRQ_UARTINT1, rt_davinci_serial_handler,
  171. (void *)&davinci_serial_dev1, "UART1");
  172. rt_hw_interrupt_mask(IRQ_UARTINT1);
  173. UART1->ier = 0x05;
  174. }
  175. /**
  176. * This function will handle init uart
  177. */
  178. int rt_hw_uart_init(void)
  179. {
  180. davinci_serial_dev0.ops = &davinci_uart_ops;
  181. //davinci_serial_dev0.config = RT_SERIAL_CONFIG_DEFAULT;
  182. davinci_serial_dev0.config.baud_rate = BAUD_RATE_115200;
  183. davinci_serial_dev0.config.bit_order = BIT_ORDER_LSB;
  184. davinci_serial_dev0.config.data_bits = DATA_BITS_8;
  185. davinci_serial_dev0.config.parity = PARITY_NONE;
  186. davinci_serial_dev0.config.stop_bits = STOP_BITS_1;
  187. davinci_serial_dev0.config.invert = NRZ_NORMAL;
  188. davinci_serial_dev0.config.bufsz = RT_SERIAL_RB_BUFSZ;
  189. /* register vcom device */
  190. rt_hw_serial_register(&davinci_serial_dev0, "uart0",
  191. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  192. UART0);
  193. davinci_uart0_init();
  194. davinci_serial_dev1.ops = &davinci_uart_ops;
  195. //davinci_serial_dev1.config = RT_SERIAL_CONFIG_DEFAULT;
  196. davinci_serial_dev1.config.baud_rate = BAUD_RATE_115200;
  197. davinci_serial_dev1.config.bit_order = BIT_ORDER_LSB;
  198. davinci_serial_dev1.config.data_bits = DATA_BITS_8;
  199. davinci_serial_dev1.config.parity = PARITY_NONE;
  200. davinci_serial_dev1.config.stop_bits = STOP_BITS_1;
  201. davinci_serial_dev1.config.invert = NRZ_NORMAL;
  202. davinci_serial_dev1.config.bufsz = RT_SERIAL_RB_BUFSZ;
  203. /* register vcom device */
  204. rt_hw_serial_register(&davinci_serial_dev1, "uart1",
  205. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  206. UART1);
  207. davinci_uart1_init();
  208. return 0;
  209. }
  210. INIT_BOARD_EXPORT(rt_hw_uart_init);