context_rvds.S 4.8 KB

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  1. ;/*
  2. ; * File : context.S
  3. ; * This file is part of RT-Thread RTOS
  4. ; * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. ; *
  6. ; * The license and distribution terms for this file may be
  7. ; * found in the file LICENSE in this distribution or at
  8. ; * http://www.rt-thread.org/license/LICENSE
  9. ; *
  10. ; * Change Logs:
  11. ; * Date Author Notes
  12. ; * 2009-01-17 Bernard first version
  13. ; */
  14. ;/**
  15. ; * @addtogroup STM32
  16. ; */
  17. ;/*@{*/
  18. NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
  19. NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
  20. NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
  21. NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
  22. AREA |.text|, CODE, READONLY, ALIGN=2
  23. THUMB
  24. REQUIRE8
  25. PRESERVE8
  26. IMPORT rt_thread_switch_interrput_flag
  27. IMPORT rt_interrupt_from_thread
  28. IMPORT rt_interrupt_to_thread
  29. ;/*
  30. ; * rt_base_t rt_hw_interrupt_disable();
  31. ; */
  32. rt_hw_interrupt_disable PROC
  33. EXPORT rt_hw_interrupt_disable
  34. MRS r0, PRIMASK
  35. CPSID I
  36. BX LR
  37. ENDP
  38. ;/*
  39. ; * void rt_hw_interrupt_enable(rt_base_t level);
  40. ; */
  41. rt_hw_interrupt_enable PROC
  42. EXPORT rt_hw_interrupt_enable
  43. MSR PRIMASK, r0
  44. BX LR
  45. ENDP
  46. ;/*
  47. ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
  48. ; * r0 --> from
  49. ; * r1 --> to
  50. ; */
  51. rt_hw_context_switch PROC
  52. EXPORT rt_hw_context_switch
  53. ; set rt_thread_switch_interrput_flag to 1
  54. LDR r2, =rt_thread_switch_interrput_flag
  55. LDR r3, [r2]
  56. MOV r3, #1
  57. STR r3, [r2]
  58. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  59. STR r0, [r2]
  60. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  61. STR r1, [r2]
  62. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  63. LDR r1, =NVIC_PENDSVSET
  64. STR r1, [r0]
  65. ; CPSIE I ; enable interrupts at processor level
  66. BX LR
  67. ENDP
  68. ; r0 --> swith from thread stack
  69. ; r1 --> swith to thread stack
  70. ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
  71. rt_hw_pend_sv PROC
  72. EXPORT rt_hw_pend_sv
  73. ; disable interrupt to protect context switch
  74. MRS r2, PRIMASK
  75. CPSID I
  76. ; clear rt_thread_switch_interrput_flag to 0
  77. LDR r0, =rt_thread_switch_interrput_flag
  78. MOV r1, #0x00
  79. STR r1, [r0]
  80. LDR r0, =rt_interrupt_from_thread
  81. LDR r1, [r0]
  82. CBZ r1, swtich_to_thread ; skip register save at the first time
  83. MRS r1, psp ; get from thread stack pointer
  84. STMFD r1!, {r4 - r11} ; push r4 - r11 register
  85. LDR r0, [r0]
  86. STR r1, [r0] ; update from thread stack pointer
  87. swtich_to_thread
  88. LDR r1, =rt_interrupt_to_thread
  89. LDR r1, [r1]
  90. LDR r1, [r1] ; load thread stack pointer
  91. LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
  92. MSR psp, r1 ; update stack pointer
  93. ; restore interrupt
  94. MSR PRIMASK, r2
  95. ORR lr, lr, #0x04
  96. BX lr
  97. ENDP
  98. ;/*
  99. ; * void rt_hw_context_switch_to(rt_uint32 to);
  100. ; * r0 --> to
  101. ; */
  102. rt_hw_context_switch_to PROC
  103. EXPORT rt_hw_context_switch_to
  104. LDR r1, =rt_interrupt_to_thread
  105. STR r0, [r1]
  106. ; set from thread to 0
  107. LDR r1, =rt_interrupt_from_thread
  108. MOV r0, #0x0
  109. STR r0, [r1]
  110. ; set the PendSV exception priority
  111. LDR r0, =NVIC_SYSPRI2
  112. LDR r1, =NVIC_PENDSV_PRI
  113. STR r1, [r0]
  114. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  115. LDR r1, =NVIC_PENDSVSET
  116. STR r1, [r0]
  117. CPSIE I ; enable interrupts at processor level
  118. ; never reach here!
  119. ENDP
  120. ;/*
  121. ; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)
  122. ; * {
  123. ; * if (rt_thread_switch_interrput_flag == 1)
  124. ; * {
  125. ; * rt_interrupt_to_thread = to;
  126. ; * }
  127. ; * else
  128. ; * {
  129. ; * rt_thread_switch_interrput_flag = 1;
  130. ; * rt_interrupt_from_thread = from;
  131. ; * rt_interrupt_to_thread = to;
  132. ; * }
  133. ; * }
  134. ; */
  135. rt_hw_context_switch_interrupt PROC
  136. EXPORT rt_hw_context_switch_interrupt
  137. LDR r2, =rt_thread_switch_interrput_flag
  138. LDR r3, [r2]
  139. CMP r3, #1
  140. BEQ _reswitch
  141. MOV r3, #1 ; set rt_thread_switch_interrput_flag to 1
  142. STR r3, [r2]
  143. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  144. STR r0, [r2]
  145. _reswitch
  146. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  147. STR r1, [r2]
  148. BX lr
  149. ENDP
  150. rt_hw_interrupt_thread_switch PROC
  151. EXPORT rt_hw_interrupt_thread_switch
  152. LDR r0, =rt_thread_switch_interrput_flag
  153. LDR r1, [r0]
  154. CBZ r1, _no_switch
  155. ; clear rt_thread_switch_interrput_flag to 0
  156. ; MOV r1, #0x00
  157. ; STR r1, [r0]
  158. ; trigger context switch
  159. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  160. LDR r1, =NVIC_PENDSVSET
  161. STR r1, [r0]
  162. _no_switch
  163. BX lr
  164. ENDP
  165. END