drv_iic.c 20 KB

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  1. /***************************************************************************//**
  2. * @file drv_iic.c
  3. * @brief Serial API of RT-Thread RTOS for EFM32
  4. * COPYRIGHT (C) 2011, RT-Thread Development Team
  5. * @author onelife
  6. * @version 0.4 beta
  7. *******************************************************************************
  8. * @section License
  9. * The license and distribution terms for this file may be found in the file
  10. * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  11. *******************************************************************************
  12. * @section Change Logs
  13. * Date Author Notes
  14. * 2011-01-06 onelife Initial creation for EFM32
  15. * 2011-06-17 onelife Modify init function for EFM32 library v2.0.0
  16. * upgrading
  17. * 2011-07-11 onelife Add lock (semaphore) to prevent simultaneously
  18. * access
  19. * 2011-08-04 onelife Change the usage of the second parameter of Read
  20. * and Write functions from (seldom used) "Offset" to "Slave address"
  21. * 2011-08-04 onelife Add a timer to prevent from forever waiting
  22. * 2011-11-29 onelife Modify init function for EFM32 library v2.2.2
  23. * upgrading
  24. * 2011-12-27 onelife Utilize "I2C_PRESENT" and "I2C_COUNT"
  25. ******************************************************************************/
  26. /***************************************************************************//**
  27. * @addtogroup efm32
  28. * @{
  29. ******************************************************************************/
  30. /* Includes ------------------------------------------------------------------*/
  31. #include "board.h"
  32. #include "hdl_interrupt.h"
  33. #include "drv_iic.h"
  34. #if (defined(RT_USING_IIC0) || defined(RT_USING_IIC1))
  35. #if !defined(I2C_PRESENT)
  36. #error "IIC module is not available"
  37. #endif
  38. /* Private typedef -----------------------------------------------------------*/
  39. struct efm32_iic_block
  40. {
  41. struct rt_device device;
  42. struct rt_semaphore lock;
  43. struct rt_timer timer;
  44. };
  45. /* Private define ------------------------------------------------------------*/
  46. /* Private macro -------------------------------------------------------------*/
  47. #ifdef RT_IIC_DEBUG
  48. #define iic_debug(format,args...) rt_kprintf(format, ##args)
  49. #else
  50. #define iic_debug(format,args...)
  51. #endif
  52. /* Private variables ---------------------------------------------------------*/
  53. #ifdef RT_USING_IIC0
  54. #if (RT_USING_IIC0 > EFM32_IIC_LOCATION_COUNT)
  55. #error "Wrong location number"
  56. #endif
  57. static struct efm32_iic_block iic0;
  58. #endif
  59. #ifdef RT_USING_IIC1
  60. #if (I2C_COUNT <= 1)
  61. #error "Wrong unit number"
  62. #endif
  63. #if (RT_USING_IIC1 > EFM32_IIC_LOCATION_COUNT)
  64. #error "Wrong location number"
  65. #endif
  66. static struct efm32_iic_block iic1;
  67. #endif
  68. /* Private function prototypes -----------------------------------------------*/
  69. /* Private functions ---------------------------------------------------------*/
  70. /***************************************************************************//**
  71. * @brief
  72. * Initialize IIC device
  73. *
  74. * @details
  75. *
  76. * @note
  77. *
  78. * @param[in] dev
  79. * Pointer to device descriptor
  80. *
  81. * @return
  82. * Error code
  83. ******************************************************************************/
  84. static rt_err_t rt_iic_init (rt_device_t dev)
  85. {
  86. struct efm32_iic_device_t* iic;
  87. iic = (struct efm32_iic_device_t*)dev->user_data;
  88. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  89. {
  90. /* Enable IIC */
  91. I2C_Enable(iic->iic_device, true);
  92. iic->rx_buffer = RT_NULL;
  93. iic->state = 0;
  94. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  95. }
  96. return RT_EOK;
  97. }
  98. /***************************************************************************//**
  99. * @brief
  100. * Open IIC device
  101. *
  102. * @details
  103. *
  104. * @note
  105. *
  106. * @param[in] dev
  107. * Pointer to device descriptor
  108. *
  109. * @param[in] oflag
  110. * Device open flag
  111. *
  112. * @return
  113. * Error code
  114. ******************************************************************************/
  115. static rt_err_t rt_iic_open(rt_device_t dev, rt_uint16_t oflag)
  116. {
  117. RT_ASSERT(dev != RT_NULL);
  118. struct efm32_iic_device_t *iic;
  119. iic = (struct efm32_iic_device_t *)(dev->user_data);
  120. iic->counter++;
  121. iic_debug("IIC: Open with flag %x\n", oflag);
  122. return RT_EOK;
  123. }
  124. /***************************************************************************//**
  125. * @brief
  126. * Close IIC device
  127. *
  128. * @details
  129. *
  130. * @note
  131. *
  132. * @param[in] dev
  133. * Pointer to device descriptor
  134. *
  135. * @return
  136. * Error code
  137. ******************************************************************************/
  138. static rt_err_t rt_iic_close(rt_device_t dev)
  139. {
  140. RT_ASSERT(dev != RT_NULL);
  141. struct efm32_iic_device_t *iic;
  142. iic = (struct efm32_iic_device_t *)(dev->user_data);
  143. if (--iic->counter == 0)
  144. {
  145. rt_free(iic->rx_buffer->data_ptr);
  146. rt_free(iic->rx_buffer);
  147. iic->rx_buffer = RT_NULL;
  148. }
  149. return RT_EOK;
  150. }
  151. /***************************************************************************//**
  152. * @brief
  153. * Read from IIC device
  154. *
  155. * @details
  156. *
  157. * @note
  158. *
  159. * @param[in] dev
  160. * Pointer to device descriptor
  161. *
  162. * @param[in] pos
  163. * Slave address
  164. *
  165. * @param[in] buffer
  166. * Poniter to the buffer
  167. *
  168. * @param[in] size
  169. * Buffer size in byte
  170. *
  171. * @return
  172. * Error code
  173. ******************************************************************************/
  174. static rt_size_t rt_iic_read (
  175. rt_device_t dev,
  176. rt_off_t pos,
  177. void* buffer,
  178. rt_size_t size)
  179. {
  180. rt_err_t err_code;
  181. rt_size_t read_size;
  182. struct efm32_iic_device_t* iic;
  183. I2C_TransferSeq_TypeDef seq;
  184. I2C_TransferReturn_TypeDef ret;
  185. if (!size)
  186. {
  187. return 0;
  188. }
  189. err_code = RT_EOK;
  190. read_size = 0;
  191. iic = (struct efm32_iic_device_t*)dev->user_data;
  192. /* Lock device */
  193. if (rt_hw_interrupt_check())
  194. {
  195. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  196. }
  197. else
  198. {
  199. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  200. }
  201. if (ret != RT_EOK)
  202. {
  203. return ret;
  204. }
  205. if (iic->state & IIC_STATE_MASTER)
  206. {
  207. seq.addr = (rt_uint16_t)pos << 1;
  208. seq.flags = I2C_FLAG_WRITE_READ;
  209. /* Set register to be read */
  210. seq.buf[0].data = (rt_uint8_t *)buffer;
  211. seq.buf[0].len = 1;
  212. /* Set read buffer pointer and size */
  213. seq.buf[1].data = (rt_uint8_t *)buffer;
  214. seq.buf[1].len = size;
  215. /* Do a polled transfer */
  216. iic->timeout = false;
  217. rt_timer_stop(iic->timer);
  218. rt_timer_start(iic->timer);
  219. ret = I2C_TransferInit(iic->iic_device, &seq);
  220. while ((ret == i2cTransferInProgress) && !iic->timeout)
  221. {
  222. ret = I2C_Transfer(iic->iic_device);
  223. }
  224. if (ret != i2cTransferDone)
  225. {
  226. iic_debug("IIC: read error %x\n", ret);
  227. iic_debug("IIC: read address %x\n", seq.addr);
  228. iic_debug("IIC: read data0 %x -> %x\n", seq.buf[0].data, *seq.buf[0].data);
  229. iic_debug("IIC: read len0 %x\n", seq.buf[0].len);
  230. iic_debug("IIC: read data1 %x -> %x\n", seq.buf[1].data, *seq.buf[1].data);
  231. iic_debug("IIC: read len1 %x\n", seq.buf[1].len);
  232. err_code = (rt_err_t)ret;
  233. }
  234. else
  235. {
  236. read_size = size;
  237. iic_debug("IIC: read size %d\n", read_size);
  238. }
  239. }
  240. else
  241. {
  242. rt_uint8_t* ptr;
  243. ptr = buffer;
  244. /* interrupt mode Rx */
  245. while (size)
  246. {
  247. rt_base_t level;
  248. struct efm32_iic_int_mode_t *int_rx;
  249. int_rx = iic->rx_buffer;
  250. /* disable interrupt */
  251. level = rt_hw_interrupt_disable();
  252. if (int_rx->read_index != int_rx->save_index)
  253. {
  254. /* read a character */
  255. *ptr++ = int_rx->data_ptr[int_rx->read_index];
  256. size--;
  257. /* move to next position */
  258. int_rx->read_index ++;
  259. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  260. {
  261. int_rx->read_index = 0;
  262. }
  263. }
  264. else
  265. {
  266. /* set error code */
  267. err_code = -RT_EEMPTY;
  268. /* enable interrupt */
  269. rt_hw_interrupt_enable(level);
  270. break;
  271. }
  272. /* enable interrupt */
  273. rt_hw_interrupt_enable(level);
  274. }
  275. read_size = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  276. iic_debug("IIC: slave read size %d\n", read_size);
  277. }
  278. /* Unlock device */
  279. rt_sem_release(iic->lock);
  280. /* set error code */
  281. rt_set_errno(err_code);
  282. return read_size;
  283. }
  284. /***************************************************************************//**
  285. * @brief
  286. * Write to IIC device
  287. *
  288. * @details
  289. *
  290. * @note
  291. *
  292. * @param[in] dev
  293. * Pointer to device descriptor
  294. *
  295. * @param[in] pos
  296. * Slave address
  297. *
  298. * @param[in] buffer
  299. * Poniter to the buffer
  300. *
  301. * @param[in] size
  302. * Buffer size in byte
  303. *
  304. * @return
  305. * Error code
  306. ******************************************************************************/
  307. static rt_size_t rt_iic_write (
  308. rt_device_t dev,
  309. rt_off_t pos,
  310. const void* buffer,
  311. rt_size_t size)
  312. {
  313. rt_err_t err_code;
  314. rt_size_t write_size;
  315. struct efm32_iic_device_t* iic;
  316. I2C_TransferSeq_TypeDef seq;
  317. I2C_TransferReturn_TypeDef ret;
  318. if (!size)
  319. {
  320. return 0;
  321. }
  322. err_code = RT_EOK;
  323. write_size = 0;
  324. iic = (struct efm32_iic_device_t*)dev->user_data;
  325. /* Lock device */
  326. if (rt_hw_interrupt_check())
  327. {
  328. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  329. }
  330. else
  331. {
  332. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  333. }
  334. if (ret != RT_EOK)
  335. {
  336. return ret;
  337. }
  338. if (iic->state & IIC_STATE_MASTER)
  339. {
  340. seq.addr = (rt_uint16_t)pos << 1;
  341. seq.flags = I2C_FLAG_WRITE;
  342. /* Set write buffer pointer and size */
  343. seq.buf[0].data = (rt_uint8_t *)buffer;
  344. seq.buf[0].len = size;
  345. }
  346. else
  347. {
  348. // TODO: Slave mode TX
  349. }
  350. /* Do a polled transfer */
  351. iic->timeout = false;
  352. rt_timer_stop(iic->timer);
  353. rt_timer_start(iic->timer);
  354. ret = I2C_TransferInit(iic->iic_device, &seq);
  355. while ((ret == i2cTransferInProgress) && !iic->timeout)
  356. {
  357. ret = I2C_Transfer(iic->iic_device);
  358. }
  359. if (ret != i2cTransferDone)
  360. {
  361. err_code = (rt_err_t)ret;
  362. }
  363. else
  364. {
  365. write_size = size;
  366. }
  367. /* Unlock device */
  368. rt_sem_release(iic->lock);
  369. /* set error code */
  370. rt_set_errno(err_code);
  371. return write_size;
  372. }
  373. /***************************************************************************//**
  374. * @brief
  375. * Configure IIC device
  376. *
  377. * @details
  378. *
  379. * @note
  380. *
  381. * @param[in] dev
  382. * Pointer to device descriptor
  383. *
  384. * @param[in] cmd
  385. * IIC control command
  386. *
  387. * @param[in] args
  388. * Arguments
  389. *
  390. * @return
  391. * Error code
  392. ******************************************************************************/
  393. static rt_err_t rt_iic_control (
  394. rt_device_t dev,
  395. rt_uint8_t cmd,
  396. void *args)
  397. {
  398. RT_ASSERT(dev != RT_NULL);
  399. rt_err_t ret;
  400. struct efm32_iic_device_t *iic;
  401. iic = (struct efm32_iic_device_t*)dev->user_data;
  402. /* Lock device */
  403. if (rt_hw_interrupt_check())
  404. {
  405. ret = rt_sem_take(iic->lock, RT_WAITING_NO);
  406. }
  407. else
  408. {
  409. ret = rt_sem_take(iic->lock, RT_WAITING_FOREVER);
  410. }
  411. if (ret != RT_EOK)
  412. {
  413. return ret;
  414. }
  415. switch (cmd)
  416. {
  417. case RT_DEVICE_CTRL_SUSPEND:
  418. /* suspend device */
  419. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  420. I2C_Enable(iic->iic_device, false);
  421. break;
  422. case RT_DEVICE_CTRL_RESUME:
  423. /* resume device */
  424. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  425. I2C_Enable(iic->iic_device, true);
  426. break;
  427. case RT_DEVICE_CTRL_IIC_SETTING:
  428. {
  429. /* change device setting */
  430. struct efm32_iic_control_t *control;
  431. control = (struct efm32_iic_control_t *)args;
  432. iic->state = control->config & (IIC_STATE_MASTER | IIC_STATE_BROADCAST);
  433. iic->address = control->address << 1;
  434. if (!(iic->state & IIC_STATE_MASTER))
  435. {
  436. if (iic->rx_buffer == RT_NULL)
  437. {
  438. iic->rx_buffer = rt_malloc(sizeof(struct efm32_iic_int_mode_t));
  439. if (iic->rx_buffer == RT_NULL)
  440. {
  441. iic_debug("IIC err: no MEM for IIC RX structure\n");
  442. return -RT_ENOMEM;
  443. }
  444. /* Allocate RX buffer */
  445. if ((iic->rx_buffer->data_ptr = \
  446. rt_malloc(IIC_RX_BUFFER_SIZE)) == RT_NULL)
  447. {
  448. iic_debug("IIC err: no MEM for IIC RX buffer\n");
  449. rt_free(iic->rx_buffer);
  450. return -RT_ENOMEM;
  451. }
  452. rt_memset(iic->rx_buffer->data_ptr, 0, IIC_RX_BUFFER_SIZE);
  453. iic->rx_buffer->data_size = IIC_RX_BUFFER_SIZE;
  454. iic->rx_buffer->read_index = 0;
  455. iic->rx_buffer->save_index = 0;
  456. }
  457. /* Enable slave mode */
  458. I2C_SlaveAddressSet(iic->iic_device, iic->address);
  459. I2C_SlaveAddressMaskSet(iic->iic_device, 0xFF);
  460. iic->iic_device->CTRL |= I2C_CTRL_SLAVE | I2C_CTRL_AUTOACK | I2C_CTRL_AUTOSN;
  461. /* Enable interrupts */
  462. I2C_IntEnable(iic->iic_device, I2C_IEN_ADDR | I2C_IEN_RXDATAV | I2C_IEN_SSTOP);
  463. I2C_IntClear(iic->iic_device, _I2C_IFC_MASK);
  464. /* Enable I2Cn interrupt vector in NVIC */
  465. if (dev == &iic0.device)
  466. {
  467. NVIC_ClearPendingIRQ(I2C0_IRQn);
  468. NVIC_SetPriority(I2C0_IRQn, EFM32_IRQ_PRI_DEFAULT);
  469. NVIC_EnableIRQ(I2C0_IRQn);
  470. }
  471. #if (I2C_COUNT > 1)
  472. if (dev == &iic1.device)
  473. {
  474. NVIC_ClearPendingIRQ(I2C1_IRQn);
  475. NVIC_SetPriority(I2C1_IRQn, EFM32_IRQ_PRI_DEFAULT);
  476. NVIC_EnableIRQ(I2C1_IRQn);
  477. }
  478. #endif
  479. }
  480. }
  481. break;
  482. }
  483. /* Unlock device */
  484. rt_sem_release(iic->lock);
  485. return RT_EOK;
  486. }
  487. /***************************************************************************//**
  488. * @brief
  489. * IIC timeout interrupt handler
  490. *
  491. * @details
  492. *
  493. * @note
  494. *
  495. * @param[in] parameter
  496. * Parameter
  497. ******************************************************************************/
  498. static void rt_iic_timer(void *timeout)
  499. {
  500. *(rt_bool_t *)timeout = true;
  501. }
  502. /***************************************************************************//**
  503. * @brief
  504. * Register IIC device
  505. *
  506. * @details
  507. *
  508. * @note
  509. *
  510. * @param[in] device
  511. * Pointer to device descriptor
  512. *
  513. * @param[in] name
  514. * Device name
  515. *
  516. * @param[in] flag
  517. * Configuration flags
  518. *
  519. * @param[in] iic
  520. * Pointer to IIC device descriptor
  521. *
  522. * @return
  523. * Error code
  524. ******************************************************************************/
  525. rt_err_t rt_hw_iic_register(
  526. rt_device_t device,
  527. const char *name,
  528. rt_uint32_t flag,
  529. struct efm32_iic_device_t *iic)
  530. {
  531. RT_ASSERT(device != RT_NULL);
  532. if ((flag & RT_DEVICE_FLAG_DMA_TX) || (flag & RT_DEVICE_FLAG_DMA_RX) ||
  533. (flag & RT_DEVICE_FLAG_INT_TX))
  534. {
  535. RT_ASSERT(0);
  536. }
  537. device->type = RT_Device_Class_I2C;
  538. device->rx_indicate = RT_NULL;
  539. device->tx_complete = RT_NULL;
  540. device->init = rt_iic_init;
  541. device->open = rt_iic_open;
  542. device->close = rt_iic_close;
  543. device->read = rt_iic_read;
  544. device->write = rt_iic_write;
  545. device->control = rt_iic_control;
  546. device->user_data = iic;
  547. /* register a character device */
  548. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  549. }
  550. /***************************************************************************//**
  551. * @brief
  552. * IIC slave mode RX data valid interrupt handler
  553. *
  554. * @details
  555. *
  556. * @note
  557. *
  558. * @param[in] dev
  559. * Pointer to device descriptor
  560. ******************************************************************************/
  561. static void rt_hw_iic_slave_isr(rt_device_t dev)
  562. {
  563. struct efm32_iic_device_t *iic;
  564. struct efm32_iic_int_mode_t *int_rx;
  565. rt_uint32_t status;
  566. volatile rt_uint32_t temp;
  567. /* interrupt mode receive */
  568. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
  569. iic = (struct efm32_iic_device_t*)dev->user_data;
  570. int_rx = iic->rx_buffer;
  571. status = iic->iic_device->IF;
  572. if (status & I2C_IF_ADDR)
  573. {
  574. /* Address Match */
  575. /* Indicating that reception is started */
  576. temp = iic->iic_device->RXDATA & 0xFFUL;
  577. if ((temp != 0x00) || (iic->state & IIC_STATE_BROADCAST))
  578. {
  579. iic->state |= IIC_STATE_RX_BUSY;
  580. }
  581. }
  582. else if (status & I2C_IF_RXDATAV)
  583. {
  584. if (iic->state & IIC_STATE_RX_BUSY)
  585. {
  586. rt_base_t level;
  587. /* disable interrupt */
  588. level = rt_hw_interrupt_disable();
  589. /* save character */
  590. int_rx->data_ptr[int_rx->save_index] = \
  591. (rt_uint8_t)(iic->iic_device->RXDATA & 0xFFUL);
  592. int_rx->save_index ++;
  593. if (int_rx->save_index >= IIC_RX_BUFFER_SIZE)
  594. int_rx->save_index = 0;
  595. /* if the next position is read index, discard this 'read char' */
  596. if (int_rx->save_index == int_rx->read_index)
  597. {
  598. int_rx->read_index ++;
  599. if (int_rx->read_index >= IIC_RX_BUFFER_SIZE)
  600. {
  601. int_rx->read_index = 0;
  602. }
  603. }
  604. /* enable interrupt */
  605. rt_hw_interrupt_enable(level);
  606. }
  607. else
  608. {
  609. temp = iic->iic_device->RXDATA;
  610. }
  611. }
  612. if(status & I2C_IF_SSTOP)
  613. {
  614. /* Stop received, reception is ended */
  615. iic->state &= ~(rt_uint8_t)IIC_STATE_RX_BUSY;
  616. }
  617. }
  618. /***************************************************************************//**
  619. * @brief
  620. * Initialize the specified IIC unit
  621. *
  622. * @details
  623. *
  624. * @note
  625. *
  626. * @param[in] unitNumber
  627. * Unit number
  628. *
  629. * @param[in] location
  630. * Pin location number
  631. ******************************************************************************/
  632. static struct efm32_iic_device_t *rt_hw_iic_unit_init(
  633. struct efm32_iic_block *block,
  634. rt_uint8_t unitNumber,
  635. rt_uint8_t location)
  636. {
  637. struct efm32_iic_device_t *iic;
  638. CMU_Clock_TypeDef iicClock;
  639. GPIO_Port_TypeDef port_scl, port_sda;
  640. rt_uint32_t pin_scl, pin_sda;
  641. I2C_Init_TypeDef init = I2C_INIT_DEFAULT;
  642. efm32_irq_hook_init_t hook;
  643. rt_uint8_t name[RT_NAME_MAX];
  644. do
  645. {
  646. /* Allocate device */
  647. iic = rt_malloc(sizeof(struct efm32_iic_device_t));
  648. if (iic == RT_NULL)
  649. {
  650. iic_debug("IIC err: no MEM for IIC%d driver\n", unitNumber);
  651. break;
  652. }
  653. iic->counter = 0;
  654. iic->timer = &block->timer;
  655. iic->timeout = false;
  656. iic->state |= IIC_STATE_MASTER;
  657. iic->address = 0x0000;
  658. iic->rx_buffer = RT_NULL;
  659. /* Initialization */
  660. if (unitNumber >= I2C_COUNT)
  661. {
  662. break;
  663. }
  664. switch (unitNumber)
  665. {
  666. case 0:
  667. iic->iic_device = I2C0;
  668. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C0;
  669. port_scl = AF_I2C0_SCL_PORT(location);
  670. pin_scl = AF_I2C0_SCL_PIN(location);
  671. port_sda = AF_I2C0_SDA_PORT(location);
  672. pin_sda = AF_I2C0_SDA_PIN(location);
  673. break;
  674. #if (I2C_COUNT > 1)
  675. case 1:
  676. iic->iic_device = I2C1;
  677. iicClock = (CMU_Clock_TypeDef)cmuClock_I2C1;
  678. port_scl = AF_I2C1_SCL_PORT(location);
  679. pin_scl = AF_I2C1_SCL_PIN(location);
  680. port_sda = AF_I2C1_SDA_PORT(location);
  681. pin_sda = AF_I2C1_SDA_PIN(location);
  682. break;
  683. #endif
  684. default:
  685. break;
  686. }
  687. rt_sprintf(name, "iic%d", unitNumber);
  688. /* Enabling clock */
  689. CMU_ClockEnable(iicClock, true);
  690. /* Reset */
  691. I2C_Reset(iic->iic_device);
  692. /* Config GPIO */
  693. GPIO_PinModeSet(
  694. port_scl,
  695. pin_scl,
  696. gpioModeWiredAndPullUpFilter,
  697. 1);
  698. GPIO_PinModeSet(
  699. port_sda,
  700. pin_sda,
  701. gpioModeWiredAndPullUpFilter,
  702. 1);
  703. hook.type = efm32_irq_type_iic;
  704. hook.unit = unitNumber;
  705. hook.cbFunc = rt_hw_iic_slave_isr;
  706. hook.userPtr = (void *)&block->device;
  707. efm32_irq_hook_register(&hook);
  708. /* Enable SDZ and SCL pins and set location */
  709. iic->iic_device->ROUTE = I2C_ROUTE_SDAPEN | I2C_ROUTE_SCLPEN | \
  710. (location << _I2C_ROUTE_LOCATION_SHIFT);
  711. /* Initializing IIC */
  712. init.enable = false;
  713. I2C_Init(iic->iic_device, &init);
  714. /* Abort current TX data and clear TX buffers */
  715. iic->iic_device->CMD = I2C_CMD_ABORT | I2C_CMD_CLEARPC | I2C_CMD_CLEARTX;
  716. /* Initialize lock */
  717. iic->lock = &block->lock;
  718. if (rt_sem_init(iic->lock, name, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  719. {
  720. break;
  721. }
  722. /* Initialize timer */
  723. rt_timer_init(iic->timer, name, rt_iic_timer, &iic->timeout,
  724. IIC_TIMEOUT_PERIOD, RT_TIMER_FLAG_ONE_SHOT);
  725. return iic;
  726. } while(0);
  727. if (iic)
  728. {
  729. rt_free(iic);
  730. }
  731. iic_debug("IIC err: Unit %d init failed!\n", unitNumber);
  732. return RT_NULL;
  733. }
  734. /***************************************************************************//**
  735. * @brief
  736. * Initialize all IIC module related hardware and register IIC device to kernel
  737. *
  738. * @details
  739. *
  740. * @note
  741. ******************************************************************************/
  742. void rt_hw_iic_init(void)
  743. {
  744. struct efm32_iic_device_t *iic;
  745. rt_uint32_t flag;
  746. do
  747. {
  748. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  749. /* Initialize and register iic0 */
  750. if ((iic = rt_hw_iic_unit_init(&iic0, 0, RT_USING_IIC0)) != RT_NULL)
  751. {
  752. rt_hw_iic_register(&iic0.device, RT_IIC0_NAME, flag, iic);
  753. }
  754. else
  755. {
  756. break;
  757. }
  758. #if (I2C_COUNT > 1)
  759. /* Initialize and register iic1 */
  760. if ((iic = rt_hw_iic_unit_init(&iic1, 1, RT_USING_IIC1)) != RT_NULL)
  761. {
  762. rt_hw_iic_register(&iic1.device, RT_IIC1_NAME, flag, iic);
  763. }
  764. else
  765. {
  766. break;
  767. }
  768. #endif
  769. iic_debug("IIC: H/W init OK!\n");
  770. return;
  771. } while (0);
  772. rt_kprintf("IIC: H/W init failed!\n");
  773. }
  774. #endif /* (defined(RT_USING_IIC0) || defined(RT_USING_IIC1)) */
  775. /***************************************************************************//**
  776. * @}
  777. ******************************************************************************/