usart.c 9.0 KB

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  1. /*
  2. * File : usart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-01-05 Bernard the first version
  13. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  14. */
  15. #include "stm32f4xx.h"
  16. #include "usart.h"
  17. #include "board.h"
  18. #include <serial.h>
  19. /*
  20. * Use UART1 as console output and finsh input
  21. * interrupt Rx and poll Tx (stream mode)
  22. *
  23. * Use UART2 with interrupt Rx and poll Tx
  24. * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
  25. *
  26. * USART DMA setting on STM32
  27. * USART1 Tx --> DMA Channel 4
  28. * USART1 Rx --> DMA Channel 5
  29. * USART2 Tx --> DMA Channel 7
  30. * USART2 Rx --> DMA Channel 6
  31. * USART3 Tx --> DMA Channel 2
  32. * USART3 Rx --> DMA Channel 3
  33. */
  34. #ifdef RT_USING_UART1
  35. struct stm32_serial_int_rx uart1_int_rx;
  36. struct stm32_serial_device uart1 =
  37. {
  38. USART1,
  39. &uart1_int_rx,
  40. RT_NULL
  41. };
  42. struct rt_device uart1_device;
  43. #endif
  44. #ifdef RT_USING_UART2
  45. struct stm32_serial_int_rx uart2_int_rx;
  46. struct stm32_serial_device uart2 =
  47. {
  48. USART2,
  49. &uart2_int_rx,
  50. RT_NULL
  51. };
  52. struct rt_device uart2_device;
  53. #endif
  54. #ifdef RT_USING_UART3
  55. struct stm32_serial_int_rx uart3_int_rx;
  56. struct stm32_serial_dma_tx uart3_dma_tx;
  57. struct stm32_serial_device uart3 =
  58. {
  59. USART3,
  60. &uart3_int_rx,
  61. &uart3_dma_tx
  62. };
  63. struct rt_device uart3_device;
  64. #endif
  65. #define USART1_DR_Base 0x40013804
  66. #define USART2_DR_Base 0x40004404
  67. #define USART3_DR_Base 0x40004804
  68. /* USART1_REMAP = 0 */
  69. #define UART1_GPIO_TX GPIO_Pin_9
  70. #define UART1_GPIO_RX GPIO_Pin_10
  71. #define UART1_GPIO GPIOA
  72. #define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
  73. #define UART1_TX_DMA DMA1_Channel4
  74. #define UART1_RX_DMA DMA1_Channel5
  75. #define UART2_GPIO_TX GPIO_Pin_2
  76. #define UART2_GPIO_RX GPIO_Pin_3
  77. #define UART2_GPIO GPIOA
  78. #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
  79. /* USART3_REMAP[1:0] = 00 */
  80. #define UART3_GPIO_RX GPIO_Pin_11
  81. #define UART3_GPIO_TX GPIO_Pin_10
  82. #define UART3_GPIO GPIOB
  83. #define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
  84. #define UART3_TX_DMA DMA1_Channel2
  85. #define UART3_RX_DMA DMA1_Channel3
  86. static void RCC_Configuration(void)
  87. {
  88. #ifdef RT_USING_UART1
  89. /* Enable USART1 and GPIOA clocks */
  90. RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
  91. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
  92. #endif
  93. #ifdef RT_USING_UART2
  94. /* Enable USART2 and GPIOA clocks */
  95. RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
  96. /* Enable USART2 clock */
  97. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  98. #endif
  99. #ifdef RT_USING_UART3
  100. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
  101. /* Enable USART3 clock */
  102. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
  103. /* DMA clock enable */
  104. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
  105. #endif
  106. }
  107. static void GPIO_Configuration(void)
  108. {
  109. GPIO_InitTypeDef GPIO_InitStructure;
  110. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
  111. GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
  112. GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
  113. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
  114. #ifdef RT_USING_UART1
  115. /* Configure USART1 Rx (PA.10) as input floating */
  116. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
  117. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  118. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  119. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
  120. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  121. #endif
  122. #ifdef RT_USING_UART2
  123. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX|UART2_GPIO_RX;
  124. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  125. /* Connect alternate function */
  126. GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2);
  127. GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_USART2);
  128. #endif
  129. #ifdef RT_USING_UART3
  130. /* Configure USART3 Rx as input floating */
  131. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
  132. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  133. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  134. /* Configure USART3 Tx as alternate function push-pull */
  135. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
  136. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  137. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  138. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  139. #endif
  140. }
  141. static void NVIC_Configuration(void)
  142. {
  143. NVIC_InitTypeDef NVIC_InitStructure;
  144. #ifdef RT_USING_UART1
  145. /* Enable the USART1 Interrupt */
  146. NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
  147. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  148. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  149. NVIC_Init(&NVIC_InitStructure);
  150. #endif
  151. #ifdef RT_USING_UART2
  152. /* Enable the USART2 Interrupt */
  153. NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
  154. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  155. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  156. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  157. NVIC_Init(&NVIC_InitStructure);
  158. #endif
  159. #ifdef RT_USING_UART3
  160. /* Enable the USART3 Interrupt */
  161. NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
  162. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  163. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  164. NVIC_Init(&NVIC_InitStructure);
  165. /* Enable the DMA1 Channel2 Interrupt */
  166. NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
  167. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  168. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  169. NVIC_Init(&NVIC_InitStructure);
  170. #endif
  171. }
  172. static void DMA_Configuration(void)
  173. {
  174. #if defined (RT_USING_UART3)
  175. DMA_InitTypeDef DMA_InitStructure;
  176. /* fill init structure */
  177. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  178. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  179. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
  180. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
  181. DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
  182. DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
  183. DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  184. /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
  185. DMA_DeInit(UART3_TX_DMA);
  186. DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
  187. DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
  188. DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
  189. DMA_InitStructure.DMA_BufferSize = 0;
  190. DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
  191. DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
  192. DMA_ClearFlag(DMA1_FLAG_TC5);
  193. #endif
  194. }
  195. volatile USART_TypeDef * uart2_debug = USART2;
  196. /*
  197. * Init all related hardware in here
  198. * rt_hw_serial_init() will register all supported USART device
  199. */
  200. void rt_hw_usart_init()
  201. {
  202. USART_InitTypeDef USART_InitStructure;
  203. RCC_Configuration();
  204. GPIO_Configuration();
  205. NVIC_Configuration();
  206. DMA_Configuration();
  207. /* uart init */
  208. #ifdef RT_USING_UART1
  209. USART_InitStructure.USART_BaudRate = 115200;
  210. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  211. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  212. USART_InitStructure.USART_Parity = USART_Parity_No;
  213. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  214. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  215. USART_Init(USART1, &USART_InitStructure);
  216. /* register uart1 */
  217. rt_hw_serial_register(&uart1_device, "uart1",
  218. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  219. &uart1);
  220. /* enable interrupt */
  221. USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
  222. #endif
  223. #ifdef RT_USING_UART2
  224. USART_InitStructure.USART_BaudRate = 115200;
  225. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  226. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  227. USART_InitStructure.USART_Parity = USART_Parity_No;
  228. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  229. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  230. USART_Init(USART2, &USART_InitStructure);
  231. /* register uart2 */
  232. rt_hw_serial_register(&uart2_device, "uart2",
  233. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  234. &uart2);
  235. /* Enable USART2 DMA Rx request */
  236. USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
  237. #endif
  238. #ifdef RT_USING_UART3
  239. USART_InitStructure.USART_BaudRate = 115200;
  240. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  241. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  242. USART_InitStructure.USART_Parity = USART_Parity_No;
  243. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  244. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  245. USART_Init(USART3, &USART_InitStructure);
  246. uart3_dma_tx.dma_channel= UART3_TX_DMA;
  247. /* register uart3 */
  248. rt_hw_serial_register(&uart3_device, "uart3",
  249. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
  250. &uart3);
  251. /* Enable USART3 DMA Tx request */
  252. USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
  253. /* enable interrupt */
  254. USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
  255. #endif
  256. }