drv_uart.c 9.2 KB

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  1. /*
  2. * File : drv_uart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2017, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2018-02-08 RT-Thread the first version
  23. */
  24. #include <rthw.h>
  25. #include <rtthread.h>
  26. #include <rtdevice.h>
  27. #include "drv_uart.h"
  28. #include "interrupt.h"
  29. #include "drv_gpio.h"
  30. #include "drv_clock.h"
  31. #define readl(addr) (*(volatile unsigned int *)(addr))
  32. #define writel(value,addr) (*(volatile unsigned int *)(addr) = (value))
  33. #ifdef RT_USING_SERIAL
  34. struct device_uart
  35. {
  36. rt_uint32_t hw_base;
  37. rt_uint32_t irqno;
  38. char name[RT_NAME_MAX];
  39. rt_uint32_t gpio_rx_port;
  40. rt_uint32_t gpio_tx_port;
  41. rt_uint32_t gpio_rx_pin;
  42. rt_uint32_t gpio_tx_pin;
  43. rt_uint32_t gpio_rx_fun;
  44. rt_uint32_t gpio_tx_fun;
  45. };
  46. static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
  47. static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg);
  48. static int uart_putc(struct rt_serial_device *serial, char c);
  49. static int uart_getc(struct rt_serial_device *serial);
  50. static rt_size_t uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
  51. void uart_irq_handler(int irqno, void *param);
  52. const struct rt_uart_ops _uart_ops =
  53. {
  54. uart_configure,
  55. uart_control,
  56. uart_putc,
  57. uart_getc,
  58. uart_dma_transmit
  59. };
  60. /*
  61. * UART Initiation
  62. */
  63. int rt_hw_uart_init(void)
  64. {
  65. struct rt_serial_device *serial;
  66. struct device_uart *uart;
  67. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  68. #ifdef TINA_USING_UART0
  69. {
  70. static struct rt_serial_device serial0;
  71. static struct device_uart uart0;
  72. serial = &serial0;
  73. uart = &uart0;
  74. serial->ops = &_uart_ops;
  75. serial->config = config;
  76. serial->config.baud_rate = 115200;
  77. uart->hw_base = UART0_BASE_ADDR; // UART0_BASE;
  78. uart->irqno = UART0_INTERRUPT; // IRQ_UART0;
  79. uart->gpio_rx_port = GPIO_PORT_E;
  80. uart->gpio_tx_port = GPIO_PORT_E;
  81. uart->gpio_rx_pin = GPIO_PIN_0;
  82. uart->gpio_tx_pin = GPIO_PIN_1;
  83. uart->gpio_rx_fun = IO_FUN_4;
  84. uart->gpio_tx_fun = IO_FUN_4;
  85. rt_hw_serial_register(serial,
  86. "uart0",
  87. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  88. uart);
  89. }
  90. #endif
  91. #ifdef TINA_USING_UART1
  92. {
  93. static struct rt_serial_device serial1;
  94. static struct device_uart uart1;
  95. serial = &serial1;
  96. uart = &uart1;
  97. serial->ops = &_uart_ops;
  98. serial->config = config;
  99. serial->config.baud_rate = 115200;
  100. uart->hw_base = UART1_BASE_ADDR; // UART1_BASE;
  101. uart->irqno = UART1_INTERRUPT; // IRQ_UART1;
  102. uart->gpio_rx_port = GPIO_PORT_A;
  103. uart->gpio_tx_port = GPIO_PORT_A;
  104. uart->gpio_rx_pin = GPIO_PIN_2;
  105. uart->gpio_tx_pin = GPIO_PIN_3;
  106. uart->gpio_rx_fun = IO_FUN_4;
  107. uart->gpio_tx_fun = IO_FUN_4;
  108. rt_hw_serial_register(serial,
  109. "uart1",
  110. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  111. uart);
  112. }
  113. #endif
  114. #ifdef TINA_USING_UART2
  115. {
  116. static struct rt_serial_device serial2;
  117. static struct device_uart uart2;
  118. serial = &serial2;
  119. uart = &uart2;
  120. serial->ops = &_uart_ops;
  121. serial->config = config;
  122. serial->config.baud_rate = 115200;
  123. uart->hw_base = UART2_BASE_ADDR; // UART1_BASE;
  124. uart->irqno = UART2_INTERRUPT; // IRQ_UART1;
  125. uart->gpio_rx_port = GPIO_PORT_E;
  126. uart->gpio_tx_port = GPIO_PORT_E;
  127. uart->gpio_rx_pin = GPIO_PIN_8;
  128. uart->gpio_tx_pin = GPIO_PIN_7;
  129. uart->gpio_rx_fun = IO_FUN_2;
  130. uart->gpio_tx_fun = IO_FUN_2;
  131. rt_hw_serial_register(serial,
  132. "uart2",
  133. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  134. uart);
  135. }
  136. #endif
  137. return 0;
  138. }
  139. /*
  140. * UART interface
  141. */
  142. static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  143. {
  144. rt_uint32_t addr, val;
  145. struct device_uart *uart;
  146. RT_ASSERT(serial != RT_NULL);
  147. serial->config = *cfg;
  148. uart = serial->parent.user_data;
  149. RT_ASSERT(uart != RT_NULL);
  150. /* config gpio port */
  151. gpio_set_func(uart->gpio_rx_port, uart->gpio_rx_pin, uart->gpio_rx_fun);
  152. gpio_set_func(uart->gpio_tx_port, uart->gpio_tx_pin, uart->gpio_tx_fun);
  153. /* Enable UART clock */
  154. /* Open the clock gate for uart */
  155. if ((rt_uint32_t)(uart->hw_base) == UART0_BASE_ADDR)
  156. {
  157. bus_gate_clk_enalbe(UART0_GATING);
  158. bus_software_reset_enalbe(UART0_GATING);
  159. bus_software_reset_disalbe(UART0_GATING);
  160. }
  161. else if ((rt_uint32_t)(uart->hw_base) == UART1_BASE_ADDR)
  162. {
  163. bus_gate_clk_enalbe(UART1_GATING);
  164. bus_software_reset_enalbe(UART1_GATING);
  165. bus_software_reset_disalbe(UART1_GATING);
  166. }
  167. else if ((rt_uint32_t)(uart->hw_base) == UART2_BASE_ADDR)
  168. {
  169. bus_gate_clk_enalbe(UART2_GATING);
  170. bus_software_reset_enalbe(UART2_GATING);
  171. bus_software_reset_disalbe(UART2_GATING);
  172. }
  173. else
  174. RT_ASSERT(0);
  175. /* Config uart0 to 115200-8-1-0 */
  176. addr = uart->hw_base;
  177. /* close uart irq */
  178. writel(0x0, addr + UART_IER);
  179. /* config fifo */
  180. writel(0x37, addr + UART_FCR);
  181. /* config modem */
  182. writel(0x0, addr + UART_MCR);
  183. /* config baud */
  184. val = readl(addr + UART_LCR);
  185. val |= (1 << 7);
  186. writel(val, addr + UART_LCR);
  187. val = apb_get_clk() / 16 / serial->config.baud_rate;
  188. writel(val & 0xff, addr + UART_DLL);
  189. writel((val >> 8) & 0xff, addr + UART_DLH);
  190. val = readl(addr + UART_LCR);
  191. val &= ~(1 << 7);
  192. writel(val, addr + UART_LCR);
  193. val = readl(addr + UART_LCR);
  194. val &= ~0x1f;
  195. val |= ((serial->config.data_bits - DATA_BITS_5) << 0) | (0 << 2) | (0x0 << 3);
  196. writel(val, addr + UART_LCR);
  197. writel(0xf, addr + UART_TFL);
  198. writel(0x3F, addr + UART_RFL);
  199. writel(0x1, addr + UART_IER);
  200. return RT_EOK;
  201. }
  202. static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  203. {
  204. struct device_uart *uart;
  205. uart = serial->parent.user_data;
  206. RT_ASSERT(uart != RT_NULL);
  207. switch (cmd)
  208. {
  209. case RT_DEVICE_CTRL_CLR_INT:
  210. /* Disable the UART Interrupt */
  211. rt_hw_interrupt_mask(uart->irqno);
  212. writel(0x00, uart->hw_base + UART_IER);
  213. break;
  214. case RT_DEVICE_CTRL_SET_INT:
  215. /* install interrupt */
  216. rt_hw_interrupt_install(uart->irqno, uart_irq_handler,
  217. serial, uart->name);
  218. rt_hw_interrupt_umask(uart->irqno);
  219. writel(0x01, uart->hw_base + UART_IER);
  220. /* Enable the UART Interrupt */
  221. break;
  222. }
  223. return (RT_EOK);
  224. }
  225. static int uart_putc(struct rt_serial_device *serial, char c)
  226. {
  227. struct device_uart *uart;
  228. volatile rt_uint32_t *sed_buf;
  229. volatile rt_uint32_t *sta;
  230. uart = serial->parent.user_data;
  231. sed_buf = (rt_uint32_t *)(uart->hw_base + UART_THR);
  232. sta = (rt_uint32_t *)(uart->hw_base + UART_USR);
  233. /* FIFO status, contain valid data */
  234. while (!(*sta & 0x02));
  235. *sed_buf = c;
  236. return (1);
  237. }
  238. static int uart_getc(struct rt_serial_device *serial)
  239. {
  240. int ch = -1;
  241. volatile rt_uint32_t *rec_buf;
  242. volatile rt_uint32_t *sta;
  243. struct device_uart *uart = serial->parent.user_data;
  244. RT_ASSERT(serial != RT_NULL);
  245. rec_buf = (rt_uint32_t *)(uart->hw_base + UART_RHB);
  246. sta = (rt_uint32_t *)(uart->hw_base + UART_USR);
  247. /* Receive Data Available */
  248. if (*sta & 0x08)
  249. {
  250. ch = *rec_buf & 0xff;
  251. }
  252. return ch;
  253. }
  254. static rt_size_t uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  255. {
  256. return (0);
  257. }
  258. /* UART ISR */
  259. void uart_irq_handler(int irqno, void *param)
  260. {
  261. rt_uint32_t val;
  262. struct rt_serial_device *serial = (struct rt_serial_device *)param;
  263. struct device_uart *uart = serial->parent.user_data;
  264. val = readl(uart->hw_base + 0x08) & 0x0F;
  265. /* read interrupt status and clear it */
  266. if (val & 0x4) /* rx ind */
  267. {
  268. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  269. }
  270. if (0) /* tx done */
  271. {
  272. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
  273. }
  274. }
  275. #endif