codec.c 15 KB

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  1. #include <rthw.h>
  2. #include <rtthread.h>
  3. #include "stm32f10x.h"
  4. /*
  5. * WM8753 Driver
  6. */
  7. /* WM8753 register definitions */
  8. #define WM8753_DAC 0x01
  9. #define WM8753_ADC 0x02
  10. #define WM8753_PCM 0x03
  11. #define WM8753_HIFI 0x04
  12. #define WM8753_IOCTL 0x05
  13. #define WM8753_SRATE1 0x06
  14. #define WM8753_SRATE2 0x07
  15. #define WM8753_LDAC 0x08
  16. #define WM8753_RDAC 0x09
  17. #define WM8753_BASS 0x0a
  18. #define WM8753_TREBLE 0x0b
  19. #define WM8753_ALC1 0x0c
  20. #define WM8753_ALC2 0x0d
  21. #define WM8753_ALC3 0x0e
  22. #define WM8753_NGATE 0x0f
  23. #define WM8753_LADC 0x10
  24. #define WM8753_RADC 0x11
  25. #define WM8753_ADCTL1 0x12
  26. #define WM8753_3D 0x13
  27. #define WM8753_PWR1 0x14
  28. #define WM8753_PWR2 0x15
  29. #define WM8753_PWR3 0x16
  30. #define WM8753_PWR4 0x17
  31. #define WM8753_ID 0x18
  32. #define WM8753_INTPOL 0x19
  33. #define WM8753_INTEN 0x1a
  34. #define WM8753_GPIO1 0x1b
  35. #define WM8753_GPIO2 0x1c
  36. #define WM8753_RESET 0x1f
  37. #define WM8753_RECMIX1 0x20
  38. #define WM8753_RECMIX2 0x21
  39. #define WM8753_LOUTM1 0x22
  40. #define WM8753_LOUTM2 0x23
  41. #define WM8753_ROUTM1 0x24
  42. #define WM8753_ROUTM2 0x25
  43. #define WM8753_MOUTM1 0x26
  44. #define WM8753_MOUTM2 0x27
  45. #define WM8753_LOUT1V 0x28
  46. #define WM8753_ROUT1V 0x29
  47. #define WM8753_LOUT2V 0x2a
  48. #define WM8753_ROUT2V 0x2b
  49. #define WM8753_MOUTV 0x2c
  50. #define WM8753_OUTCTL 0x2d
  51. #define WM8753_ADCIN 0x2e
  52. #define WM8753_INCTL1 0x2f
  53. #define WM8753_INCTL2 0x30
  54. #define WM8753_LINVOL 0x31
  55. #define WM8753_RINVOL 0x32
  56. #define WM8753_MICBIAS 0x33
  57. #define WM8753_CLOCK 0x34
  58. #define WM8753_PLL1CTL1 0x35
  59. #define WM8753_PLL1CTL2 0x36
  60. #define WM8753_PLL1CTL3 0x37
  61. #define WM8753_PLL1CTL4 0x38
  62. #define WM8753_PLL2CTL1 0x39
  63. #define WM8753_PLL2CTL2 0x3a
  64. #define WM8753_PLL2CTL3 0x3b
  65. #define WM8753_PLL2CTL4 0x3c
  66. #define WM8753_BIASCTL 0x3d
  67. #define WM8753_ADCTL2 0x3f
  68. /*
  69. SCLK PA5 SPI1_SCK
  70. SDIN PA6
  71. CSB PC5
  72. */
  73. #define wm_sclk_0 GPIO_ResetBits(GPIOA,GPIO_Pin_5)
  74. #define wm_sclk_1 GPIO_SetBits(GPIOA,GPIO_Pin_5)
  75. #define wm_sdin_0 GPIO_ResetBits(GPIOA,GPIO_Pin_7)
  76. #define wm_sdin_1 GPIO_SetBits(GPIOA,GPIO_Pin_7)
  77. #define wm_csb_0 GPIO_ResetBits(GPIOC,GPIO_Pin_5)
  78. #define wm_csb_1 GPIO_SetBits(GPIOC,GPIO_Pin_5)
  79. #define DATA_NODE_MAX 5
  80. /* data node for Tx Mode */
  81. struct wm8753_data_node
  82. {
  83. rt_uint16_t *data_ptr;
  84. rt_size_t data_size;
  85. };
  86. struct wm8753_device
  87. {
  88. /* inherit from rt_device */
  89. struct rt_device parent;
  90. /* pcm data list */
  91. struct wm8753_data_node data_list[DATA_NODE_MAX];
  92. rt_uint16_t read_index, put_index;
  93. /* transmitted offset of current data node */
  94. rt_size_t offset;
  95. };
  96. struct wm8753_device wm8753;
  97. static void NVIC_Configuration(void)
  98. {
  99. NVIC_InitTypeDef NVIC_InitStructure;
  100. /* SPI2 IRQ Channel configuration */
  101. NVIC_InitStructure.NVIC_IRQChannel = SPI2_IRQn;
  102. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  103. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  104. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  105. NVIC_Init(&NVIC_InitStructure);
  106. /* DMA1 IRQ Channel configuration */
  107. NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel5_IRQn;
  108. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  109. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  110. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  111. NVIC_Init(&NVIC_InitStructure);
  112. }
  113. static void GPIO_Configuration(void)
  114. {
  115. GPIO_InitTypeDef GPIO_InitStructure;
  116. SPI_InitTypeDef SPI_InitStructure;
  117. #define SPI_MASTER SPI1
  118. #define SPI_MASTER_CLK RCC_APB2Periph_SPI1
  119. #define SPI_MASTER_GPIO GPIOA
  120. #define SPI_MASTER_GPIO_CLK RCC_APB2Periph_GPIOA
  121. #define SPI_MASTER_PIN_SCK GPIO_Pin_5
  122. #define SPI_MASTER_PIN_MISO GPIO_Pin_6
  123. #define SPI_MASTER_PIN_MOSI GPIO_Pin_7
  124. #define SPI_MASTER_IRQn SPI1_IRQn
  125. /* Disable the JTAG interface and enable the SWJ interface */
  126. GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
  127. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
  128. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA |
  129. RCC_APB2Periph_AFIO, ENABLE);
  130. /* Enable SPI_MASTER Periph clock */
  131. RCC_APB2PeriphClockCmd(SPI_MASTER_CLK, ENABLE);
  132. /* Configure SPI_MASTER pins: SCK, MISO and MOSI */
  133. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
  134. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  135. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  136. GPIO_Init(SPI_MASTER_GPIO, &GPIO_InitStructure);
  137. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
  138. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  139. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  140. GPIO_Init(GPIOC,&GPIO_InitStructure);
  141. /* SPI_MASTER configuration ------------------------------------------------*/
  142. SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
  143. SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  144. SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  145. SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;/* 常态为低电平 */
  146. SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; /* SPI_CPHA_1Edge 从第一个沿开始送数据: 上升沿
  147. SPI_CPHA_2Edge 从第二个沿开始送数据: 下降沿 */
  148. SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  149. SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
  150. SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  151. SPI_InitStructure.SPI_CRCPolynomial = 7;
  152. SPI_Init(SPI1, &SPI_InitStructure);
  153. /* Enable SPI_MASTER */
  154. SPI_Cmd(SPI1, ENABLE);
  155. SPI_CalculateCRC(SPI1, DISABLE);
  156. /* Configure SPI2 pins: CK, WS and SD */
  157. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15;
  158. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  159. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  160. GPIO_Init(GPIOB, &GPIO_InitStructure);
  161. #if 0
  162. /* MCO configure */
  163. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
  164. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  165. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  166. GPIO_Init(GPIOA,&GPIO_InitStructure);
  167. RCC_MCOConfig(RCC_MCO_HSE);
  168. #endif
  169. }
  170. #define SPI2_DR_Address 0x4000380C
  171. static void DMA_Configuration(rt_uint32_t addr, rt_size_t size)
  172. {
  173. DMA_InitTypeDef DMA_InitStructure;
  174. /* DMA1 Channel2 configuration ----------------------------------------------*/
  175. DMA_Cmd(DMA1_Channel5, DISABLE);
  176. DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)SPI2_DR_Address;
  177. DMA_InitStructure.DMA_MemoryBaseAddr = (u32)addr;
  178. DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
  179. DMA_InitStructure.DMA_BufferSize = size;
  180. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  181. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  182. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
  183. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
  184. DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
  185. DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
  186. DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  187. DMA_Init(DMA1_Channel5, &DMA_InitStructure);
  188. /* Enable SPI2 DMA Tx request */
  189. SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
  190. DMA_ITConfig(DMA1_Channel5, DMA_IT_TC, ENABLE);
  191. DMA_Cmd(DMA1_Channel5, ENABLE);
  192. }
  193. static void I2S_Configuration(void)
  194. {
  195. I2S_InitTypeDef I2S_InitStructure;
  196. /* I2S peripheral configuration */
  197. I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips;
  198. I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
  199. I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable;
  200. I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_44k;
  201. I2S_InitStructure.I2S_CPOL = I2S_CPOL_High;// I2S_CPOL_Low
  202. /* I2S2 Master Transmitter to I2S3 Slave Receiver communication -----------*/
  203. /* I2S2 configuration */
  204. I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;//I2S_Mode_MasterTx I2S_Mode_SlaveTx
  205. I2S_Init(SPI2, &I2S_InitStructure);
  206. }
  207. #if 1
  208. static void wm_delay(void)
  209. {
  210. volatile unsigned int dl;
  211. for(dl=0; dl<5000; dl++);
  212. }
  213. #endif
  214. void wm8753_send(rt_uint16_t s_data)
  215. {
  216. /* Wait for SPI1 Tx buffer empty */
  217. while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);
  218. wm_csb_0;
  219. /* Send SPI1 data */
  220. SPI_I2S_SendData(SPI1, (s_data>>8)&0xFF );
  221. /* Wait for SPI1 Tx buffer empty */
  222. while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);
  223. /* Send SPI1 data */
  224. SPI_I2S_SendData(SPI1, s_data&0xFF);
  225. wm_delay();
  226. wm_csb_1;
  227. #if 0
  228. u8 i;
  229. wm_csb_0;
  230. //wm_delay();
  231. wm_sclk_0;
  232. //wm_delay();
  233. for (i=0;i<16;i++)
  234. {
  235. if (s_data & 0x8000)
  236. {
  237. wm_sdin_1;
  238. }
  239. else
  240. {
  241. wm_sdin_0;
  242. }
  243. //wm_delay();
  244. wm_sclk_1;
  245. s_data <<= 1;
  246. //wm_delay();
  247. wm_sclk_0;
  248. }
  249. //wm_delay();
  250. wm_csb_1;
  251. #endif
  252. }
  253. static rt_err_t wm8753_init (rt_device_t dev)
  254. {
  255. wm8753_send(0xF00F); // test
  256. wm8753_send(0<<9 | 0xFF); // reset
  257. //wm_delay();
  258. //wm_delay();
  259. //wm_delay();
  260. /* POWER manager */
  261. wm8753_send(1<<9 | (1<<8) | (0<<7) | (0<<6) | (0<<5) | (1<<4) | (1<<3) | (1<<2) | 2 );//电源设置
  262. wm8753_send(2<<9 | (1<<8) | (1<<7) | (1<<5) | (1<<4) | (1<<3) | (1<<2) ); // 打开电源 耳机输出
  263. wm8753_send(3<<9 | (0<<8) | (0<<7) | (1<<6) | (1<<5) | (1<<3) | (1<<2) | (1<<1) | 1 ); // 喇叭输出和DAC
  264. /* IIS DAC test */
  265. wm8753_send(4<<9 | (0<<7) | (2<<3) );//IIS 16BIT
  266. // 12.288/3/8=512K
  267. wm8753_send(6<<9 | (0<<5) | (3<<2)| 0);//0: slave 1: master | (3<<5) | (3<<2)
  268. wm8753_send(43<<9 | (1<<4) );//INVROUT2
  269. /* 设置初始化音量 */
  270. wm8753_send(52<<9 | (1<<8) | (1<<7) | 35 ); // LOUT1 0-57-63
  271. wm8753_send(53<<9 | (1<<8) | (1<<7) | 35 ); // ROUT1 0-57-63
  272. wm8753_send(54<<9 | (1<<8) | (1<<7) | 35 ); // LOUT2 0-57-63
  273. wm8753_send(55<<9 | (1<<8) | (1<<7) | 35 ); // ROUT2 0-57-63
  274. return RT_EOK;
  275. }
  276. #include <finsh.h>
  277. //0~57~63
  278. void vol(int v)
  279. {
  280. wm8753_send(52<<9 | (0<<8) | (1<<7) | v ); // LOUT1 0-57-63
  281. wm8753_send(53<<9 | (1<<8) | (1<<7) | v ); // ROUT1 0-57-63
  282. wm8753_send(54<<9 | (0<<8) | (1<<7) | v ); // LOUT2 0-57-63
  283. wm8753_send(55<<9 | (1<<8) | (1<<7) | v ); // ROUT2 0-57-63
  284. }
  285. FINSH_FUNCTION_EXPORT(vol, set volume)
  286. static rt_err_t wm8753_open(rt_device_t dev, rt_uint16_t oflag)
  287. {
  288. /* enable I2S */
  289. I2S_Cmd(SPI2, ENABLE);
  290. return RT_EOK;
  291. }
  292. static rt_err_t wm8753_close(rt_device_t dev)
  293. {
  294. /* interrupt mode */
  295. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  296. {
  297. /* Disable the I2S2 */
  298. I2S_Cmd(SPI2, DISABLE);
  299. }
  300. /* remove all data node */
  301. return RT_EOK;
  302. }
  303. static rt_err_t wm8753_control(rt_device_t dev, rt_uint8_t cmd, void *args)
  304. {
  305. /* rate control */
  306. return RT_EOK;
  307. }
  308. static rt_size_t wm8753_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  309. {
  310. struct wm8753_device* device;
  311. struct wm8753_data_node* node;
  312. rt_uint32_t level;
  313. rt_uint16_t next_index;
  314. device = (struct wm8753_device*)dev;
  315. RT_ASSERT(device != RT_NULL);
  316. next_index = device->put_index + 1;
  317. if (next_index >= DATA_NODE_MAX) next_index = 0;
  318. /* check data_list full */
  319. if (next_index == device->read_index)
  320. {
  321. rt_set_errno(-RT_EFULL);
  322. return 0;
  323. }
  324. level = rt_hw_interrupt_disable();
  325. node = &device->data_list[device->put_index];
  326. device->put_index = next_index;
  327. // rt_kprintf("+\n");
  328. /* set node attribute */
  329. node->data_ptr = (rt_uint16_t*)buffer;
  330. node->data_size = size >> 1; /* size is byte unit, convert to half word unit */
  331. next_index = device->read_index + 1;
  332. if (next_index >= DATA_NODE_MAX) next_index = 0;
  333. /* check data list whether is empty */
  334. if (next_index == device->put_index)
  335. {
  336. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  337. {
  338. device->offset = 0;
  339. /* enable I2S interrupt */
  340. SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, ENABLE);
  341. }
  342. else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  343. {
  344. DMA_Configuration((rt_uint32_t)node->data_ptr, node->data_size);
  345. }
  346. }
  347. rt_hw_interrupt_enable(level);
  348. return size;
  349. }
  350. rt_err_t wm8753_hw_init(void)
  351. {
  352. rt_device_t dev;
  353. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB, ENABLE);
  354. RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
  355. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
  356. NVIC_Configuration();
  357. GPIO_Configuration();
  358. I2S_Configuration();
  359. dev = (rt_device_t)&wm8753;
  360. dev->type = RT_Device_Class_Unknown;
  361. dev->rx_indicate = RT_NULL;
  362. dev->tx_complete = RT_NULL;
  363. dev->init = wm8753_init;
  364. dev->open = wm8753_open;
  365. dev->close = wm8753_close;
  366. dev->read = RT_NULL;
  367. dev->write = wm8753_write;
  368. dev->control = wm8753_control;
  369. dev->private = RT_NULL;
  370. /* set read_index and put index to 0 */
  371. wm8753.read_index = 0;
  372. wm8753.put_index = 0;
  373. wm_csb_1;
  374. #if 0
  375. wm_sclk_0;
  376. wm_sclk_1;
  377. wm_sclk_0;
  378. wm_sdin_0;
  379. wm_sdin_1;
  380. wm_sdin_0;
  381. wm_csb_0;
  382. wm_csb_1;
  383. #endif
  384. /* register the device */
  385. return rt_device_register(&wm8753.parent, "snd",
  386. RT_DEVICE_FLAG_WRONLY | RT_DEVICE_FLAG_DMA_TX);
  387. }
  388. void wm8753_isr()
  389. {
  390. struct wm8753_data_node* node;
  391. node = &wm8753.data_list[wm8753.read_index]; /* get current data node */
  392. if (SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_TXE) == SET)
  393. {
  394. SPI_I2S_SendData(SPI2, node->data_ptr[wm8753.offset++]);
  395. }
  396. if (wm8753.offset == node->data_size)
  397. {
  398. /* move to next node */
  399. rt_uint16_t next_index;
  400. next_index = wm8753.read_index + 1;
  401. if (next_index >= DATA_NODE_MAX) next_index = 0;
  402. /* notify transmitted complete. */
  403. if (wm8753.parent.tx_complete != RT_NULL)
  404. {
  405. wm8753.parent.tx_complete (&wm8753.parent, wm8753.data_list[wm8753.read_index].data_ptr);
  406. rt_kprintf("-\n");
  407. }
  408. wm8753.offset = 0;
  409. wm8753.read_index = next_index;
  410. if (next_index == wm8753.put_index)
  411. {
  412. /* no data on the list, disable I2S interrupt */
  413. SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, DISABLE);
  414. rt_kprintf("*\n");
  415. }
  416. }
  417. }
  418. void wm8753_dma_isr()
  419. {
  420. /* switch to next buffer */
  421. rt_uint16_t next_index;
  422. void* data_ptr;
  423. next_index = wm8753.read_index + 1;
  424. if (next_index >= DATA_NODE_MAX) next_index = 0;
  425. /* save current data pointer */
  426. data_ptr = wm8753.data_list[wm8753.read_index].data_ptr;
  427. wm8753.read_index = next_index;
  428. if (next_index != wm8753.put_index)
  429. {
  430. /* enable next dma request */
  431. DMA_Configuration((rt_uint32_t)wm8753.data_list[wm8753.read_index].data_ptr,
  432. wm8753.data_list[wm8753.read_index].data_size);
  433. }
  434. else
  435. {
  436. rt_kprintf("*\n");
  437. }
  438. /* notify transmitted complete. */
  439. if (wm8753.parent.tx_complete != RT_NULL)
  440. {
  441. wm8753.parent.tx_complete (&wm8753.parent, data_ptr);
  442. // rt_kprintf("-\n");
  443. }
  444. }