drv_uart_v2.c 6.6 KB

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  1. /*
  2. * Copyright (c) 2006-2025 RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2025-04-08 Hydevcode the first version
  9. */
  10. #include <rtthread.h>
  11. #include <rtdevice.h>
  12. #include <rtdbg.h>
  13. #include "board.h"
  14. #include "drv_uart_v2.h"
  15. #include "mmu.h"
  16. #ifdef RT_USING_SERIAL_V2
  17. #include <rtdbg.h>
  18. #if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3)
  19. #error "Please define at least one BSP_USING_UARTx"
  20. /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
  21. #endif
  22. struct hw_uart_device
  23. {
  24. rt_uint32_t hw_base;
  25. rt_uint32_t irqno;
  26. struct rt_serial_device *serial;
  27. char *device_name;
  28. };
  29. #define UART_DR(base) __REG32(base + 0x00)
  30. #define UART_FR(base) __REG32(base + 0x18)
  31. #define UART_CR(base) __REG32(base + 0x30)
  32. #define UART_IMSC(base) __REG32(base + 0x38)
  33. #define UART_ICR(base) __REG32(base + 0x44)
  34. #define UARTFR_RXFE 0x10
  35. #define UARTFR_TXFF 0x20
  36. #define UARTIMSC_RXIM 0x10
  37. #define UARTIMSC_TXIM 0x20
  38. #define UARTICR_RXIC 0x10
  39. #define UARTICR_TXIC 0x20
  40. #if defined(BSP_USING_UART0)
  41. struct rt_serial_device serial0;
  42. #endif
  43. #if defined(BSP_USING_UART1)
  44. struct rt_serial_device serial1;
  45. #endif
  46. #if defined(BSP_USING_UART2)
  47. struct rt_serial_device serial2;
  48. #endif
  49. #if defined(BSP_USING_UART3)
  50. struct rt_serial_device serial3;
  51. #endif
  52. static struct hw_uart_device _uart_device[] = {
  53. #if defined(BSP_USING_UART0)
  54. {
  55. REALVIEW_UART0_BASE,
  56. IRQ_PBA8_UART0,
  57. &serial0,
  58. "uart0",
  59. },
  60. #endif
  61. #if defined(BSP_USING_UART1)
  62. {
  63. REALVIEW_UART1_BASE,
  64. IRQ_PBA8_UART1,
  65. &serial1,
  66. "uart1",
  67. },
  68. #endif
  69. #if defined(BSP_USING_UART2)
  70. {
  71. REALVIEW_UART2_BASE,
  72. IRQ_PBA8_UART2,
  73. &serial2,
  74. "uart2",
  75. },
  76. #endif
  77. #if defined(BSP_USING_UART3)
  78. {
  79. REALVIEW_UART3_BASE,
  80. IRQ_PBA8_UART3,
  81. &serial3,
  82. "uart3",
  83. },
  84. #endif
  85. };
  86. /**
  87. * @brief UART common interrupt process. This
  88. *
  89. * @param serial Serial device
  90. */
  91. static void rt_hw_uart_isr(int irqno, void *param)
  92. {
  93. struct rt_serial_device *serial = (struct rt_serial_device *)param;
  94. struct hw_uart_device *uart;
  95. RT_ASSERT(serial != RT_NULL);
  96. uart = (struct hw_uart_device *)serial->parent.user_data;
  97. struct rt_serial_rx_fifo *rx_fifo;
  98. rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
  99. RT_ASSERT(rx_fifo != RT_NULL);
  100. rt_ringbuffer_putchar(&(rx_fifo->rb), UART_DR(uart->hw_base));
  101. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  102. }
  103. static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  104. {
  105. return RT_EOK;
  106. }
  107. static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  108. {
  109. struct hw_uart_device *uart;
  110. RT_ASSERT(serial != RT_NULL);
  111. uart = (struct hw_uart_device *)serial->parent.user_data;
  112. rt_ubase_t ctrl_arg = (rt_ubase_t) arg;
  113. if(ctrl_arg & (RT_DEVICE_FLAG_RX_BLOCKING | RT_DEVICE_FLAG_RX_NON_BLOCKING))
  114. {
  115. {
  116. ctrl_arg = RT_DEVICE_FLAG_INT_RX;
  117. }
  118. }
  119. else if(ctrl_arg & (RT_DEVICE_FLAG_TX_BLOCKING | RT_DEVICE_FLAG_TX_NON_BLOCKING))
  120. {
  121. {
  122. ctrl_arg = RT_DEVICE_FLAG_INT_TX;
  123. }
  124. }
  125. switch (cmd)
  126. {
  127. case RT_DEVICE_CTRL_CLR_INT:
  128. if (ctrl_arg == RT_DEVICE_FLAG_INT_RX)
  129. {
  130. /* disable rx irq */
  131. UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM;
  132. }
  133. else if (ctrl_arg == RT_DEVICE_FLAG_INT_TX)
  134. {
  135. /* disable tx irq */
  136. UART_IMSC(uart->hw_base) &= ~UARTIMSC_TXIM;
  137. }
  138. break;
  139. case RT_DEVICE_CTRL_SET_INT:
  140. if (ctrl_arg == RT_DEVICE_FLAG_INT_RX)
  141. {
  142. /* enable rx irq */
  143. UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM;
  144. rt_hw_interrupt_umask(uart->irqno);
  145. } else if (ctrl_arg == RT_DEVICE_FLAG_INT_TX)
  146. {
  147. /* enable tx irq */
  148. UART_IMSC(uart->hw_base) |= UARTIMSC_TXIM;
  149. rt_hw_interrupt_umask(uart->irqno);
  150. }
  151. break;
  152. case RT_DEVICE_CTRL_CONFIG:
  153. uart_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)ctrl_arg);
  154. break;
  155. }
  156. return RT_EOK;
  157. }
  158. static int uart_putc(struct rt_serial_device *serial, char ch)
  159. {
  160. struct hw_uart_device *uart;
  161. RT_ASSERT(serial != RT_NULL);
  162. uart = (struct hw_uart_device *)serial->parent.user_data;
  163. while (UART_FR(uart->hw_base) & UARTFR_TXFF);
  164. UART_DR(uart->hw_base) = ch;
  165. return 1;
  166. }
  167. static int uart_getc(struct rt_serial_device *serial)
  168. {
  169. int ch;
  170. struct hw_uart_device *uart;
  171. RT_ASSERT(serial != RT_NULL);
  172. uart = (struct hw_uart_device *)serial->parent.user_data;
  173. ch = -1;
  174. if (!(UART_FR(uart->hw_base) & UARTFR_RXFE))
  175. {
  176. ch = UART_DR(uart->hw_base) & 0xff;
  177. }
  178. return ch;
  179. }
  180. static rt_ssize_t uart_transmit(struct rt_serial_device *serial,
  181. rt_uint8_t *buf,
  182. rt_size_t size,
  183. rt_uint32_t tx_flag)
  184. {
  185. RT_ASSERT(serial != RT_NULL);
  186. RT_ASSERT(buf != RT_NULL);
  187. RT_ASSERT(size);
  188. uart_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)tx_flag);
  189. return size;
  190. }
  191. static const struct rt_uart_ops _uart_ops = {
  192. .configure = uart_configure,
  193. .control = uart_control,
  194. .putc = uart_putc,
  195. .getc = uart_getc,
  196. .transmit = uart_transmit
  197. };
  198. int rt_hw_uart_init(void)
  199. {
  200. rt_err_t err = RT_EOK;
  201. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  202. for (uint32_t i = 0; i < sizeof(_uart_device) / sizeof(_uart_device[0]); i++)
  203. {
  204. #ifdef RT_USING_SMART
  205. _uart_device[i].hw_base = (uint32_t)rt_ioremap((void*)_uart_device[i].hw_base, 0x1000);
  206. #endif
  207. _uart_device[i].serial->ops = &_uart_ops;
  208. _uart_device[i].serial->config = config;
  209. _uart_device[i].serial->config.rx_bufsz = 64;
  210. _uart_device[i].serial->config.tx_bufsz = 0;
  211. /* register UART device */
  212. err = rt_hw_serial_register(_uart_device[i].serial,
  213. _uart_device[i].device_name,
  214. RT_DEVICE_FLAG_RDWR,
  215. (void*)&_uart_device[i]);
  216. rt_hw_interrupt_install(_uart_device[i].irqno, rt_hw_uart_isr, _uart_device[i].serial, _uart_device[i].device_name);
  217. /* enable Rx and Tx of UART */
  218. UART_CR(_uart_device[i].hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
  219. }
  220. return err;
  221. }
  222. INIT_BOARD_EXPORT(rt_hw_uart_init);
  223. #endif /* RT_USING_SERIAL_V2 */