drv_usart.c 9.4 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2009-01-05 Bernard the first version
  9. * 2018-04-19 misonyo Porting for gd32f30x
  10. */
  11. #include <rthw.h>
  12. #include <drv_usart.h>
  13. #include <rtthread.h>
  14. #include "gd32f30x.h"
  15. #ifdef RT_USING_SERIAL
  16. #define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
  17. #define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
  18. #if !defined(RT_USING_USART0) && !defined(RT_USING_USART1) && \
  19. !defined(RT_USING_USART2) && !defined(RT_USING_UART3) && \
  20. !defined(RT_USING_UART4)
  21. #error "Please define at least one UARTx"
  22. #endif
  23. #include <rtdevice.h>
  24. /* GD32 uart driver */
  25. // Todo: compress uart info
  26. struct gd32_uart
  27. {
  28. uint32_t uart_periph;
  29. IRQn_Type irqn;
  30. rcu_periph_enum per_clk;
  31. rcu_periph_enum tx_gpio_clk;
  32. rcu_periph_enum rx_gpio_clk;
  33. uint32_t tx_port;
  34. uint16_t tx_pin;
  35. uint32_t rx_port;
  36. uint16_t rx_pin;
  37. struct rt_serial_device * serial;
  38. char *device_name;
  39. };
  40. static void uart_isr(struct rt_serial_device *serial);
  41. #if defined(RT_USING_USART0)
  42. struct rt_serial_device serial0;
  43. void USART0_IRQHandler(void)
  44. {
  45. /* enter interrupt */
  46. rt_interrupt_enter();
  47. uart_isr(&serial0);
  48. /* leave interrupt */
  49. rt_interrupt_leave();
  50. }
  51. #endif /* RT_USING_USART0 */
  52. #if defined(RT_USING_USART1)
  53. struct rt_serial_device serial1;
  54. void USART1_IRQHandler(void)
  55. {
  56. /* enter interrupt */
  57. rt_interrupt_enter();
  58. uart_isr(&serial1);
  59. /* leave interrupt */
  60. rt_interrupt_leave();
  61. }
  62. #endif /* RT_USING_UART1 */
  63. #if defined(RT_USING_USART2)
  64. struct rt_serial_device serial2;
  65. void USART2_IRQHandler(void)
  66. {
  67. /* enter interrupt */
  68. rt_interrupt_enter();
  69. uart_isr(&serial2);
  70. /* leave interrupt */
  71. rt_interrupt_leave();
  72. }
  73. #endif /* RT_USING_UART2 */
  74. #if defined(RT_USING_UART3)
  75. struct rt_serial_device serial3;
  76. void UART3_IRQHandler(void)
  77. {
  78. /* enter interrupt */
  79. rt_interrupt_enter();
  80. uart_isr(&serial3);
  81. /* leave interrupt */
  82. rt_interrupt_leave();
  83. }
  84. #endif /* RT_USING_UART3 */
  85. #if defined(RT_USING_UART4)
  86. struct rt_serial_device serial4;
  87. void UART4_IRQHandler(void)
  88. {
  89. /* enter interrupt */
  90. rt_interrupt_enter();
  91. uart_isr(&serial4);
  92. /* leave interrupt */
  93. rt_interrupt_leave();
  94. }
  95. #endif /* RT_USING_UART4 */
  96. static const struct gd32_uart uarts[] = {
  97. #ifdef RT_USING_USART0
  98. {
  99. USART0, // uart peripheral index
  100. USART0_IRQn, // uart iqrn
  101. RCU_USART0, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
  102. GPIOA, GPIO_PIN_9, // tx port, tx pin
  103. GPIOA, GPIO_PIN_10, // rx port, rx pin
  104. &serial0,
  105. "uart0",
  106. },
  107. #endif
  108. #ifdef RT_USING_USART1
  109. {
  110. USART1, // uart peripheral index
  111. USART1_IRQn, // uart iqrn
  112. RCU_USART1, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
  113. GPIOA, GPIO_PIN_2, // tx port, tx pin
  114. GPIOA, GPIO_PIN_3, // rx port, rx pin
  115. &serial1,
  116. "uart1",
  117. },
  118. #endif
  119. #ifdef RT_USING_USART2
  120. {
  121. USART2, // uart peripheral index
  122. USART2_IRQn, // uart iqrn
  123. RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock
  124. GPIOB, GPIO_PIN_10, // tx port, tx alternate, tx pin
  125. GPIOB, GPIO_PIN_11, // rx port, rx alternate, rx pin
  126. &serial2,
  127. "uart2",
  128. },
  129. #endif
  130. #ifdef RT_USING_UART3
  131. {
  132. UART3, // uart peripheral index
  133. UART3_IRQn, // uart iqrn
  134. RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
  135. GPIOC, GPIO_PIN_10, // tx port, tx alternate, tx pin
  136. GPIOC, GPIO_PIN_11, // rx port, rx alternate, rx pin
  137. &serial3,
  138. "uart3",
  139. },
  140. #endif
  141. #ifdef RT_USING_UART4
  142. {
  143. UART4, // uart peripheral index
  144. UART4_IRQn, // uart iqrn
  145. RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock
  146. GPIOC, GPIO_PIN_12, // tx port, tx alternate, tx pin
  147. GPIOD, GPIO_PIN_2, // rx port, rx alternate, rx pin
  148. &serial4,
  149. "uart4",
  150. },
  151. #endif
  152. };
  153. /**
  154. * @brief UART MSP Initialization
  155. * This function configures the hardware resources used in this example:
  156. * - Peripheral's clock enable
  157. * - Peripheral's GPIO Configuration
  158. * - NVIC configuration for UART interrupt request enable
  159. * @param uart: UART handle pointer
  160. * @retval None
  161. */
  162. void gd32_uart_gpio_init(struct gd32_uart *uart)
  163. {
  164. /* enable USART clock */
  165. rcu_periph_clock_enable(uart->tx_gpio_clk);
  166. rcu_periph_clock_enable(uart->rx_gpio_clk);
  167. rcu_periph_clock_enable(uart->per_clk);
  168. /* connect port to USARTx_Tx */
  169. gpio_init(uart->tx_port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, uart->tx_pin);
  170. /* connect port to USARTx_Rx */
  171. gpio_init(uart->rx_port, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, uart->rx_pin);
  172. NVIC_SetPriority(uart->irqn, 0);
  173. NVIC_EnableIRQ(uart->irqn);
  174. }
  175. static rt_err_t gd32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  176. {
  177. struct gd32_uart *uart;
  178. RT_ASSERT(serial != RT_NULL);
  179. RT_ASSERT(cfg != RT_NULL);
  180. uart = (struct gd32_uart *)serial->parent.user_data;
  181. gd32_uart_gpio_init(uart);
  182. usart_baudrate_set(uart->uart_periph, cfg->baud_rate);
  183. switch (cfg->data_bits)
  184. {
  185. case DATA_BITS_9:
  186. usart_word_length_set(uart->uart_periph, USART_WL_9BIT);
  187. break;
  188. default:
  189. usart_word_length_set(uart->uart_periph, USART_WL_8BIT);
  190. break;
  191. }
  192. switch (cfg->stop_bits)
  193. {
  194. case STOP_BITS_2:
  195. usart_stop_bit_set(uart->uart_periph, USART_STB_2BIT);
  196. break;
  197. default:
  198. usart_stop_bit_set(uart->uart_periph, USART_STB_1BIT);
  199. break;
  200. }
  201. switch (cfg->parity)
  202. {
  203. case PARITY_ODD:
  204. usart_parity_config(uart->uart_periph, USART_PM_ODD);
  205. break;
  206. case PARITY_EVEN:
  207. usart_parity_config(uart->uart_periph, USART_PM_EVEN);
  208. break;
  209. default:
  210. usart_parity_config(uart->uart_periph, USART_PM_NONE);
  211. break;
  212. }
  213. usart_receive_config(uart->uart_periph, USART_RECEIVE_ENABLE);
  214. usart_transmit_config(uart->uart_periph, USART_TRANSMIT_ENABLE);
  215. usart_enable(uart->uart_periph);
  216. return RT_EOK;
  217. }
  218. static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd, void *arg)
  219. {
  220. struct gd32_uart *uart;
  221. RT_ASSERT(serial != RT_NULL);
  222. uart = (struct gd32_uart *)serial->parent.user_data;
  223. switch (cmd)
  224. {
  225. case RT_DEVICE_CTRL_CLR_INT:
  226. /* disable rx irq */
  227. NVIC_DisableIRQ(uart->irqn);
  228. /* disable interrupt */
  229. usart_interrupt_disable(uart->uart_periph, USART_INT_RBNE);
  230. break;
  231. case RT_DEVICE_CTRL_SET_INT:
  232. /* enable rx irq */
  233. NVIC_EnableIRQ(uart->irqn);
  234. /* enable interrupt */
  235. usart_interrupt_enable(uart->uart_periph, USART_INT_RBNE);
  236. break;
  237. }
  238. return RT_EOK;
  239. }
  240. static int gd32_putc(struct rt_serial_device *serial, char ch)
  241. {
  242. struct gd32_uart *uart;
  243. RT_ASSERT(serial != RT_NULL);
  244. uart = (struct gd32_uart *)serial->parent.user_data;
  245. usart_data_transmit(uart->uart_periph, ch);
  246. while((usart_flag_get(uart->uart_periph, USART_FLAG_TC) == RESET));
  247. return 1;
  248. }
  249. static int gd32_getc(struct rt_serial_device *serial)
  250. {
  251. int ch;
  252. struct gd32_uart *uart;
  253. RT_ASSERT(serial != RT_NULL);
  254. uart = (struct gd32_uart *)serial->parent.user_data;
  255. ch = -1;
  256. if (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET)
  257. ch = usart_data_receive(uart->uart_periph);
  258. return ch;
  259. }
  260. /**
  261. * Uart common interrupt process. This need add to uart ISR.
  262. *
  263. * @param serial serial device
  264. */
  265. static void uart_isr(struct rt_serial_device *serial)
  266. {
  267. struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data;
  268. RT_ASSERT(uart != RT_NULL);
  269. /* UART in mode Receiver */
  270. if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_RBNE) != RESET) &&
  271. (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET))
  272. {
  273. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  274. /* Clear RXNE interrupt flag */
  275. usart_flag_clear(uart->uart_periph, USART_FLAG_RBNE);
  276. }
  277. }
  278. static const struct rt_uart_ops gd32_uart_ops =
  279. {
  280. gd32_configure,
  281. gd32_control,
  282. gd32_putc,
  283. gd32_getc
  284. };
  285. int gd32_hw_usart_init(void)
  286. {
  287. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  288. int i;
  289. for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
  290. {
  291. uarts[i].serial->ops = &gd32_uart_ops;
  292. uarts[i].serial->config = config;
  293. /* register UART device */
  294. rt_hw_serial_register(uarts[i].serial,
  295. uarts[i].device_name,
  296. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  297. (void *)&uarts[i]);
  298. }
  299. return 0;
  300. }
  301. INIT_BOARD_EXPORT(gd32_hw_usart_init);
  302. #endif