drv_i2c.c 10 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2017-06-05 tanek first implementation.
  9. * 2018-04-19 misonyo Porting for gd32f30x
  10. * 2019-03-31 xuzhuoyi Porting for gd32e230
  11. */
  12. #include "drv_i2c.h"
  13. #include <rtthread.h>
  14. #include "gd32e230.h"
  15. #ifdef RT_USING_I2C
  16. #include <rtdevice.h>
  17. #define DBG_TAG "drv.I2C"
  18. #ifdef RT_I2C_DEBUG
  19. #define DBG_LVL DBG_LOG
  20. #else
  21. #define DBG_LVL DBG_INFO
  22. #endif
  23. #include <rtdbg.h>
  24. #ifdef RT_USING_I2C_BITOPS
  25. /*user can change this*/
  26. #define I2C_BUS_NAME "i2c2"
  27. /*user should change this to adapt specific board*/
  28. #define I2C_SCL_PIN GPIO_PIN_4
  29. #define I2C_SCL_PORT GPIOE
  30. #define I2C_SCL_CLK RCU_GPIOE
  31. #define I2C_SDA_PIN GPIO_PIN_5
  32. #define I2C_SDA_PORT GPIOE
  33. #define I2C_SDA_CLK RCU_GPIOE
  34. struct gd32_i2c_bit_data
  35. {
  36. struct
  37. {
  38. rcu_periph_enum clk;
  39. rt_uint32_t port;
  40. rt_uint32_t pin;
  41. }scl, sda;
  42. };
  43. static void gpio_set_sda(void *data, rt_int32_t state)
  44. {
  45. struct gd32_i2c_bit_data* bd = data;
  46. if (state)
  47. {
  48. gpio_bit_set(bd->sda.port, bd->sda.pin);
  49. }
  50. else
  51. {
  52. gpio_bit_reset(bd->sda.port, bd->sda.pin);
  53. }
  54. }
  55. static void gpio_set_scl(void *data, rt_int32_t state)
  56. {
  57. struct gd32_i2c_bit_data* bd = data;
  58. if (state)
  59. {
  60. gpio_bit_set(bd->scl.port, bd->scl.pin);
  61. }
  62. else
  63. {
  64. gpio_bit_reset(bd->scl.port, bd->scl.pin);
  65. }
  66. }
  67. static rt_int32_t gpio_get_sda(void *data)
  68. {
  69. struct gd32_i2c_bit_data* bd = data;
  70. return gpio_input_bit_get(bd->sda.port, bd->sda.pin);
  71. }
  72. static rt_int32_t gpio_get_scl(void *data)
  73. {
  74. struct gd32_i2c_bit_data* bd = data;
  75. return gpio_input_bit_get(bd->scl.port, bd->scl.pin);
  76. }
  77. static void gpio_udelay(rt_uint32_t us)
  78. {
  79. int i = ( rcu_clock_freq_get(CK_SYS) / 4000000 * us);
  80. while(i)
  81. {
  82. i--;
  83. }
  84. }
  85. static void drv_i2c_gpio_init(const struct gd32_i2c_bit_data* bd)
  86. {
  87. rcu_periph_clock_enable(bd->sda.clk);
  88. rcu_periph_clock_enable(bd->scl.clk);
  89. gpio_init(bd->sda.port, GPIO_MODE_OUT_OD, GPIO_OSPEED_10MHZ, bd->sda.pin);
  90. gpio_init(bd->scl.port, GPIO_MODE_OUT_OD, GPIO_OSPEED_10MHZ, bd->scl.pin);
  91. gpio_bit_set(bd->sda.port, bd->sda.pin);
  92. gpio_bit_set(bd->scl.port, bd->scl.pin);
  93. }
  94. #else /* use hardware i2c */
  95. struct gd32_i2c_bus
  96. {
  97. struct rt_i2c_bus_device parent;
  98. rt_uint32_t i2c_periph;
  99. };
  100. static int gd32_i2c_read(rt_uint32_t i2c_periph, rt_uint16_t slave_address, rt_uint8_t* p_buffer, rt_uint16_t data_byte)
  101. {
  102. /* wait until I2C bus is idle */
  103. while(i2c_flag_get(i2c_periph, I2C_FLAG_I2CBSY));
  104. /* send a start condition to I2C bus */
  105. i2c_start_on_bus(i2c_periph);
  106. /* wait until SBSEND bit is set */
  107. while(!i2c_flag_get(i2c_periph, I2C_FLAG_SBSEND));
  108. /* send slave address to I2C bus */
  109. i2c_master_addressing(i2c_periph, slave_address<<1, I2C_RECEIVER);
  110. /* wait until ADDSEND bit is set */
  111. while(!i2c_flag_get(i2c_periph, I2C_FLAG_ADDSEND));
  112. /* clear the ADDSEND bit */
  113. i2c_flag_clear(i2c_periph,I2C_FLAG_ADDSEND);
  114. if(1 == data_byte){
  115. /* disable acknowledge */
  116. i2c_ack_config(i2c_periph,I2C_ACK_DISABLE);
  117. /* send a stop condition to I2C bus */
  118. i2c_stop_on_bus(i2c_periph);
  119. }
  120. /* while there is data to be read */
  121. while(data_byte)
  122. {
  123. /* wait until the RBNE bit is set and clear it */
  124. if(i2c_flag_get(i2c_periph, I2C_FLAG_RBNE))
  125. {
  126. /* read a byte from the EEPROM */
  127. *p_buffer = i2c_data_receive(i2c_periph);
  128. /* point to the next location where the byte read will be saved */
  129. p_buffer++;
  130. /* decrement the read bytes counter */
  131. data_byte--;
  132. if(1 == data_byte)
  133. {
  134. /* disable acknowledge */
  135. i2c_ack_config(i2c_periph,I2C_ACK_DISABLE);
  136. /* send a stop condition to I2C bus */
  137. i2c_stop_on_bus(i2c_periph);
  138. }
  139. }
  140. }
  141. /* wait until the stop condition is finished */
  142. while(I2C_CTL0(i2c_periph)&0x0200);
  143. /* enable acknowledge */
  144. i2c_ack_config(i2c_periph,I2C_ACK_ENABLE);
  145. i2c_ackpos_config(i2c_periph,I2C_ACKPOS_CURRENT);
  146. return 0;
  147. }
  148. static int gd32_i2c_write(rt_uint32_t i2c_periph, uint16_t slave_address, uint8_t* p_buffer, uint16_t data_byte)
  149. {
  150. /* wait until I2C bus is idle */
  151. while(i2c_flag_get(i2c_periph, I2C_FLAG_I2CBSY));
  152. /* send a start condition to I2C bus */
  153. i2c_start_on_bus(i2c_periph);
  154. /* wait until SBSEND bit is set */
  155. while(!i2c_flag_get(i2c_periph, I2C_FLAG_SBSEND));
  156. /* send slave address to I2C bus */
  157. i2c_master_addressing(i2c_periph, slave_address<<1, I2C_TRANSMITTER);
  158. /* wait until ADDSEND bit is set */
  159. while(!i2c_flag_get(i2c_periph, I2C_FLAG_ADDSEND));
  160. /* clear the ADDSEND bit */
  161. i2c_flag_clear(i2c_periph,I2C_FLAG_ADDSEND);
  162. /* wait until the transmit data buffer is empty */
  163. while(SET != i2c_flag_get( i2c_periph , I2C_FLAG_TBE));
  164. /* while there is data to be read */
  165. while(data_byte)
  166. {
  167. i2c_data_transmit(i2c_periph, *p_buffer);
  168. /* point to the next byte to be written */
  169. p_buffer++;
  170. /* decrement the write bytes counter */
  171. data_byte --;
  172. /* wait until BTC bit is set */
  173. while(!i2c_flag_get(i2c_periph, I2C_FLAG_BTC));
  174. }
  175. /* send a stop condition to I2C bus */
  176. i2c_stop_on_bus(i2c_periph);
  177. /* wait until the stop condition is finished */
  178. while(I2C_CTL0(i2c_periph)&0x0200);
  179. return 0;
  180. }
  181. static rt_ssize_t gd32_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
  182. {
  183. struct rt_i2c_msg *msg;
  184. rt_uint32_t i;
  185. rt_err_t ret = -RT_ERROR;
  186. struct gd32_i2c_bus *gd32_i2c = (struct gd32_i2c_bus *)bus;
  187. for (i = 0; i < num; i++)
  188. {
  189. msg = &msgs[i];
  190. if (msg->flags & RT_I2C_ADDR_10BIT)
  191. {
  192. i2c_mode_addr_config(gd32_i2c->i2c_periph,I2C_I2CMODE_ENABLE,I2C_ADDFORMAT_10BITS,0);
  193. }
  194. else
  195. {
  196. i2c_mode_addr_config(gd32_i2c->i2c_periph,I2C_I2CMODE_ENABLE,I2C_ADDFORMAT_7BITS,0);
  197. }
  198. if (msg->flags & RT_I2C_RD)
  199. {
  200. if (gd32_i2c_read(gd32_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
  201. {
  202. LOG_E("i2c bus write failed,i2c bus stop!");
  203. goto out;
  204. }
  205. }
  206. else
  207. {
  208. if (gd32_i2c_write(gd32_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
  209. {
  210. LOG_E("i2c bus write failed,i2c bus stop!");
  211. goto out;
  212. }
  213. }
  214. }
  215. ret = i;
  216. out:
  217. LOG_D("send stop condition");
  218. return ret;
  219. }
  220. static const struct rt_i2c_bus_device_ops i2c_ops =
  221. {
  222. gd32_i2c_xfer,
  223. RT_NULL,
  224. RT_NULL
  225. };
  226. #endif /* RT_USING_I2C_BITOPS */
  227. int rt_hw_i2c_init(void)
  228. {
  229. #ifdef RT_USING_I2C_BITOPS
  230. {
  231. static struct rt_i2c_bus_device i2c_device;
  232. static const struct gd32_i2c_bit_data _i2c_bdata =
  233. {
  234. /* SCL */
  235. { I2C_SCL_CLK, I2C_SCL_PORT, I2C_SCL_PIN},
  236. /* SDA */
  237. { I2C_SDA_CLK, I2C_SDA_PORT, I2C_SDA_PIN},
  238. };
  239. static const struct rt_i2c_bit_ops _i2c_bit_ops =
  240. {
  241. (void*)&_i2c_bdata,
  242. gpio_set_sda,
  243. gpio_set_scl,
  244. gpio_get_sda,
  245. gpio_get_scl,
  246. gpio_udelay,
  247. 1,
  248. 100
  249. };
  250. drv_i2c_gpio_init(&_i2c_bdata);
  251. i2c_device.priv = (void *)&_i2c_bit_ops;
  252. rt_i2c_bit_add_bus(&i2c_device, I2C_BUS_NAME);
  253. }
  254. #else /* register hardware I2C */
  255. #ifdef RT_USING_I2C0
  256. #define I2C0_SPEED 100000
  257. static struct gd32_i2c_bus gd32_i2c0;
  258. /* enable GPIOB clock */
  259. rcu_periph_clock_enable(RCU_GPIOB);
  260. /* connect PB6 to I2C0_SCL */
  261. gpio_af_set(GPIOB, GPIO_AF_1, GPIO_PIN_6);
  262. /* connect PB7 to I2C0_SDA */
  263. gpio_af_set(GPIOB, GPIO_AF_1, GPIO_PIN_7);
  264. /* configure GPIO pins of I2C0 */
  265. gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP,GPIO_PIN_6);
  266. gpio_output_options_set(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ,GPIO_PIN_6);
  267. gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP,GPIO_PIN_7);
  268. gpio_output_options_set(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ,GPIO_PIN_7);
  269. /* enable I2C clock */
  270. rcu_periph_clock_enable(RCU_I2C0);
  271. /* configure I2C clock */
  272. i2c_clock_config(I2C0,I2C0_SPEED,I2C_DTCY_2);
  273. i2c_enable(I2C0);
  274. /* enable acknowledge */
  275. i2c_ack_config(I2C0,I2C_ACK_ENABLE);
  276. rt_memset((void *)&gd32_i2c0, 0, sizeof(struct gd32_i2c_bus));
  277. gd32_i2c0.parent.ops = &i2c_ops;
  278. gd32_i2c0.i2c_periph = I2C0;
  279. rt_i2c_bus_device_register(&gd32_i2c0.parent, "i2c0");
  280. #endif
  281. #ifdef RT_USING_I2C1
  282. #define I2C1_SPEED 100000
  283. static struct gd32_i2c_bus gd32_i2c1;
  284. /* enable GPIOB clock */
  285. rcu_periph_clock_enable(RCU_GPIOB);
  286. /* connect PB10 to I2C1_SCL */
  287. gpio_af_set(GPIOB, GPIO_AF_1, GPIO_PIN_10);
  288. /* connect PB11 to I2C1_SDA */
  289. gpio_af_set(GPIOB, GPIO_AF_1, GPIO_PIN_11);
  290. /* configure GPIO pins of I2C1 */
  291. gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP,GPIO_PIN_10);
  292. gpio_output_options_set(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ,GPIO_PIN_10);
  293. gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP,GPIO_PIN_11);
  294. gpio_output_options_set(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ,GPIO_PIN_11);
  295. /* enable I2C clock */
  296. rcu_periph_clock_enable(RCU_I2C1);
  297. /* configure I2C clock */
  298. i2c_clock_config(I2C1,I2C1_SPEED,I2C_DTCY_2);
  299. i2c_enable(I2C1);
  300. /* enable acknowledge */
  301. i2c_ack_config(I2C1,I2C_ACK_ENABLE);
  302. rt_memset((void *)&gd32_i2c1, 0, sizeof(struct gd32_i2c_bus));
  303. gd32_i2c1.parent.ops = &i2c_ops;
  304. gd32_i2c1.i2c_periph = I2C1;
  305. rt_i2c_bus_device_register(&gd32_i2c1.parent, "i2c1");
  306. #endif
  307. #endif /* RT_USING_I2C_BITOPS */
  308. return 0;
  309. }
  310. INIT_DEVICE_EXPORT(rt_hw_i2c_init);
  311. #endif
  312. /* end of i2c driver */