drv_uart.c 5.7 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-04-05 bigmagic Initial version
  9. * 2020-10-28 ma Buadrate & Multi-Port support
  10. */
  11. /**
  12. * @addtogroup ls2k
  13. */
  14. /*@{*/
  15. #include <rtthread.h>
  16. #include <rtdevice.h>
  17. #include <rthw.h>
  18. #include "drv_uart.h"
  19. #define TRUE 1
  20. #define FALSE 0
  21. const struct serial_configure config_uart0 = {
  22. BAUD_RATE_115200, /* 921600 bits/s */
  23. DATA_BITS_8, /* 8 databits */
  24. STOP_BITS_1, /* 1 stopbit */
  25. PARITY_NONE, /* No parity */
  26. BIT_ORDER_LSB, /* LSB first sent */
  27. NRZ_NORMAL, /* Normal mode */
  28. RT_SERIAL_RB_BUFSZ, /* Buffer size */
  29. 0
  30. };
  31. struct rt_uart_ls2k
  32. {
  33. void *base;
  34. rt_uint32_t IRQ;
  35. };
  36. static rt_err_t ls2k_uart_set_buad(struct rt_serial_device *serial, struct serial_configure *cfg)
  37. {
  38. struct rt_uart_ls2k *uart_dev = RT_NULL;
  39. rt_err_t ret = RT_EOK;
  40. RT_ASSERT(serial != RT_NULL);
  41. RT_ASSERT(cfg != RT_NULL);
  42. uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
  43. uint64_t brtc = (125000000U) / (16 * (cfg->baud_rate));
  44. UART_LCR(uart_dev->base) = 0x80; // Activate buadcfg
  45. UART_LSB(uart_dev->base) = brtc & 0xff;
  46. UART_MSB(uart_dev->base) = brtc >> 8;
  47. if (((((short)UART_MSB(uart_dev->base)) << 8) | UART_LSB(uart_dev->base)) != brtc) ret = -RT_ERROR;
  48. UART_LCR(uart_dev->base) = CFCR_8BITS; // Back to normal
  49. UART_MCR(uart_dev->base) = MCR_IENABLE/* | MCR_DTR | MCR_RTS*/;
  50. UART_IER(uart_dev->base) = 0;
  51. }
  52. static rt_err_t ls2k_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  53. {
  54. struct rt_uart_ls2k *uart_dev = RT_NULL;
  55. RT_ASSERT(serial != RT_NULL);
  56. RT_ASSERT(cfg != RT_NULL);
  57. ls2k_uart_set_buad(serial, cfg);
  58. uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
  59. HWREG8(0xffffffffbfe10428) = 0x1f; // Enable Multi-Port Support, by default it's 0x11 ,which means UART0 & UART4 Controller is in single port mode.
  60. UART_IER(uart_dev->base) = 0; /* clear interrupt */
  61. UART_FCR(uart_dev->base) = 0xc1; /* reset UART Rx/Tx */
  62. /* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
  63. UART_LCR(uart_dev->base) = 0x3;
  64. UART_MCR(uart_dev->base) = 0x3;
  65. UART_LSR(uart_dev->base) = 0x60;
  66. UART_MSR(uart_dev->base) = 0xb0;
  67. return RT_EOK;
  68. }
  69. static rt_err_t ls2k_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  70. {
  71. struct rt_uart_ls2k *uart_dev = RT_NULL;
  72. RT_ASSERT(serial != RT_NULL);
  73. uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
  74. switch (cmd)
  75. {
  76. case RT_DEVICE_CTRL_CLR_INT: /* Disable RX IRQ */
  77. rt_hw_interrupt_mask(uart_dev->IRQ);
  78. break;
  79. case RT_DEVICE_CTRL_SET_INT: /* Enable RX IRQ */
  80. rt_hw_interrupt_umask(uart_dev->IRQ);
  81. UART_IER(uart_dev->base) |= (IER_IRxE | IER_ILE);
  82. break;
  83. default:
  84. break;
  85. }
  86. return RT_EOK;
  87. }
  88. static rt_bool_t uart_is_transmit_empty(struct rt_uart_ls2k *uart_dev)
  89. {
  90. unsigned char status = UART_LSR(uart_dev->base);
  91. if (status & (UARTLSR_TE | UARTLSR_TFE))
  92. {
  93. return TRUE;
  94. }
  95. else
  96. {
  97. return FALSE;
  98. }
  99. }
  100. static int ls2k_uart_putc(struct rt_serial_device *serial, char c)
  101. {
  102. struct rt_uart_ls2k *uart_dev = RT_NULL;
  103. RT_ASSERT(serial != RT_NULL);
  104. uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
  105. while (FALSE == uart_is_transmit_empty(uart_dev))
  106. ;
  107. UART_DAT(uart_dev->base) = c;
  108. return 1;
  109. }
  110. static int ls2k_uart_getc(struct rt_serial_device *serial)
  111. {
  112. struct rt_uart_ls2k *uart_dev = RT_NULL;
  113. RT_ASSERT(serial != RT_NULL);
  114. uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
  115. if (LSR_RXRDY & UART_LSR(uart_dev->base))
  116. {
  117. return UART_DAT(uart_dev->base);
  118. }
  119. return -1;
  120. }
  121. /* UART interrupt handler */
  122. static void uart_irq_handler(int vector, void *param)
  123. {
  124. struct rt_serial_device *serial = (struct rt_serial_device *)param;
  125. struct rt_uart_ls2k *uart_dev = RT_NULL;
  126. RT_ASSERT(serial != RT_NULL);
  127. uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
  128. unsigned char iir = UART_IIR(uart_dev->base);
  129. /* Find out interrupt reason */
  130. if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
  131. {
  132. rt_interrupt_enter();
  133. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  134. rt_interrupt_leave();
  135. }
  136. }
  137. static const struct rt_uart_ops ls2k_uart_ops =
  138. {
  139. ls2k_uart_configure,
  140. ls2k_uart_control,
  141. ls2k_uart_putc,
  142. ls2k_uart_getc,
  143. };
  144. struct rt_uart_ls2k uart_dev0 =
  145. {
  146. (void *)UARTx_BASE(0),
  147. LS2K_UART_0_1_2_3_IRQ,
  148. };
  149. struct rt_uart_ls2k uart_dev4 =
  150. {
  151. (void *)UARTx_BASE(4),
  152. LS2K_UART_4_5_6_7_IRQ,
  153. };
  154. struct rt_serial_device serial, serial4;
  155. void rt_hw_uart_init(void)
  156. {
  157. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  158. #ifdef RT_USING_UART0
  159. struct rt_uart_ls2k *uart0;
  160. uart0 = &uart_dev0;
  161. serial.ops = &ls2k_uart_ops;
  162. serial.config = config_uart0;
  163. rt_hw_interrupt_install(uart0->IRQ, uart_irq_handler, &serial, "UART0");
  164. /* register UART device */
  165. rt_hw_serial_register(&serial,
  166. "uart0",
  167. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  168. uart0);
  169. #endif
  170. #ifdef RT_USING_UART4
  171. struct rt_uart_ls2k *uart4;
  172. uart4 = &uart_dev4;
  173. serial4.ops = &ls2k_uart_ops;
  174. serial4.config = config;
  175. rt_hw_interrupt_install(uart4->IRQ, uart_irq_handler, &serial4, "UART4");
  176. rt_hw_serial_register(&serial4,
  177. "uart4",
  178. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  179. &uart_dev4);
  180. #endif
  181. }
  182. /*@}*/