drv_i2c.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579
  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-10-19 Nations first version
  9. */
  10. #include "drv_i2c.h"
  11. #ifdef RT_USING_I2C
  12. #define DBG_TAG "drv.I2C"
  13. #ifdef RT_I2C_DEBUG
  14. #define DBG_LVL DBG_LOG
  15. #else
  16. #define DBG_LVL DBG_INFO
  17. #endif
  18. #include <rtdbg.h>
  19. #ifdef RT_USING_I2C_BITOPS
  20. static const struct n32_soft_i2c_config soft_i2c_config[] =
  21. {
  22. #ifdef BSP_USING_I2C1
  23. I2C1_BUS_CONFIG,
  24. #endif
  25. #ifdef BSP_USING_I2C2
  26. I2C2_BUS_CONFIG,
  27. #endif
  28. #ifdef BSP_USING_I2C3
  29. I2C3_BUS_CONFIG,
  30. #endif
  31. #ifdef BSP_USING_I2C4
  32. I2C4_BUS_CONFIG,
  33. #endif
  34. };
  35. static struct n32_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];
  36. /**
  37. *\*\name n32_i2c_gpio_init
  38. *\*\fun Initializes the i2c pin.
  39. *\*\param i2c dirver class
  40. *\*\return none
  41. **/
  42. static void n32_i2c_gpio_init(struct n32_i2c *i2c)
  43. {
  44. struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)i2c->ops.data;
  45. rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
  46. rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
  47. rt_pin_write(cfg->scl, PIN_HIGH);
  48. rt_pin_write(cfg->sda, PIN_HIGH);
  49. }
  50. /**
  51. *\*\name n32_set_sda
  52. *\*\fun sets the sda pin.
  53. *\*\param data config class
  54. *\*\param state sda pin state
  55. *\*\return none
  56. **/
  57. static void n32_set_sda(void *data, rt_int32_t state)
  58. {
  59. struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)data;
  60. if (state)
  61. {
  62. rt_pin_write(cfg->sda, PIN_HIGH);
  63. }
  64. else
  65. {
  66. rt_pin_write(cfg->sda, PIN_LOW);
  67. }
  68. }
  69. /**
  70. *\*\name n32_set_scl
  71. *\*\fun sets the scl pin.
  72. *\*\param data config class
  73. *\*\param state scl pin state
  74. *\*\return none
  75. **/
  76. static void n32_set_scl(void *data, rt_int32_t state)
  77. {
  78. struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)data;
  79. if (state)
  80. {
  81. rt_pin_write(cfg->scl, PIN_HIGH);
  82. }
  83. else
  84. {
  85. rt_pin_write(cfg->scl, PIN_LOW);
  86. }
  87. }
  88. /**
  89. *\*\name n32_get_sda
  90. *\*\fun gets the sda pin state.
  91. *\*\param data config class
  92. *\*\return sda pin state
  93. **/
  94. static rt_int32_t n32_get_sda(void *data)
  95. {
  96. struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)data;
  97. return rt_pin_read(cfg->sda);
  98. }
  99. /**
  100. *\*\name n32_get_scl
  101. *\*\fun gets the scl pin state.
  102. *\*\param data config class
  103. *\*\return scl pin state
  104. **/
  105. static rt_int32_t n32_get_scl(void *data)
  106. {
  107. struct n32_soft_i2c_config* cfg = (struct n32_soft_i2c_config*)data;
  108. return rt_pin_read(cfg->scl);
  109. }
  110. /**
  111. *\*\name n32_udelay
  112. *\*\fun The time delay function.
  113. *\*\param us
  114. *\*\return none
  115. **/
  116. static void n32_udelay(rt_uint32_t us)
  117. {
  118. rt_uint32_t ticks;
  119. rt_uint32_t told, tnow, tcnt = 0;
  120. rt_uint32_t reload = SysTick->LOAD;
  121. ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
  122. told = SysTick->VAL;
  123. while (1)
  124. {
  125. tnow = SysTick->VAL;
  126. if (tnow != told)
  127. {
  128. if (tnow < told)
  129. {
  130. tcnt += told - tnow;
  131. }
  132. else
  133. {
  134. tcnt += reload - tnow + told;
  135. }
  136. told = tnow;
  137. if (tcnt >= ticks)
  138. {
  139. break;
  140. }
  141. }
  142. }
  143. }
  144. static const struct rt_i2c_bit_ops n32_bit_ops_default =
  145. {
  146. .data = RT_NULL,
  147. .set_sda = n32_set_sda,
  148. .set_scl = n32_set_scl,
  149. .get_sda = n32_get_sda,
  150. .get_scl = n32_get_scl,
  151. .udelay = n32_udelay,
  152. .delay_us = 1,
  153. .timeout = 100
  154. };
  155. /**
  156. *\*\name n32_i2c_bus_unlock
  157. *\*\fun If i2c is locked, this function will unlock it.
  158. *\*\param cfg
  159. *\*\return RT_EOK indicates successful unlock
  160. **/
  161. static rt_err_t n32_i2c_bus_unlock(const struct n32_soft_i2c_config *cfg)
  162. {
  163. rt_int32_t i = 0;
  164. if (PIN_LOW == rt_pin_read(cfg->sda))
  165. {
  166. while (i++ < 9)
  167. {
  168. rt_pin_write(cfg->scl, PIN_HIGH);
  169. n32_udelay(100);
  170. rt_pin_write(cfg->scl, PIN_LOW);
  171. n32_udelay(100);
  172. }
  173. }
  174. if (PIN_LOW == rt_pin_read(cfg->sda))
  175. {
  176. return -RT_ERROR;
  177. }
  178. return RT_EOK;
  179. }
  180. #endif /* RT_USING_I2C_BITOPS */
  181. #ifdef RT_USING_HARDWARE_I2C
  182. #define I2CT_FLAG_TIMEOUT ((uint32_t)0x1000)
  183. #define I2CT_LONG_TIMEOUT ((uint32_t)(10 * I2CT_FLAG_TIMEOUT))
  184. static uint32_t I2CTimeout = I2CT_LONG_TIMEOUT;
  185. static int rt_i2c_read(rt_uint32_t i2c_periph, rt_uint16_t slave_address, rt_uint8_t* p_buffer, rt_uint16_t data_byte)
  186. {
  187. I2CTimeout = I2CT_LONG_TIMEOUT;
  188. /* wait until I2C bus is idle */
  189. while (I2C_GetFlag((I2C_Module*)i2c_periph, I2C_FLAG_BUSY))
  190. {
  191. if ((I2CTimeout--) == 0)
  192. return 9;
  193. };
  194. I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE);
  195. /** Send START condition */
  196. I2C_GenerateStart((I2C_Module*)i2c_periph, ENABLE);
  197. I2CTimeout = I2CT_LONG_TIMEOUT;
  198. /* wait until SBSEND bit is set */
  199. while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_MODE_FLAG)) // EV5
  200. {
  201. if ((I2CTimeout--) == 0)
  202. return 10;
  203. };
  204. /* send slave address to I2C bus */
  205. I2C_SendAddr7bit((I2C_Module*)i2c_periph, slave_address, I2C_DIRECTION_RECV);
  206. I2CTimeout = I2CT_LONG_TIMEOUT;
  207. while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_RXMODE_FLAG)) // EV6
  208. {
  209. if ((I2CTimeout--) == 0)
  210. return 6;
  211. };
  212. /* while there is data to be read */
  213. while (data_byte)
  214. {
  215. /* wait until the RBNE bit is set and clear it */
  216. if (I2C_GetFlag((I2C_Module*)i2c_periph, I2C_FLAG_RXDATNE))
  217. {
  218. /* read a byte*/
  219. *p_buffer = I2C_RecvData((I2C_Module*)i2c_periph);
  220. /* point to the next location where the byte read will be saved */
  221. p_buffer++;
  222. /* decrement the read bytes counter */
  223. data_byte--;
  224. if (1 == data_byte)
  225. {
  226. /* disable acknowledge */
  227. I2C_ConfigAck((I2C_Module*)i2c_periph, DISABLE);
  228. /* send a stop condition to I2C bus */
  229. I2C_GenerateStop((I2C_Module*)i2c_periph, ENABLE);
  230. }
  231. }
  232. }
  233. /* wait until the stop condition is finished */
  234. while (I2C_GetFlag((I2C_Module*)i2c_periph, I2C_FLAG_STOPF))
  235. {
  236. if ((I2CTimeout--) == 0)
  237. return 7;
  238. };
  239. /* enable acknowledge */
  240. I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE);
  241. I2C_ConfigNackLocation((I2C_Module*)i2c_periph,I2C_NACK_POS_CURRENT);
  242. return 0;
  243. }
  244. static int rt_i2c_write(rt_uint32_t i2c_periph, uint16_t slave_address, uint8_t* p_buffer, uint16_t data_byte)
  245. {
  246. uint8_t* sendBufferPtr = p_buffer;
  247. I2CTimeout = I2CT_LONG_TIMEOUT;
  248. while (I2C_GetFlag((I2C_Module*)i2c_periph, I2C_FLAG_BUSY))
  249. {
  250. if ((I2CTimeout--) == 0)
  251. return 4;
  252. };
  253. I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE);
  254. I2C_GenerateStart((I2C_Module*)i2c_periph, ENABLE);
  255. I2CTimeout = I2CT_LONG_TIMEOUT;
  256. while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_MODE_FLAG)) // EV5
  257. {
  258. if ((I2CTimeout--) == 0)
  259. return 5;
  260. };
  261. I2C_SendAddr7bit((I2C_Module*)i2c_periph, slave_address, I2C_DIRECTION_SEND);
  262. I2CTimeout = I2CT_LONG_TIMEOUT;
  263. while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_TXMODE_FLAG)) // EV6
  264. {
  265. if ((I2CTimeout--) == 0)
  266. return 6;
  267. };
  268. /* send data */
  269. while (data_byte-- > 0)
  270. {
  271. I2C_SendData((I2C_Module*)i2c_periph, *sendBufferPtr++);
  272. I2CTimeout = I2CT_LONG_TIMEOUT;
  273. while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_DATA_SENDING)) // EV8
  274. {
  275. if ((I2CTimeout--) == 0)
  276. return 7;
  277. };
  278. };
  279. I2CTimeout = I2CT_LONG_TIMEOUT;
  280. while (!I2C_CheckEvent((I2C_Module*)i2c_periph, I2C_EVT_MASTER_DATA_SENDED)) // EV8-2
  281. {
  282. if ((I2CTimeout--) == 0)
  283. return 8;
  284. };
  285. I2C_GenerateStop((I2C_Module*)i2c_periph, ENABLE);
  286. return 0;
  287. }
  288. static rt_ssize_t rt_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
  289. {
  290. struct rt_i2c_msg *msg;
  291. rt_uint32_t i;
  292. rt_err_t ret = -RT_ERROR;
  293. struct rt_i2c_bus *rt_i2c = (struct rt_i2c_bus *)bus;
  294. for (i = 0; i < num; i++)
  295. {
  296. msg = &msgs[i];
  297. if (msg->flags & RT_I2C_RD)
  298. {
  299. if (rt_i2c_read(rt_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
  300. {
  301. LOG_E("i2c bus write failed,i2c bus stop!");
  302. goto out;
  303. }
  304. }
  305. else
  306. {
  307. if (rt_i2c_write(rt_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
  308. {
  309. LOG_E("i2c bus write failed,i2c bus stop!");
  310. goto out;
  311. }
  312. }
  313. }
  314. ret = i;
  315. return ret;
  316. out:
  317. LOG_E("send stop condition\n");
  318. return ret;
  319. }
  320. static const struct rt_i2c_bus_device_ops i2c_ops =
  321. {
  322. rt_i2c_xfer,
  323. RT_NULL,
  324. RT_NULL
  325. };
  326. #endif /* RT_USING_HARDWARE_I2C */
  327. int rt_hw_i2c_init(void)
  328. {
  329. #ifdef RT_USING_I2C_BITOPS
  330. rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct n32_i2c);
  331. rt_err_t result;
  332. for(int i = 0; i < obj_num; i++)
  333. {
  334. i2c_obj[i].ops = n32_bit_ops_default;
  335. i2c_obj[i].ops.data = (void*)&soft_i2c_config[i];
  336. i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops;
  337. n32_i2c_gpio_init(&i2c_obj[i]);
  338. result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name);
  339. RT_ASSERT(result == RT_EOK);
  340. n32_i2c_bus_unlock(&soft_i2c_config[i]);
  341. rt_kprintf("software simulation %s init done, pin scl: %d, pin sda %d",
  342. soft_i2c_config[i].bus_name,
  343. soft_i2c_config[i].scl,
  344. soft_i2c_config[i].sda);
  345. }
  346. #endif /* RT_USING_I2C_BITOPS */
  347. #ifdef RT_USING_HARDWARE_I2C
  348. GPIO_InitType GPIO_InitStructure;
  349. I2C_InitType I2C_InitStructure;
  350. #ifdef BSP_USING_I2C1
  351. #define I2C1_SPEED 400000
  352. static struct rt_i2c_bus i2c_bus1;
  353. #if defined(SOC_N32G45X) || defined(SOC_N32WB452)
  354. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);
  355. RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C1, ENABLE);
  356. GPIO_InitStruct(&GPIO_InitStructure);
  357. /* connect PB8 to I2C1_SCL, PB9 to I2C1_SDA */
  358. GPIO_InitStructure.Pin = GPIO_PIN_8 | GPIO_PIN_9;
  359. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  360. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
  361. GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
  362. GPIO_ConfigPinRemap(GPIO_RMP_I2C1, ENABLE);
  363. #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
  364. /* Enable I2C clock */
  365. RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C1, ENABLE);
  366. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);
  367. GPIO_InitStruct(&GPIO_InitStructure);
  368. /* Confige I2C1_SCL(PB8) and I2C1_SDA(PB9) */
  369. GPIO_InitStructure.Pin = GPIO_PIN_8 | GPIO_PIN_9;
  370. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
  371. GPIO_InitStructure.GPIO_Pull = GPIO_Pull_Up;
  372. GPIO_InitStructure.GPIO_Alternate = GPIO_AF4_I2C1;
  373. GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
  374. #endif
  375. I2C_DeInit(I2C1);
  376. I2C_InitStructure.BusMode = I2C_BUSMODE_I2C;
  377. I2C_InitStructure.FmDutyCycle = I2C_FMDUTYCYCLE_2;
  378. I2C_InitStructure.OwnAddr1 = 0xff;
  379. I2C_InitStructure.AckEnable = I2C_ACKEN;
  380. I2C_InitStructure.AddrMode = I2C_ADDR_MODE_7BIT;
  381. I2C_InitStructure.ClkSpeed = I2C1_SPEED; // 400000 400K
  382. I2C_Init(I2C1, &I2C_InitStructure);
  383. rt_memset((void *)&i2c_bus1, 0, sizeof(struct rt_i2c_bus));
  384. i2c_bus1.parent.ops = &i2c_ops;
  385. i2c_bus1.i2c_periph = (rt_uint32_t)I2C1;
  386. rt_i2c_bus_device_register(&i2c_bus1.parent, "i2c1");
  387. #endif
  388. #ifdef BSP_USING_I2C2
  389. #define I2C2_SPEED 100000
  390. static struct rt_i2c_bus i2c_bus2;
  391. #if defined(SOC_N32G45X) || defined(SOC_N32WB452)
  392. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
  393. RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C2, ENABLE);
  394. GPIO_InitStruct(&GPIO_InitStructure);
  395. /* connect PB10 to I2C2_SCL, PB11 to I2C2_SDA */
  396. GPIO_InitStructure.Pin = GPIO_PIN_10 | GPIO_PIN_11;
  397. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  398. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
  399. GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
  400. #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
  401. /* Enable I2C clock */
  402. RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C2, ENABLE);
  403. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);
  404. GPIO_InitStruct(&GPIO_InitStructure);
  405. /* Confige I2C1_SCL(PB10) and I2C1_SDA(PB11) */
  406. GPIO_InitStructure.Pin = GPIO_PIN_10 | GPIO_PIN_11;
  407. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
  408. GPIO_InitStructure.GPIO_Pull = GPIO_Pull_Up;
  409. GPIO_InitStructure.GPIO_Alternate = GPIO_AF6_I2C2;
  410. GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
  411. #endif
  412. I2C_DeInit(I2C2);
  413. I2C_InitStructure.BusMode = I2C_BUSMODE_I2C;
  414. I2C_InitStructure.FmDutyCycle = I2C_FMDUTYCYCLE_2;
  415. I2C_InitStructure.OwnAddr1 = 0xff;
  416. I2C_InitStructure.AckEnable = I2C_ACKEN;
  417. I2C_InitStructure.AddrMode = I2C_ADDR_MODE_7BIT;
  418. I2C_InitStructure.ClkSpeed = I2C2_SPEED; // 100000 100K
  419. I2C_Init(I2C2, &I2C_InitStructure);
  420. rt_memset((void *)&i2c_bus2, 0, sizeof(struct rt_i2c_bus));
  421. i2c_bus2.parent.ops = &i2c_ops;
  422. i2c_bus2.i2c_periph = (rt_uint32_t)I2C2;
  423. rt_i2c_bus_device_register(&i2c_bus2.parent, "i2c2");
  424. #endif
  425. #if defined(SOC_N32G45X) || defined(SOC_N32WB452)
  426. #ifdef BSP_USING_I2C3
  427. #define I2C3_SPEED 100000
  428. static struct rt_i2c_bus i2c_bus3;
  429. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
  430. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_I2C3, ENABLE);
  431. GPIO_InitStruct(&GPIO_InitStructure);
  432. /* connect PC0 to I2C3_SCL, PC1 to I2C3_SDA */
  433. GPIO_InitStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
  434. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  435. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
  436. GPIO_InitPeripheral(GPIOC, &GPIO_InitStructure);
  437. I2C_DeInit(I2C3);
  438. I2C_InitStructure.BusMode = I2C_BUSMODE_I2C;
  439. I2C_InitStructure.FmDutyCycle = I2C_FMDUTYCYCLE_2;
  440. I2C_InitStructure.OwnAddr1 = 0xff;
  441. I2C_InitStructure.AckEnable = I2C_ACKEN;
  442. I2C_InitStructure.AddrMode = I2C_ADDR_MODE_7BIT;
  443. I2C_InitStructure.ClkSpeed = I2C3_SPEED; // 100000 100K
  444. I2C_Init(I2C3, &I2C_InitStructure);
  445. rt_memset((void *)&i2c_bus3, 0, sizeof(struct rt_i2c_bus));
  446. i2c_bus3.parent.ops = &i2c_ops;
  447. i2c_bus3.i2c_periph = (rt_uint32_t)I2C3;
  448. rt_i2c_bus_device_register(&i2c_bus3.parent, "i2c3");
  449. #endif
  450. #ifdef BSP_USING_I2C4
  451. #define I2C4_SPEED 100000
  452. static struct rt_i2c_bus i2c_bus4;
  453. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
  454. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_I2C4, ENABLE);
  455. GPIO_InitStruct(&GPIO_InitStructure);
  456. /* connect PC6 to I2C4_SCL, PC7 to I2C4_SDA */
  457. GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
  458. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  459. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
  460. GPIO_InitPeripheral(GPIOC, &GPIO_InitStructure);
  461. I2C_DeInit(I2C4);
  462. I2C_InitStructure.BusMode = I2C_BUSMODE_I2C;
  463. I2C_InitStructure.FmDutyCycle = I2C_FMDUTYCYCLE_2;
  464. I2C_InitStructure.OwnAddr1 = 0xff;
  465. I2C_InitStructure.AckEnable = I2C_ACKEN;
  466. I2C_InitStructure.AddrMode = I2C_ADDR_MODE_7BIT;
  467. I2C_InitStructure.ClkSpeed = I2C4_SPEED; // 100000 100K
  468. I2C_Init(I2C4, &I2C_InitStructure);
  469. rt_memset((void *)&i2c_bus4, 0, sizeof(struct rt_i2c_bus));
  470. i2c_bus4.parent.ops = &i2c_ops;
  471. i2c_bus4.i2c_periph = (rt_uint32_t)I2C4;
  472. rt_i2c_bus_device_register(&i2c_bus4.parent, "i2c4");
  473. #endif
  474. #endif
  475. #endif /* RT_USING_HARDWARE_I2C */
  476. return RT_EOK;
  477. }
  478. INIT_DEVICE_EXPORT(rt_hw_i2c_init);
  479. #endif
  480. /* end of i2c driver */