drv_gpio.c 12 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-06-16 guohp1128 first version
  9. */
  10. #include "drv_gpio.h"
  11. #ifdef RT_USING_PIN
  12. static const struct pin_index pins[] =
  13. {
  14. __NRF5X_PIN(0 , 0, 0 ),
  15. __NRF5X_PIN(1 , 0, 1 ),
  16. __NRF5X_PIN(2 , 0, 2 ),
  17. __NRF5X_PIN(3 , 0, 3 ),
  18. __NRF5X_PIN(4 , 0, 4 ),
  19. __NRF5X_PIN(5 , 0, 5 ),
  20. __NRF5X_PIN(6 , 0, 6 ),
  21. __NRF5X_PIN(7 , 0, 7 ),
  22. __NRF5X_PIN(8 , 0, 8 ),
  23. __NRF5X_PIN(9 , 0, 9 ),
  24. __NRF5X_PIN(10, 0, 10),
  25. __NRF5X_PIN(11, 0, 11),
  26. __NRF5X_PIN(12, 0, 12),
  27. __NRF5X_PIN(13, 0, 13),
  28. __NRF5X_PIN(14, 0, 14),
  29. __NRF5X_PIN(15, 0, 15),
  30. __NRF5X_PIN(16, 0, 16),
  31. __NRF5X_PIN(17, 0, 17),
  32. __NRF5X_PIN(18, 0, 18),
  33. __NRF5X_PIN(19, 0, 19),
  34. __NRF5X_PIN(20, 0, 20),
  35. __NRF5X_PIN(21, 0, 21),
  36. __NRF5X_PIN(22, 0, 22),
  37. __NRF5X_PIN(23, 0, 23),
  38. __NRF5X_PIN(24, 0, 24),
  39. __NRF5X_PIN(25, 0, 25),
  40. __NRF5X_PIN(26, 0, 26),
  41. __NRF5X_PIN(27, 0, 27),
  42. __NRF5X_PIN(28, 0, 28),
  43. __NRF5X_PIN(29, 0, 29),
  44. __NRF5X_PIN(30, 0, 30),
  45. __NRF5X_PIN(31, 0, 31),
  46. #if defined(SOC_NRF52840) || defined(SOC_NRF5340)
  47. __NRF5X_PIN(32, 1, 0 ),
  48. __NRF5X_PIN(33, 1, 1 ),
  49. __NRF5X_PIN(34, 1, 2 ),
  50. __NRF5X_PIN(35, 1, 3 ),
  51. __NRF5X_PIN(36, 1, 4 ),
  52. __NRF5X_PIN(37, 1, 5 ),
  53. __NRF5X_PIN(38, 1, 6 ),
  54. __NRF5X_PIN(39, 1, 7 ),
  55. __NRF5X_PIN(40, 1, 8 ),
  56. __NRF5X_PIN(41, 1, 9 ),
  57. __NRF5X_PIN(42, 1, 10),
  58. __NRF5X_PIN(43, 1, 11),
  59. __NRF5X_PIN(44, 1, 12),
  60. __NRF5X_PIN(45, 1, 13),
  61. __NRF5X_PIN(46, 1, 14),
  62. __NRF5X_PIN(47, 1, 15),
  63. #endif /* SOC_NRF52840 5340*/
  64. };
  65. /* EVENTS_IN[n](n=0..7) and EVENTS_PORT */
  66. static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
  67. {
  68. {-1, 0, RT_NULL, RT_NULL},
  69. {-1, 0, RT_NULL, RT_NULL},
  70. {-1, 0, RT_NULL, RT_NULL},
  71. {-1, 0, RT_NULL, RT_NULL},
  72. {-1, 0, RT_NULL, RT_NULL},
  73. {-1, 0, RT_NULL, RT_NULL},
  74. {-1, 0, RT_NULL, RT_NULL},
  75. {-1, 0, RT_NULL, RT_NULL},
  76. {-1, 0, RT_NULL, RT_NULL},
  77. };
  78. #define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
  79. /* pin: the number of pins */
  80. static const struct pin_index *get_pin(uint8_t pin)
  81. {
  82. const struct pin_index *index;
  83. if (pin < ITEM_NUM(pins))
  84. {
  85. index = &pins[pin];
  86. if (index->index == -1)
  87. index = RT_NULL;
  88. }
  89. else
  90. {
  91. index = RT_NULL;
  92. }
  93. return index;
  94. };
  95. static void nrf5x_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
  96. {
  97. const struct pin_index *index;
  98. index = get_pin(pin);
  99. if (index == RT_NULL)
  100. {
  101. return;
  102. }
  103. nrf_gpio_pin_write(pin, value);
  104. }
  105. static int nrf5x_pin_read(rt_device_t dev, rt_base_t pin)
  106. {
  107. int value;
  108. const struct pin_index *index;
  109. value = PIN_LOW;
  110. index = get_pin(pin);
  111. if (index == RT_NULL)
  112. {
  113. return value;
  114. }
  115. value = nrf_gpio_pin_read(pin);
  116. return value;
  117. }
  118. static void nrf5x_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
  119. {
  120. const struct pin_index *index;
  121. index = get_pin(pin);
  122. if (index == RT_NULL)
  123. {
  124. return;
  125. }
  126. if (mode == PIN_MODE_OUTPUT)
  127. {
  128. /* output setting */
  129. nrf_gpio_cfg_output(pin);
  130. }
  131. else if (mode == PIN_MODE_INPUT)
  132. {
  133. /* input setting: not pull. */
  134. nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL);
  135. }
  136. else if (mode == PIN_MODE_INPUT_PULLUP)
  137. {
  138. /* input setting: pull up. */
  139. nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_PULLUP);
  140. }
  141. else if (mode == PIN_MODE_INPUT_PULLDOWN)
  142. {
  143. /* input setting: pull down. */
  144. nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_PULLDOWN);
  145. }
  146. else if (mode == PIN_MODE_OUTPUT_OD)
  147. {
  148. /* output setting: od. */
  149. nrf_gpio_cfg(
  150. pin,
  151. NRF_GPIO_PIN_DIR_OUTPUT,
  152. NRF_GPIO_PIN_INPUT_DISCONNECT,
  153. NRF_GPIO_PIN_NOPULL,
  154. NRF_GPIO_PIN_S0D1,
  155. NRF_GPIO_PIN_NOSENSE);
  156. }
  157. }
  158. static void pin_irq_hdr(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
  159. {
  160. int i;
  161. int irq_quantity;
  162. irq_quantity = ITEM_NUM(pin_irq_hdr_tab);
  163. for(i = 0; i < irq_quantity; i++)
  164. {
  165. if(pin_irq_hdr_tab[i].pin == pin)
  166. {
  167. pin_irq_hdr_tab[i].hdr(pin_irq_hdr_tab[i].args);
  168. }
  169. }
  170. }
  171. /* args = true : hi_accuracy(IN_EVENT)
  172. * args = false: lo_accuracy(PORT_EVENT)
  173. */
  174. static rt_err_t nrf5x_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
  175. rt_uint32_t mode, void (*hdr)(void *args), void *args)
  176. {
  177. const struct pin_index *index;
  178. rt_int32_t irqindex = -1;
  179. rt_base_t level;
  180. nrfx_err_t err_code;
  181. int i;
  182. int irq_quantity;
  183. index = get_pin(pin);
  184. if (index == RT_NULL)
  185. {
  186. return RT_ENOSYS;
  187. }
  188. irq_quantity = ITEM_NUM(pin_irq_hdr_tab);
  189. for(i = 0; i < irq_quantity; i++)
  190. {
  191. if(pin_irq_hdr_tab[i].pin != -1)
  192. {
  193. irqindex = -1;
  194. continue;
  195. }
  196. else
  197. {
  198. irqindex = i;
  199. break;
  200. }
  201. }
  202. if(irqindex == -1)
  203. {
  204. return RT_ENOMEM;
  205. }
  206. level = rt_hw_interrupt_disable();
  207. pin_irq_hdr_tab[irqindex].pin = pin;
  208. pin_irq_hdr_tab[irqindex].hdr = hdr;
  209. pin_irq_hdr_tab[irqindex].mode = mode;
  210. pin_irq_hdr_tab[irqindex].args = args;
  211. if(mode == PIN_IRQ_MODE_RISING)
  212. {
  213. nrfx_gpiote_in_config_t inConfig = NRFX_GPIOTE_CONFIG_IN_SENSE_LOTOHI(args);
  214. inConfig.pull = NRF_GPIO_PIN_PULLDOWN;
  215. err_code = nrfx_gpiote_in_init(pin, &inConfig, pin_irq_hdr);
  216. }
  217. else if(mode == PIN_IRQ_MODE_FALLING)
  218. {
  219. nrfx_gpiote_in_config_t inConfig = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(args);
  220. inConfig.pull = NRF_GPIO_PIN_PULLUP;
  221. err_code = nrfx_gpiote_in_init(pin, &inConfig, pin_irq_hdr);
  222. }
  223. else if(mode == PIN_IRQ_MODE_RISING_FALLING)
  224. {
  225. nrfx_gpiote_in_config_t inConfig = NRFX_GPIOTE_CONFIG_IN_SENSE_TOGGLE(args);
  226. inConfig.pull = NRF_GPIO_PIN_PULLUP;
  227. err_code = nrfx_gpiote_in_init(pin, &inConfig, pin_irq_hdr);
  228. }
  229. rt_hw_interrupt_enable(level);
  230. switch(err_code)
  231. {
  232. case NRFX_ERROR_BUSY:
  233. return RT_EBUSY;
  234. case NRFX_SUCCESS:
  235. return RT_EOK;
  236. case NRFX_ERROR_NO_MEM:
  237. return RT_ENOMEM;
  238. default:
  239. return -RT_ERROR;
  240. }
  241. }
  242. static rt_err_t nrf5x_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
  243. {
  244. const struct pin_index *index;
  245. rt_base_t level;
  246. int i;
  247. int irq_quantity;
  248. index = get_pin(pin);
  249. if (index == RT_NULL)
  250. {
  251. return RT_ENOSYS;
  252. }
  253. irq_quantity = ITEM_NUM(pin_irq_hdr_tab);
  254. for(i = 0; i < irq_quantity; i++)
  255. {
  256. if(pin_irq_hdr_tab[i].pin == pin)
  257. {
  258. level = rt_hw_interrupt_disable();
  259. pin_irq_hdr_tab[i].pin = -1;
  260. pin_irq_hdr_tab[i].hdr = RT_NULL;
  261. pin_irq_hdr_tab[i].mode = 0;
  262. pin_irq_hdr_tab[i].args = RT_NULL;
  263. nrfx_gpiote_in_uninit(pin);
  264. rt_hw_interrupt_enable(level);
  265. break;
  266. }
  267. }
  268. if(i >= irq_quantity)
  269. {
  270. return RT_ENOSYS;
  271. }
  272. return RT_EOK;
  273. }
  274. static rt_err_t nrf5x_pin_irq_enable(struct rt_device *device, rt_base_t pin,
  275. rt_uint32_t enabled)
  276. {
  277. const struct pin_index *index;
  278. rt_base_t level;
  279. int i;
  280. int irq_quantity;
  281. index = get_pin(pin);
  282. if (index == RT_NULL)
  283. {
  284. return RT_ENOSYS;
  285. }
  286. irq_quantity = ITEM_NUM(pin_irq_hdr_tab);
  287. for(i = 0; i < irq_quantity; i++)
  288. {
  289. if(pin_irq_hdr_tab[i].pin == pin)
  290. {
  291. level = rt_hw_interrupt_disable();
  292. if(enabled == PIN_IRQ_ENABLE)
  293. {
  294. nrfx_gpiote_in_event_enable(pin,enabled);
  295. }
  296. else if(enabled == PIN_IRQ_DISABLE)
  297. {
  298. nrfx_gpiote_in_event_disable(pin);
  299. }
  300. rt_hw_interrupt_enable(level);
  301. break;
  302. }
  303. }
  304. if(i >= irq_quantity)
  305. {
  306. return RT_ENOSYS;
  307. }
  308. return RT_EOK;
  309. }
  310. const static struct rt_pin_ops _nrf5x_pin_ops =
  311. {
  312. nrf5x_pin_mode,
  313. nrf5x_pin_write,
  314. nrf5x_pin_read,
  315. nrf5x_pin_attach_irq,
  316. nrf5x_pin_dettach_irq,
  317. nrf5x_pin_irq_enable,
  318. RT_NULL,
  319. };
  320. rt_err_t rt_hw_pin_init(void)
  321. {
  322. nrfx_err_t err_code;
  323. err_code = (nrfx_err_t)rt_device_pin_register("pin", &_nrf5x_pin_ops, RT_NULL);
  324. err_code = nrfx_gpiote_init(NRFX_GPIOTE_CONFIG_IRQ_PRIORITY);
  325. switch(err_code)
  326. {
  327. case NRFX_ERROR_INVALID_STATE:
  328. return -RT_EINVAL;
  329. case NRFX_SUCCESS:
  330. return RT_EOK;
  331. default:
  332. return -RT_ERROR;;
  333. }
  334. }
  335. INIT_BOARD_EXPORT(rt_hw_pin_init);
  336. #if defined(SOC_NRF5340)
  337. /* test GPIO write, read, input interrupt */
  338. #define DK_BOARD_LED_1 28
  339. #define DK_BOARD_LED_2 29
  340. #define DK_BOARD_LED_3 30
  341. #define DK_BOARD_LED_4 31
  342. #define DK_BOARD_BUTTON_1 23
  343. #define DK_BOARD_BUTTON_2 24
  344. #define DK_BOARD_BUTTON_3 8
  345. #define DK_BOARD_BUTTON_4 9
  346. #else
  347. /* test GPIO write, read, input interrupt */
  348. #define DK_BOARD_LED_1 13
  349. #define DK_BOARD_LED_2 14
  350. #define DK_BOARD_LED_3 15
  351. #define DK_BOARD_LED_4 16
  352. #define DK_BOARD_BUTTON_1 11
  353. #define DK_BOARD_BUTTON_2 12
  354. #define DK_BOARD_BUTTON_3 24
  355. #define DK_BOARD_BUTTON_4 25
  356. #endif
  357. void button_1_callback(void *args)
  358. {
  359. static int flag1 = 0;
  360. if(flag1 == 0)
  361. {
  362. flag1 = 1;
  363. rt_pin_write(DK_BOARD_LED_1, PIN_LOW);
  364. }
  365. else
  366. {
  367. flag1 = 0;
  368. rt_pin_write(DK_BOARD_LED_1, PIN_HIGH);
  369. }
  370. }
  371. void button_2_callback(void *args)
  372. {
  373. static int flag2 = 0;
  374. if(flag2 == 0)
  375. {
  376. flag2 = 1;
  377. rt_pin_write(DK_BOARD_LED_2, PIN_LOW);
  378. }
  379. else
  380. {
  381. flag2 = 0;
  382. rt_pin_write(DK_BOARD_LED_2, PIN_HIGH);
  383. }
  384. }
  385. void button_3_callback(void *args)
  386. {
  387. static int flag3 = 0;
  388. if(flag3 == 0)
  389. {
  390. flag3 = 1;
  391. rt_pin_write(DK_BOARD_LED_3, PIN_LOW);
  392. }
  393. else
  394. {
  395. flag3 = 0;
  396. rt_pin_write(DK_BOARD_LED_3, PIN_HIGH);
  397. }
  398. }
  399. void button_4_callback(void *args)
  400. {
  401. static int flag4 = 0;
  402. if(flag4 == 0)
  403. {
  404. flag4 = 1;
  405. rt_pin_write(DK_BOARD_LED_4, PIN_LOW);
  406. }
  407. else
  408. {
  409. flag4 = 0;
  410. rt_pin_write(DK_BOARD_LED_4, PIN_HIGH);
  411. }
  412. }
  413. void gpio_sample(void)
  414. {
  415. rt_pin_mode(DK_BOARD_LED_1, PIN_MODE_OUTPUT);
  416. rt_pin_mode(DK_BOARD_LED_2, PIN_MODE_OUTPUT);
  417. rt_pin_mode(DK_BOARD_LED_3, PIN_MODE_OUTPUT);
  418. rt_pin_mode(DK_BOARD_LED_4, PIN_MODE_OUTPUT);
  419. rt_pin_write(DK_BOARD_LED_1, PIN_HIGH);
  420. rt_pin_write(DK_BOARD_LED_2, PIN_HIGH);
  421. rt_pin_write(DK_BOARD_LED_3, PIN_HIGH);
  422. rt_pin_write(DK_BOARD_LED_4, PIN_HIGH);
  423. rt_pin_attach_irq(DK_BOARD_BUTTON_1, PIN_IRQ_MODE_FALLING,
  424. button_1_callback, (void*) true); //true: hi_accuracy(IN_EVENT),false: lo_accuracy(PORT_EVENT)
  425. rt_pin_irq_enable(DK_BOARD_BUTTON_1, PIN_IRQ_ENABLE);
  426. rt_pin_attach_irq(DK_BOARD_BUTTON_2, PIN_IRQ_MODE_FALLING,
  427. button_2_callback, (void*) true); //true: hi_accuracy(IN_EVENT),false: lo_accuracy(PORT_EVENT)
  428. rt_pin_irq_enable(DK_BOARD_BUTTON_2, PIN_IRQ_ENABLE);
  429. rt_pin_attach_irq(DK_BOARD_BUTTON_3, PIN_IRQ_MODE_FALLING,
  430. button_3_callback, (void*) true); //true: hi_accuracy(IN_EVENT),false: lo_accuracy(PORT_EVENT)
  431. rt_pin_irq_enable(DK_BOARD_BUTTON_3, PIN_IRQ_ENABLE);
  432. rt_pin_attach_irq(DK_BOARD_BUTTON_4, PIN_IRQ_MODE_FALLING,
  433. button_4_callback, (void*) false); //true: hi_accuracy(IN_EVENT),false: lo_accuracy(PORT_EVENT)
  434. rt_pin_irq_enable(DK_BOARD_BUTTON_4, PIN_IRQ_ENABLE);
  435. }
  436. MSH_CMD_EXPORT(gpio_sample, gpio sample);
  437. #endif /* RT_USING_PIN */