board.h 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103
  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2024-04-10 RealThread first version
  9. */
  10. #ifndef __BOARD_H__
  11. #define __BOARD_H__
  12. #include <rtthread.h>
  13. #include <stm32h7rsxx.h>
  14. #include "drv_common.h"
  15. #include "drv_gpio.h"
  16. #ifdef __cplusplus
  17. extern "C" {
  18. #endif
  19. /*-------------------------- CHIP CONFIG BEGIN --------------------------*/
  20. #define CHIP_FAMILY_STM32
  21. #define CHIP_SERIES_STM32H7RS
  22. #define CHIP_NAME_STM32H750XBHX
  23. /*-------------------------- CHIP CONFIG END --------------------------*/
  24. /*-------------------------- ROM/RAM CONFIG BEGIN --------------------------*/
  25. /**
  26. * @brief H7RS7 SRAM MEMORY Layout
  27. * 0x24060000 - 0x23071FFF AXI SRAM shared with ECC
  28. * 0x24040000 - 0x2305FFFF AXI SRAM shared with DTCM
  29. * 0x24020000 - 0x2403FFFF AXI SRAM
  30. * 0x24000000 - 0x2401FFFF AXI SRAM shared with ITCM
  31. */
  32. #define ROM_START ((uint32_t)0x70000000)
  33. #define ROM_SIZE (131072)
  34. #define ROM_END ((uint32_t)(ROM_START + ROM_SIZE * 1024))
  35. #define RAM_START (0x24000000)
  36. #define RAM_SIZE (456)
  37. #define RAM_END (RAM_START + RAM_SIZE * 1024)
  38. /*-------------------------- ROM/RAM CONFIG END --------------------------*/
  39. /*-------------------------- CLOCK CONFIG BEGIN --------------------------*/
  40. #define BSP_CLOCK_SOURCE ("HSE")
  41. #define BSP_CLOCK_SOURCE_FREQ_MHZ ((int32_t)0)
  42. #define BSP_CLOCK_SYSTEM_FREQ_MHZ ((int32_t)480)
  43. /*-------------------------- CLOCK CONFIG END --------------------------*/
  44. /*-------------------------- UART CONFIG BEGIN --------------------------*/
  45. /** After configuring corresponding UART or UART DMA, you can use it.
  46. *
  47. * STEP 1, define macro define related to the serial port opening based on the serial port number
  48. * such as #define BSP_USING_UATR1
  49. *
  50. * STEP 2, according to the corresponding pin of serial port, define the related serial port information macro
  51. * such as #define BSP_UART1_TX_PIN "PA9"
  52. * #define BSP_UART1_RX_PIN "PA10"
  53. *
  54. * STEP 3, if you want using SERIAL DMA, you must open it in the RT-Thread Settings.
  55. * RT-Thread Setting -> Components -> Device Drivers -> Serial Device Drivers -> Enable Serial DMA Mode
  56. *
  57. * STEP 4, according to serial port number to define serial port tx/rx DMA function in the board.h file
  58. * such as #define BSP_UART1_RX_USING_DMA
  59. *
  60. */
  61. #define STM32_FLASH_START_ADRESS ROM_START
  62. #define STM32_FLASH_SIZE ROM_SIZE
  63. #define STM32_FLASH_END_ADDRESS ROM_END
  64. #define STM32_SRAM1_SIZE RAM_SIZE
  65. #define STM32_SRAM1_START RAM_START
  66. #define STM32_SRAM1_END RAM_END
  67. #if defined(__ARMCC_VERSION)
  68. extern int Image$$RW_IRAM1$$ZI$$Limit;
  69. #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
  70. #elif __ICCARM__
  71. #pragma section="CSTACK"
  72. #define HEAP_BEGIN (__segment_end("CSTACK"))
  73. #else
  74. extern int __bss_end;
  75. #define HEAP_BEGIN (&__bss_end)
  76. #endif
  77. #define HEAP_END STM32_SRAM1_END
  78. void SystemClock_Config(void);
  79. #ifdef __cplusplus
  80. }
  81. #endif
  82. #endif