rt-thread/bsp/bf533/vdsp/bf533_sdram_64M.ldf

/* MANAGED-BY-SYSTEM-BUILDER                                    */
/* VisualDSP++ 5.0 Update 6                                     */
/* LDF Printer version: 5.6.0.4                                 */
/* ldfgen.exe version: 5.6.0.4                                  */
/* VDSG version: 5.6.0.4                                        */

/*
** ADSP-BF533 linker description file generated on Feb 22, 2012 at 14:26:29.
**
** Copyright (C) 2000-2008 Analog Devices Inc., All Rights Reserved.
**
** This file is generated automatically based upon the options selected
** in the LDF Wizard. Changes to the LDF configuration should be made by
** changing the appropriate options rather than editing this file.
**
** Configuration:-
**     crt_doj:                                bf533_basiccrt.doj
**     processor:                              ADSP-BF533
**     product_name:                           VisualDSP++ 5.0 Update 6
**     si_revision:                            automatic
**     default_silicon_revision_from_archdef:  0.5
**     cplb_init_cplb_ctrl:                    (
**                                              CPLB_ENABLE_ICACHE
**                                              CPLB_ENABLE_DCACHE
**                                              CPLB_ENABLE_DCACHE2
**                                              CPLB_ENABLE_CPLBS
**                                              CPLB_ENABLE_ICPLBS
**                                              CPLB_ENABLE_DCPLBS
**                                             )
**     using_cplusplus:                        true
**     mem_init:                               false
**     use_vdk:                                false
**     use_eh:                                 true
**     use_argv:                               false
**     running_from_internal_memory:           true
**     user_heap_src_file:                     E:\eclipse\3m_dsp\ARZ-3M3B-DSP_base26\rt-thread\bsp\bf533\vdsp\bf533_heaptab.c
**     libraries_use_stdlib:                   true
**     libraries_use_fileio_libs:              false
**     libraries_use_ieeefp_emulation_libs:    false
**     libraries_use_eh_enabled_libs:          false
**     system_heap:                            L1
**     system_heap_min_size:                   1k
**     system_stack:                           L1
**     system_stack_min_size:                  1k
**     use_sdram:                              true
**     use_sdram_size:                         64MB
**     use_sdram_partitioned:                  none
**
*/

ARCHITECTURE(ADSP-BF533)

SEARCH_DIR($ADI_DSP/Blackfin/lib)


// Workarounds are enabled, exceptions are disabled.
#define RT_LIB_NAME(x) lib ## x ## y.dlb
#define RT_LIB_NAME_EH(x) lib ## x ## y.dlb
#define RT_LIB_NAME_MT(x) lib ## x ## y.dlb
#define RT_LIB_NAME_EH_MT(x) lib ## x ## y.dlb
#define RT_OBJ_NAME(x) x ## y.doj
#define RT_OBJ_NAME_MT(x) x ## mty.doj


$LIBRARIES = 

/*$VDSG<insert-user-libraries-at-beginning>                     */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-libraries-at-beginning>                     */

   RT_LIB_NAME_MT(small532)
   ,RT_LIB_NAME_MT(io532)
   ,RT_LIB_NAME_MT(c532)
   ,RT_LIB_NAME_MT(event532)
   ,RT_LIB_NAME_MT(x532)
   ,RT_LIB_NAME_EH_MT(cpp532)
   ,RT_LIB_NAME_EH_MT(cpprt532)
   ,RT_LIB_NAME(f64ieee532)
   ,RT_LIB_NAME(dsp532)
   ,RT_LIB_NAME(sftflt532)
   ,RT_LIB_NAME(etsi532)
   ,RT_LIB_NAME(ssl532)
   ,RT_LIB_NAME(drv532)
   ,RT_LIB_NAME(usb532)
   ,RT_OBJ_NAME_MT(idle532)
   ,RT_LIB_NAME_MT(rt_fileio532)

/*$VDSG<insert-user-libraries-at-end>                           */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-libraries-at-end>                           */

   ;

$OBJECTS = 
   "bf533_basiccrt.doj"

/*$VDSG<insert-user-objects-at-beginning>                       */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-objects-at-beginning>                       */

   , RT_LIB_NAME(profile532)
   , $COMMAND_LINE_OBJECTS
   , "cplbtab533.doj"

/*$VDSG<insert-user-objects-at-end>                             */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-objects-at-end>                             */

   , RT_OBJ_NAME(crtn532)
   ;

$OBJS_LIBS_INTERNAL = 

/*$VDSG<insert-libraries-internal>                              */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-libraries-internal>                              */

   $OBJECTS{prefersMem("internal")}, $LIBRARIES{prefersMem("internal")}

/*$VDSG<insert-libraries-internal-end>                          */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-libraries-internal-end>                          */

   ;

$OBJS_LIBS_NOT_EXTERNAL = 

/*$VDSG<insert-libraries-not-external>                          */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-libraries-not-external>                          */

   $OBJECTS{!prefersMem("external")}, $LIBRARIES{!prefersMem("external")}

/*$VDSG<insert-libraries-not-external-end>                      */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-libraries-not-external-end>                      */

   ;


/*$VDSG<insert-user-macros>                                     */
/* Text inserted between these $VDSG comments will be preserved */
/*$VDSG<insert-user-macros>                                     */


/*$VDSG<customize-async-macros>                                 */
/* This code is preserved if the LDF is re-generated.           */


#define ASYNC0_MEMTYPE RAM
#define ASYNC1_MEMTYPE RAM
#define ASYNC2_MEMTYPE RAM
#define ASYNC3_MEMTYPE RAM


/*$VDSG<customize-async-macros>                                 */


MEMORY
{
/*
** ADSP-BF533 MEMORY MAP.
**
** The known memory spaces are as follows:
**
** 0xFFE00000 - 0xFFFFFFFF  Core MMR registers (2MB)
** 0xFFC00000 - 0xFFDFFFFF  System MMR registers (2MB)
** 0xFFB01000 - 0xFFBFFFFF  Reserved
** 0xFFB00000 - 0xFFB00FFF  Scratch SRAM (4K)
** 0xFFA14000 - 0xFFAFFFFF  Reserved
** 0xFFA10000 - 0xFFA13FFF  Code SRAM / cache (16K)
** 0xFFA00000 - 0xFFA0FFFF  Code SRAM (64K)
** 0xFF908000 - 0xFF9FFFFF  Reserved
** 0xFF904000 - 0xFF907FFF  Data Bank B SRAM / cache (16K)
** 0xFF900000 - 0xFF903FFF  Data Bank B SRAM (16K)
** 0xFF808000 - 0xFF8FFFFF  Reserved
** 0xFF804000 - 0xFF807FFF  Data Bank A SRAM / cache (16K)
** 0xFF800000 - 0xFF803FFF  Data Bank A SRAM (16K)
** 0xEF000000 - 0xFF7FFFFF  Reserved
** 0x20400000 - 0xEEFFFFFF  Reserved
** 0x20300000 - 0x203FFFFF  ASYNC MEMORY BANK 3 (1MB)
** 0x20200000 - 0x202FFFFF  ASYNC MEMORY BANK 2 (1MB)
** 0x20100000 - 0x201FFFFF  ASYNC MEMORY BANK 1 (1MB)
** 0x20000000 - 0x200FFFFF  ASYNC MEMORY BANK 0 (1MB)
** 0x00000000 - 0x07FFFFFF  SDRAM MEMORY (16MB - 128MB)
*/

   MEM_L1_SCRATCH          { TYPE(RAM) START(0xFFB00000) END(0xFFB00FFF) WIDTH(8) }
   MEM_L1_CODE_CACHE       { TYPE(RAM) START(0xFFA10000) END(0xFFA13FFF) WIDTH(8) }
   MEM_L1_CODE             { TYPE(RAM) START(0xFFA00000) END(0xFFA0FFFF) WIDTH(8) }
   MEM_L1_DATA_B_CACHE     { TYPE(RAM) START(0xFF904000) END(0xFF907FFF) WIDTH(8) }
   MEM_L1_DATA_B           { TYPE(RAM) START(0xFF900000) END(0xFF903FFF) WIDTH(8) }
   MEM_L1_DATA_A_CACHE     { TYPE(RAM) START(0xFF804000) END(0xFF807FFF) WIDTH(8) }
   MEM_L1_DATA_A           { TYPE(RAM) START(0xFF800000) END(0xFF803FFF) WIDTH(8) }
   MEM_ASYNC3              { TYPE(ASYNC3_MEMTYPE) START(0x20300000) END(0x203FFFFF) WIDTH(8) }
   MEM_ASYNC2              { TYPE(ASYNC2_MEMTYPE) START(0x20200000) END(0x202FFFFF) WIDTH(8) }
   MEM_ASYNC1              { TYPE(ASYNC1_MEMTYPE) START(0x20100000) END(0x201FFFFF) WIDTH(8) }
   MEM_ASYNC0              { TYPE(ASYNC0_MEMTYPE) START(0x20000000) END(0x200FFFFF) WIDTH(8) }
   MEM_SDRAM0              { TYPE(RAM) START(0x00000004) END(0x03ffffff) WIDTH(8) } 
   
   /*$VDSG<insert-new-memory-segments>                          */
   /* Text inserted between these $VDSG comments will be preserved */
   /*$VDSG<insert-new-memory-segments>                          */
   
} /* MEMORY */

PROCESSOR p0
{
   OUTPUT($COMMAND_LINE_OUTPUT_FILE)
   RESOLVE(start, 0xFFA00000)
   KEEP(start, _main)
   KEEP_SECTIONS(FSymTab,VSymTab,RTMSymTab)
   
   /*$VDSG<insert-user-ldf-commands>                            */
   /* Text inserted between these $VDSG comments will be preserved */
   /*$VDSG<insert-user-ldf-commands>                            */
   
   SECTIONS
   {
      /* Workaround for hardware errata 05-00-0189 and 05-00-0310 -
      ** "Speculative (and fetches made at boundary of reserved memory
      ** space) for instruction or data fetches may cause false
      ** protection exceptions" and "False hardware errors caused by
      ** fetches at the boundary of reserved memory ".
      **
      ** Done by avoiding use of 76 bytes from at the end of blocks
      ** that are adjacent to reserved memory. Workaround is enabled
      ** for appropriate silicon revisions (-si-revision switch).
      */
      RESERVE(___wab0=MEMORY_END(MEM_L1_SCRATCH) - 75, ___l0 = 76)
      RESERVE(___wab2=MEMORY_END(MEM_L1_CODE) - 75, ___l2 = 76)
      RESERVE(___wab3=MEMORY_END(MEM_L1_DATA_B_CACHE) - 75, ___l3 = 76)
      RESERVE(___wab5=MEMORY_END(MEM_L1_DATA_A_CACHE) - 75, ___l5 = 76)
      RESERVE(___wab7=MEMORY_END(MEM_ASYNC3) - 75, ___l7 = 76)
      RESERVE(___wab9=MEMORY_END(MEM_SDRAM0) - 75, ___l9 = 76)
      
      /*$VDSG<insert-new-sections-at-the-start>                 */
      /* Text inserted between these $VDSG comments will be preserved */
      /*$VDSG<insert-new-sections-at-the-start>                 */
      
      scratchpad NO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         
         /*$VDSG<insert-input-sections-at-the-start-of-scratchpad>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-start-of-scratchpad>  */
         
         INPUT_SECTIONS($OBJECTS(L1_scratchpad) $LIBRARIES(L1_scratchpad))
         
         /*$VDSG<insert-input-sections-at-the-end-of-scratchpad>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-end-of-scratchpad>  */
         
      } > MEM_L1_SCRATCH

      L1_code
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(L1_code) $LIBRARIES(L1_code))
         
         /*$VDSG<insert-input-sections-at-the-start-of-l1_code>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-start-of-l1_code>  */
         
         INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code))
         INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb))
         INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code))
         INPUT_SECTIONS($OBJS_LIBS_INTERNAL(program))
         INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(program))
         INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program))
         
         /*$VDSG<insert-input-sections-at-the-end-of-l1_code>   */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-end-of-l1_code>   */
         
      } > MEM_L1_CODE

      L1_code_cache
      {
         INPUT_SECTION_ALIGN(4)
         ___l1_code_cache = 1;
      } > MEM_L1_CODE_CACHE

      L1_data_a_1
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(L1_data_a) $LIBRARIES(L1_data_a))
         INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data))
         
         /*$VDSG<insert-input-sections-at-the-start-of-L1_data_a>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-start-of-L1_data_a>  */
         
         RESERVE(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length = 1024,4)
      } > MEM_L1_DATA_A

      L1_data_a_bsz ZERO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz))
      } > MEM_L1_DATA_A

      L1_data_a_tables
      {
         INPUT_SECTION_ALIGN(4)
         FORCE_CONTIGUITY
         INPUT_SECTIONS($OBJECTS(vtbl) $LIBRARIES(vtbl))
         INPUT_SECTIONS($OBJECTS(ctor) $LIBRARIES(ctor))
         INPUT_SECTIONS($OBJECTS(ctorl) $LIBRARIES(ctorl))
         INPUT_SECTIONS($OBJECTS(.frt) $LIBRARIES(.frt))
         INPUT_SECTIONS($OBJECTS(.rtti) $LIBRARIES(.rtti))
         INPUT_SECTIONS($OBJECTS(.gdt) $LIBRARIES(.gdt))
         INPUT_SECTIONS($OBJECTS(.gdtl) $LIBRARIES(.gdtl))
         INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt))
         INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht))
      } > MEM_L1_DATA_A

      L1_data_a
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data))
         INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
         INPUT_SECTIONS($OBJS_LIBS_INTERNAL(data1))
         INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(data1))
         INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
         INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
         
         /*$VDSG<insert-input-sections-at-the-end-of-L1_data_a>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-end-of-L1_data_a>  */
         
      } > MEM_L1_DATA_A

      bsz_L1_data_a ZERO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJS_LIBS_INTERNAL(bsz))
         INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(bsz))
         INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
      } > MEM_L1_DATA_A

      L1_data_a_stack_heap
      {
         INPUT_SECTION_ALIGN(4)
         RESERVE_EXPAND(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length , 0, 4)
         ldf_stack_space = heaps_and_stack_in_L1_data_a;
         ldf_stack_end = (ldf_stack_space + (heaps_and_stack_in_L1_data_a_length - 4)) & 0xfffffffc;
      } > MEM_L1_DATA_A

      L1_data_a_cache
      {
         INPUT_SECTION_ALIGN(4)
         ___l1_data_cache_a = 1;
      } > MEM_L1_DATA_A_CACHE

      L1_data_b_bsz ZERO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz))
      } > MEM_L1_DATA_B

      L1_data_b
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(L1_data_b) $LIBRARIES(L1_data_b))
         INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data))
         
         /*$VDSG<insert-input-sections-at-the-start-of-L1_data_b>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-start-of-L1_data_b>  */
         
         RESERVE(heaps_and_stack_in_L1_data_b, heaps_and_stack_in_L1_data_b_length = 1024,4)
         INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data))
         INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
         INPUT_SECTIONS($OBJS_LIBS_INTERNAL(data1))
         INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(data1))
         INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
         INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
         INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt) )
         INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht) )
         
         /*$VDSG<insert-input-sections-at-the-end-of-L1_data_b>  */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-end-of-L1_data_b>  */
         
      } > MEM_L1_DATA_B

      bsz_L1_data_b ZERO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJS_LIBS_INTERNAL(bsz))
         INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(bsz))
         INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
      } > MEM_L1_DATA_B

      L1_data_b_stack_heap
      {
         INPUT_SECTION_ALIGN(4)
         RESERVE_EXPAND(heaps_and_stack_in_L1_data_b, heaps_and_stack_in_L1_data_b_length , 0, 4)
         ldf_heap_space = heaps_and_stack_in_L1_data_b;
         ldf_heap_end = (ldf_heap_space + (heaps_and_stack_in_L1_data_b_length - 4)) & 0xfffffffc;
         ldf_heap_length = ldf_heap_end - ldf_heap_space;
      } > MEM_L1_DATA_B

      L1_data_b_cache
      {
         INPUT_SECTION_ALIGN(4)
         ___l1_data_cache_b = 1;
      } > MEM_L1_DATA_B_CACHE

      sdram
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(sdram0) $LIBRARIES(sdram0))
         INPUT_SECTIONS($OBJECTS(sdram0_bank0) $LIBRARIES(sdram0_bank0))
         INPUT_SECTIONS($OBJECTS(sdram0_bank1) $LIBRARIES(sdram0_bank1))
         INPUT_SECTIONS($OBJECTS(sdram0_bank2) $LIBRARIES(sdram0_bank2))
         INPUT_SECTIONS($OBJECTS(sdram0_bank3) $LIBRARIES(sdram0_bank3))
         
         /*$VDSG<insert-input-sections-at-the-start-of-sdram>   */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-start-of-sdram>   */
         
         INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code))
         INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program))
         INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb))
         INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code))
         INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
         INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
         INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
         INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data))
         INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt))
         INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht))
         
         /*$VDSG<insert-input-sections-at-the-end-of-sdram>     */
         /* Text inserted between these $VDSG comments will be preserved */
         /*$VDSG<insert-input-sections-at-the-end-of-sdram>     */
         
      } > MEM_SDRAM0

      bsz_sdram0 ZERO_INIT
      {
         INPUT_SECTION_ALIGN(4)
         INPUT_SECTIONS($OBJECTS(sdram_bsz) $LIBRARIES(sdram_bsz))
         INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
      } > MEM_SDRAM0

      rt_thread_section
      {
        /* section information for finsh shell */
        INPUT_SECTION_ALIGN(4)
        __fsymtab_start = .;
        INPUT_SECTIONS($OBJECTS(FSymTab) $LIBRARIES(FSymTab))
        __fsymtab_end = .;

        INPUT_SECTION_ALIGN(4)
        __vsymtab_start = .;
        INPUT_SECTIONS($OBJECTS(VSymTab) $LIBRARIES(VSymTab))
        __vsymtab_end = .;

        /* section information for modules */
        INPUT_SECTION_ALIGN(4)
        __rtmsymtab_start = .;
        INPUT_SECTIONS($OBJECTS(RTMSymTab) $LIBRARIES(RTMSymTab))
        __rtmsymtab_end = .;      

        RESERVE(heaps_in_sdram_space, heaps_in_sdram_length = 2048,4)
      } > MEM_SDRAM0
      
      sdram_stack_heap
      {
         RESERVE_EXPAND(heaps_in_sdram_space, heaps_in_sdram_length , 0, 4)
         rtt_heap_start = heaps_in_sdram_space;
         rtt_heap_end = (heaps_in_sdram_space + heaps_in_sdram_length - 32) & 0xfffffffc;
         rtt_heap_length = rtt_heap_end - rtt_heap_start;
      } > MEM_SDRAM0

      
      /*$VDSG<insert-new-sections-at-the-end>                   */
      /* Text inserted between these $VDSG comments will be preserved */
      /*$VDSG<insert-new-sections-at-the-end>                   */
      
   } /* SECTIONS */
} /* p0 */