gd32f10x_fmc.h 9.1 KB

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  1. /**
  2. ******************************************************************************
  3. * @brief FMC header file of the firmware library.
  4. ******************************************************************************
  5. */
  6. /* Define to prevent recursive inclusion -------------------------------------*/
  7. #ifndef __GD32F10X_FMC_H
  8. #define __GD32F10X_FMC_H
  9. #ifdef __cplusplus
  10. extern "C" {
  11. #endif
  12. /* Includes ------------------------------------------------------------------*/
  13. #include "gd32f10x.h"
  14. /** @addtogroup GD32F10x_Firmware
  15. * @{
  16. */
  17. /** @addtogroup FMC
  18. * @{
  19. */
  20. /* Exported types ------------------------------------------------------------*/
  21. /** @defgroup FMC_Exported_Types
  22. * @{
  23. */
  24. /**
  25. * @brief FMC State
  26. */
  27. typedef enum {
  28. FMC_READY,
  29. FMC_BSY,
  30. FMC_WRPERR,
  31. FMC_PGERR,
  32. FMC_TIMEOUT_ERR
  33. } FMC_State;
  34. /**
  35. * @}
  36. */
  37. /* Exported constants --------------------------------------------------------*/
  38. /** @defgroup FMC_Exported_Constants
  39. * @{
  40. */
  41. /** @defgroup FMC_Interrupts
  42. * @{
  43. */
  44. #define FMC_INT_EOP FMC_CMR_ENDIE /*!< End of programming interrupt source */
  45. #define FMC_INT_ERR FMC_CMR_ERIE /*!< Error interrupt source */
  46. #define FMC_INT_B2_EOP ((uint32_t)0x80000400) /*!< Bank2 End of programming interrupt source */
  47. #define FMC_INT_B2_ERR ((uint32_t)0x80001000) /*!< Bank2 Error interrupt source */
  48. /**
  49. * @}
  50. */
  51. /** @defgroup FMC_Option_Bytes_Write_Protection
  52. * @{
  53. */
  54. #define WRP_SECTOR0 ((uint32_t)0x00000001) /*!< Write protection of sector 0 */
  55. #define WRP_SECTOR1 ((uint32_t)0x00000002) /*!< Write protection of sector 1 */
  56. #define WRP_SECTOR2 ((uint32_t)0x00000004) /*!< Write protection of sector 2 */
  57. #define WRP_SECTOR3 ((uint32_t)0x00000008) /*!< Write protection of sector 3 */
  58. #define WRP_SECTOR4 ((uint32_t)0x00000010) /*!< Write protection of sector 4 */
  59. #define WRP_SECTOR5 ((uint32_t)0x00000020) /*!< Write protection of sector 5 */
  60. #define WRP_SECTOR6 ((uint32_t)0x00000040) /*!< Write protection of sector 6 */
  61. #define WRP_SECTOR7 ((uint32_t)0x00000080) /*!< Write protection of sector 7 */
  62. #define WRP_SECTOR8 ((uint32_t)0x00000100) /*!< Write protection of sector 8 */
  63. #define WRP_SECTOR9 ((uint32_t)0x00000200) /*!< Write protection of sector 9 */
  64. #define WRP_SECTOR10 ((uint32_t)0x00000400) /*!< Write protection of sector 10 */
  65. #define WRP_SECTOR11 ((uint32_t)0x00000800) /*!< Write protection of sector 11 */
  66. #define WRP_SECTOR12 ((uint32_t)0x00001000) /*!< Write protection of sector 12 */
  67. #define WRP_SECTOR13 ((uint32_t)0x00002000) /*!< Write protection of sector 13 */
  68. #define WRP_SECTOR14 ((uint32_t)0x00004000) /*!< Write protection of sector 14 */
  69. #define WRP_SECTOR15 ((uint32_t)0x00008000) /*!< Write protection of sector 15 */
  70. #define WRP_SECTOR16 ((uint32_t)0x00010000) /*!< Write protection of sector 16 */
  71. #define WRP_SECTOR17 ((uint32_t)0x00020000) /*!< Write protection of sector 17 */
  72. #define WRP_SECTOR18 ((uint32_t)0x00040000) /*!< Write protection of sector 18 */
  73. #define WRP_SECTOR19 ((uint32_t)0x00080000) /*!< Write protection of sector 19 */
  74. #define WRP_SECTOR20 ((uint32_t)0x00100000) /*!< Write protection of sector 20 */
  75. #define WRP_SECTOR21 ((uint32_t)0x00200000) /*!< Write protection of sector 21 */
  76. #define WRP_SECTOR22 ((uint32_t)0x00400000) /*!< Write protection of sector 22 */
  77. #define WRP_SECTOR23 ((uint32_t)0x00800000) /*!< Write protection of sector 23 */
  78. #define WRP_SECTOR24 ((uint32_t)0x01000000) /*!< Write protection of sector 24 */
  79. #define WRP_SECTOR25 ((uint32_t)0x02000000) /*!< Write protection of sector 25 */
  80. #define WRP_SECTOR26 ((uint32_t)0x04000000) /*!< Write protection of sector 26 */
  81. #define WRP_SECTOR27 ((uint32_t)0x08000000) /*!< Write protection of sector 27 */
  82. #define WRP_SECTOR28 ((uint32_t)0x10000000) /*!< Write protection of sector 28 */
  83. #define WRP_SECTOR29 ((uint32_t)0x20000000) /*!< Write protection of sector 29 */
  84. #define WRP_SECTOR30 ((uint32_t)0x40000000) /*!< Write protection of sector 30 */
  85. #define WRP_SECTOR31 ((uint32_t)0x80000000) /*!< Write protection of sector 31 */
  86. #define WRP_ALLSECTORS ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
  87. /**
  88. * @}
  89. */
  90. /** @defgroup FMC_Option_Bytes_Read_Protection
  91. * @{
  92. */
  93. /**
  94. * @brief FMC_Read Protection Level
  95. */
  96. #define RDP_LEVEL_0 ((uint8_t)0xA5)
  97. #define RDP_LEVEL_1 ((uint8_t)0xBB)
  98. /**
  99. * @}
  100. */
  101. /** @defgroup FMC_Option_Bytes_IWatchdog
  102. * @{
  103. */
  104. #define OB_IWDG_SW ((uint8_t)0x01) /*!< Software IWDG selected */
  105. #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
  106. /**
  107. * @}
  108. */
  109. /** @defgroup FMC_Option_Bytes_nRST_DEEPSLEEP
  110. * @{
  111. */
  112. #define OB_DEEPSLEEP_NORST ((uint8_t)0x02) /*!< No reset generated when entering in DEEPSLEEP */
  113. #define OB_DEEPSLEEP_RST ((uint8_t)0x00) /*!< Reset generated when entering in DEEPSLEEP */
  114. /**
  115. * @}
  116. */
  117. /** @defgroup FMC_Option_Bytes_nRST_STDBY
  118. * @{
  119. */
  120. #define OB_STDBY_NORST ((uint8_t)0x04) /*!< No reset generated when entering in STANDBY */
  121. #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
  122. /**
  123. * @}
  124. */
  125. /** @defgroup FMC_Option_Bytes_BOOT
  126. * @{
  127. */
  128. #define OB_BOOT_B1 ((uint8_t)0x08) /*!< BOOT from Bank1 */
  129. #define OB_BOOT_B2 ((uint8_t)0x00) /*!< BOOT from Bank2 */
  130. #define OB_USER_BFB2 ((uint16_t)0x0008) /*!< Configure BOOT from Bank1 */
  131. /**
  132. * @}
  133. */
  134. /** @defgroup FMC_Flags
  135. * @{
  136. */
  137. #define FMC_FLAG_BSY FMC_CSR_BUSY /*!< FMC Busy flag */
  138. #define FMC_FLAG_PERR FMC_CSR_PGEF /*!< FMC Programming error flag */
  139. #define FMC_FLAG_WERR FMC_CSR_WPEF /*!< FMC Write protected error flag */
  140. #define FMC_FLAG_EOP FMC_CSR_ENDF /*!< FMC End of Programming flag */
  141. #define FMC_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FMC Option Byte error flag */
  142. #define FMC_FLAG_B2_BSY ((uint32_t)0x80000001) /*!< FMC Busy flag */
  143. #define FMC_FLAG_B2_PERR ((uint32_t)0x80000004) /*!< FMC Programming error flag */
  144. #define FMC_FLAG_B2_WERR ((uint32_t)0x80000010) /*!< FMC Write protected error flag */
  145. #define FMC_FLAG_B2_EOP ((uint32_t)0x80000020) /*!< FMC End of Programming flag */
  146. /**
  147. * @}
  148. */
  149. /** @defgroup FMC_Timeout_definition
  150. * @{
  151. */
  152. #define FMC_TIMEOUT_COUNT ((uint32_t)0x000F0000)
  153. /**
  154. * @}
  155. */
  156. /* FMC BANK address */
  157. #define FMC_B1_END_ADDRESS ((uint32_t)0x807FFFF)
  158. #define FMC_BANK1_SIZE 0x0200
  159. #define FMC_SIZE (*(uint16_t *)0x1ffff7e0)
  160. /**
  161. * @}
  162. */
  163. /** @defgroup FMC_Exported_Functions
  164. * @{
  165. */
  166. /**
  167. * @brief FMC memory functions.
  168. */
  169. /* FMC Main Memory Programming functions *****************************************/
  170. void FMC_Unlock(void);
  171. void FMC_UnlockB1(void);
  172. void FMC_UnlockB2(void);
  173. void FMC_Lock(void);
  174. void FMC_LockB1(void);
  175. void FMC_LockB2(void);
  176. FMC_State FMC_ErasePage(uint32_t Page_Address);
  177. FMC_State FMC_MassErase(void);
  178. FMC_State FMC_MassB1Erase(void);
  179. FMC_State FMC_MassB2Erase(void);
  180. FMC_State FMC_ProgramWord(uint32_t Address, uint32_t Data);
  181. /* FMC Option Bytes Programming functions *****************************************/
  182. void FMC_OB_Unlock(void);
  183. void FMC_OB_Lock(void);
  184. void FMC_OB_Reset(void);
  185. FMC_State FMC_OB_Erase(void);
  186. FMC_State FMC_OB_EnableWRP(uint32_t OB_WRP);
  187. FMC_State FMC_ReadOutProtection(TypeState NewValue);
  188. FMC_State FMC_OB_RDPConfig(uint8_t OB_RDP);
  189. FMC_State FMC_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_DEEPSLEEP, uint8_t OB_STDBY);
  190. FMC_State FMC_OB_BOOTConfig(uint8_t OB_BOOT);
  191. FMC_State FMC_OB_WriteUser(uint8_t OB_USER);
  192. FMC_State FMC_ProgramOptionByteData(uint32_t Address, uint8_t Data);
  193. uint8_t FMC_OB_GetUser(void);
  194. uint32_t FMC_OB_GetWRP(void);
  195. TypeState FMC_OB_GetRDP(void);
  196. /* FMC Interrupts and flags management functions **********************************/
  197. void FMC_INTConfig(uint32_t FMC_INT, TypeState NewValue);
  198. TypeState FMC_GetBitState(uint32_t FMC_FLAG);
  199. void FMC_ClearBitState(uint32_t FMC_FLAG);
  200. FMC_State FMC_GetState(void);
  201. FMC_State FMC_GetB1State(void);
  202. FMC_State FMC_GetB2State(void);
  203. FMC_State FMC_WaitReady(uint32_t uCount);
  204. FMC_State FMC_B1_WaitReady(uint32_t uCount);
  205. FMC_State FMC_B2_WaitReady(uint32_t uCount);
  206. #ifdef __cplusplus
  207. }
  208. #endif
  209. #endif /* __GD32F10X_FMC_H */
  210. /**
  211. * @}
  212. */
  213. /**
  214. * @}
  215. */
  216. /**
  217. * @}
  218. */