usart.c 8.1 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2017-07-28 Tanek the first version
  9. */
  10. #include <rtthread.h>
  11. #include "usart.h"
  12. #include "peri_driver.h"
  13. #ifdef RT_USING_UART
  14. #ifdef RT_USING_DEVICE
  15. #include <rtdevice.h>
  16. #endif
  17. #define UART_RX_BUFSZ 8
  18. /* LPC8XX uart driver */
  19. struct lpc8xx_uart
  20. {
  21. struct rt_device parent;
  22. struct rt_ringbuffer rx_rb;
  23. LPC_USART_T * uart_base;
  24. IRQn_Type uart_irq;
  25. rt_uint8_t rx_buffer[UART_RX_BUFSZ];
  26. };
  27. #ifdef RT_USING_UART0
  28. struct lpc8xx_uart uart0_device;
  29. #endif
  30. #ifdef RT_USING_UART1
  31. struct lpc8xx_uart uart1_device;
  32. #endif
  33. #ifdef RT_USING_UART2
  34. struct lpc8xx_uart uart2_device;
  35. #endif
  36. void uart_irq_handler(struct lpc8xx_uart* uart)
  37. {
  38. uint32_t status;
  39. /* enter interrupt */
  40. rt_interrupt_enter();
  41. status = Chip_UART_GetStatus(uart->uart_base);
  42. if(status & UART_STAT_RXRDY) // RXIRQ
  43. {
  44. rt_ringbuffer_putchar_force(&(uart->rx_rb), (rt_uint8_t)Chip_UART_ReadByte(uart->uart_base));
  45. /* invoke callback */
  46. if(uart->parent.rx_indicate != RT_NULL)
  47. {
  48. uart->parent.rx_indicate(&uart->parent, rt_ringbuffer_data_len(&uart->rx_rb));
  49. }
  50. }
  51. /* leave interrupt */
  52. rt_interrupt_leave();
  53. }
  54. #ifdef RT_USING_UART0
  55. void UART0_IRQHandler(void)
  56. {
  57. uart_irq_handler(&uart0_device);
  58. }
  59. #endif
  60. #ifdef RT_USING_UART1
  61. void UART1_IRQHandler(void)
  62. {
  63. uart_irq_handler(&uart1_device);
  64. }
  65. #endif
  66. #ifdef RT_USING_UART2
  67. void UART2_IRQHandler(void)
  68. {
  69. uart_irq_handler(&uart2_device);
  70. }
  71. #endif
  72. static void uart1_io_init(LPC_USART_T * uart_base)
  73. {
  74. /* Enable the clock to the Switch Matrix */
  75. Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
  76. Chip_Clock_SetUARTClockDiv(1);
  77. #ifdef RT_USING_UART0
  78. if (uart_base == LPC_USART0)
  79. {
  80. Chip_SWM_MovablePinAssign(SWM_U0_TXD_O, 4);
  81. Chip_SWM_MovablePinAssign(SWM_U0_RXD_I, 0);
  82. }
  83. else
  84. #endif
  85. #ifdef RT_USING_UART1
  86. if (uart_base == LPC_USART1)
  87. {
  88. Chip_SWM_MovablePinAssign(SWM_U1_TXD_O, 4);
  89. Chip_SWM_MovablePinAssign(SWM_U1_RXD_I, 0);
  90. }
  91. else
  92. #endif
  93. #ifdef RT_USING_UART2
  94. if (uart_base == LPC_USART2)
  95. {
  96. Chip_SWM_MovablePinAssign(SWM_U2_TXD_O, 4);
  97. Chip_SWM_MovablePinAssign(SWM_U2_RXD_I, 0);
  98. }
  99. else
  100. #endif
  101. {
  102. RT_ASSERT((uart_base == USART0) || (uart_base == USART2) || (uart_base == USART2));
  103. }
  104. /* Disable the clock to the Switch Matrix to save power */
  105. Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);
  106. }
  107. static void uart_ll_init(LPC_USART_T * uart)
  108. {
  109. Chip_UART_Init(uart);
  110. Chip_UART_ConfigData(uart, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
  111. Chip_Clock_SetUSARTNBaseClockRate((115200 * 6 * 16), true);
  112. Chip_UART_SetBaud(uart, 115200);
  113. Chip_UART_Enable(uart);
  114. Chip_UART_TXEnable(uart);
  115. // we must NOT enable TX ready/idle IRQ before we want to write data
  116. // otherwise the IRQs will happen as soon as Uart IRQ is enabled in NVIC
  117. Chip_UART_IntDisable(uart, UART_INTEN_TXRDY | UART_INTEN_TXIDLE);
  118. Chip_UART_IntEnable(uart, UART_INTEN_RXRDY);
  119. }
  120. static rt_err_t rt_uart_init (rt_device_t dev)
  121. {
  122. struct lpc8xx_uart* uart;
  123. RT_ASSERT(dev != RT_NULL);
  124. uart = (struct lpc8xx_uart *)dev;
  125. uart1_io_init(uart->uart_base);
  126. uart_ll_init(uart->uart_base);
  127. return RT_EOK;
  128. }
  129. static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
  130. {
  131. struct lpc8xx_uart* uart;
  132. RT_ASSERT(dev != RT_NULL);
  133. uart = (struct lpc8xx_uart *)dev;
  134. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  135. {
  136. /* Enable the UART Interrupt */
  137. NVIC_EnableIRQ(uart->uart_irq);
  138. }
  139. return RT_EOK;
  140. }
  141. static rt_err_t rt_uart_close(rt_device_t dev)
  142. {
  143. struct lpc8xx_uart* uart;
  144. RT_ASSERT(dev != RT_NULL);
  145. uart = (struct lpc8xx_uart *)dev;
  146. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  147. {
  148. /* Disable the UART Interrupt */
  149. NVIC_DisableIRQ(uart->uart_irq);
  150. }
  151. return RT_EOK;
  152. }
  153. static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  154. {
  155. /* interrupt receive */
  156. rt_base_t level;
  157. rt_size_t length;
  158. struct lpc8xx_uart* uart;
  159. RT_ASSERT(serial != RT_NULL);
  160. uart = (struct lpc8xx_uart *)dev;
  161. RT_ASSERT(uart != RT_NULL);
  162. /* disable interrupt */
  163. level = rt_hw_interrupt_disable();
  164. length = rt_ringbuffer_get(&(uart->rx_rb), buffer, size);
  165. /* enable interrupt */
  166. rt_hw_interrupt_enable(level);
  167. return length;
  168. }
  169. static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  170. {
  171. char *ptr = (char*) buffer;
  172. struct lpc8xx_uart* uart;
  173. RT_ASSERT(serial != RT_NULL);
  174. uart = (struct lpc8xx_uart *)dev;
  175. if (dev->open_flag & RT_DEVICE_FLAG_STREAM)
  176. {
  177. /* stream mode */
  178. while (size)
  179. {
  180. if (*ptr == '\n')
  181. {
  182. while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
  183. Chip_UART_SendByte(uart->uart_base, '\r');
  184. }
  185. while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
  186. Chip_UART_SendByte(uart->uart_base, *ptr);
  187. ptr ++;
  188. size --;
  189. }
  190. }
  191. else
  192. {
  193. while (size)
  194. {
  195. while (!(Chip_UART_GetStatus(uart->uart_base) & UART_STAT_TXRDY));
  196. Chip_UART_SendByte(uart->uart_base, *ptr);
  197. ptr++;
  198. size--;
  199. }
  200. }
  201. return (rt_size_t) ptr - (rt_size_t) buffer;
  202. }
  203. int rt_hw_usart_init(void)
  204. {
  205. #ifdef RT_USING_UART0
  206. {
  207. struct lpc8xx_uart* uart;
  208. /* get uart device */
  209. uart = &uart1_device;
  210. /* device initialization */
  211. uart->parent.type = RT_Device_Class_Char;
  212. uart->uart_base = LPC_USART0;
  213. uart->uart_irq = UART0_IRQn;
  214. rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
  215. /* device interface */
  216. uart->parent.init = rt_uart_init;
  217. uart->parent.open = rt_uart_open;
  218. uart->parent.close = rt_uart_close;
  219. uart->parent.read = rt_uart_read;
  220. uart->parent.write = rt_uart_write;
  221. uart->parent.control = RT_NULL;
  222. uart->parent.user_data = RT_NULL;
  223. rt_device_register(&uart->parent, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
  224. }
  225. #endif
  226. #ifdef RT_USING_UART1
  227. {
  228. struct lpc8xx_uart* uart;
  229. /* get uart device */
  230. uart = &uart1_device;
  231. /* device initialization */
  232. uart->parent.type = RT_Device_Class_Char;
  233. uart->uart_base = LPC_USART1;
  234. uart->uart_irq = UART1_IRQn;
  235. rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
  236. /* device interface */
  237. uart->parent.init = rt_uart_init;
  238. uart->parent.open = rt_uart_open;
  239. uart->parent.close = rt_uart_close;
  240. uart->parent.read = rt_uart_read;
  241. uart->parent.write = rt_uart_write;
  242. uart->parent.control = RT_NULL;
  243. uart->parent.user_data = RT_NULL;
  244. rt_device_register(&uart->parent, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
  245. }
  246. #endif
  247. #ifdef RT_USING_UART2
  248. {
  249. struct lpc8xx_uart* uart;
  250. /* get uart device */
  251. uart = &uart2_device;
  252. /* device initialization */
  253. uart->parent.type = RT_Device_Class_Char;
  254. uart->uart_base = LPC_USART1;
  255. uart->uart_irq = UART2_IRQn;
  256. rt_ringbuffer_init(&(uart->rx_rb), uart->rx_buffer, sizeof(uart->rx_buffer));
  257. /* device interface */
  258. uart->parent.init = rt_uart_init;
  259. uart->parent.open = rt_uart_open;
  260. uart->parent.close = rt_uart_close;
  261. uart->parent.read = rt_uart_read;
  262. uart->parent.write = rt_uart_write;
  263. uart->parent.control = RT_NULL;
  264. uart->parent.user_data = RT_NULL;
  265. rt_device_register(&uart->parent, "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
  266. }
  267. #endif /* RT_USING_UART2 */
  268. return 0;
  269. }
  270. INIT_BOARD_EXPORT(rt_hw_usart_init);
  271. #endif /*RT_USING_UART*/