mmu.h 2.0 KB

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  1. #ifndef MMU_H__
  2. #define MMU_H__
  3. #include <rtthread.h>
  4. #include <rthw.h>
  5. #include <board.h>
  6. #include "cp15.h"
  7. #define DESC_SEC (0x2)
  8. #define CB (3 << 2) //cache_on, write_back
  9. #define CNB (2 << 2) //cache_on, write_through
  10. #define NCB (1 << 2) //cache_off,WR_BUF on
  11. #define NCNB (0 << 2) //cache_off,WR_BUF off
  12. #define AP_RW (3 << 10) //supervisor=RW, user=RW
  13. #define AP_RO (2 << 10) //supervisor=RW, user=RO
  14. #define XN (1 << 4) // eXecute Never
  15. #define SHARED (1 << 16) /* shareable */
  16. #define SHAREDEVICE (1 << 2) /* shared device */
  17. #define STRONGORDER (0 << 2) /* strong ordered */
  18. #define MEMWBWA ((1 << 12) | (3 << 2)) /* write back, write allocate */
  19. #define DOMAIN_FAULT (0x0)
  20. #define DOMAIN_CHK (0x1)
  21. #define DOMAIN_NOTCHK (0x3)
  22. #define DOMAIN0 (0x0 << 5)
  23. #define DOMAIN1 (0x1 << 5)
  24. #define DOMAIN0_ATTR (DOMAIN_CHK << 0)
  25. #define DOMAIN1_ATTR (DOMAIN_FAULT << 2)
  26. /* Read/Write, cache, write back */
  27. #define RW_CB (AP_RW | DOMAIN0 | CB | DESC_SEC)
  28. /* Read/Write, cache, write through */
  29. #define RW_CNB (AP_RW | DOMAIN0 | CNB | DESC_SEC)
  30. /* Read/Write without cache and write buffer */
  31. #define RW_NCNB (AP_RW | DOMAIN0 | NCNB | DESC_SEC)
  32. /* Read/Write without cache and write buffer, no execute */
  33. #define RW_NCNBXN (AP_RW | DOMAIN0 | NCNB | DESC_SEC | XN)
  34. /* Read/Write without cache and write buffer */
  35. #define RW_FAULT (AP_RW | DOMAIN1 | NCNB | DESC_SEC)
  36. /* device mapping type */
  37. #define DEVICE_MEM (SHARED | SHAREDEVICE | RW_NCNBXN)
  38. /* normal memory mapping type */
  39. #define NORMAL_MEM (SHARED | AP_RW | DOMAIN0 | MEMWBWA | DESC_SEC)
  40. #define STRONG_ORDER_MEM (SHARED | AP_RO | XN | DESC_SEC)
  41. #define BUS_ADDRESS(phys) (((phys) & ~0xC0000000) | 0xC0000000)
  42. void rt_hw_change_mmu_table(rt_uint32_t vaddrStart,
  43. rt_uint32_t size,
  44. rt_uint32_t paddrStart, rt_uint32_t attr);
  45. #endif