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drv_i2c.c 6.4 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-29 zdzn first version
  9. */
  10. #include "drv_i2c.h"
  11. //Maybe redefined
  12. typedef unsigned long rt_ubase_t;
  13. typedef rt_ubase_t rt_size_t;
  14. rt_uint8_t i2c_read_or_write(volatile rt_uint32_t base, rt_uint8_t* buf, rt_uint32_t len, rt_uint8_t flag)
  15. {
  16. rt_uint32_t status;
  17. rt_uint32_t remaining = len;
  18. rt_uint32_t i = 0;
  19. rt_uint8_t reason = BCM283X_I2C_REASON_OK;
  20. /* Clear FIFO */
  21. BCM283X_BSC_C(base) |= (BSC_C_CLEAR_1 & BSC_C_CLEAR_1);
  22. /* Clear Status */
  23. BCM283X_BSC_S(base) = BSC_S_CLKT | BSC_S_ERR | BSC_S_DONE;
  24. /* Set Data Length */
  25. BCM283X_BSC_DLEN(base) = len;
  26. if (flag)
  27. {
  28. /* Start read */
  29. BCM283X_BSC_C(base) = BSC_C_I2CEN | BSC_C_ST | BSC_C_READ;
  30. /* wait for transfer to complete */
  31. while (!(BCM283X_BSC_S(base) & BSC_S_DONE))
  32. {
  33. /* we must empty the FIFO as it is populated and not use any delay */
  34. while (remaining && (BCM283X_BSC_S(base) & BSC_S_RXD))
  35. {
  36. /* Read from FIFO, no barrier */
  37. buf[i] = BCM283X_BSC_FIFO(base);
  38. i++;
  39. remaining--;
  40. }
  41. }
  42. /* transfer has finished - grab any remaining stuff in FIFO */
  43. while (remaining && (BCM283X_BSC_S(base) & BSC_S_RXD))
  44. {
  45. /* Read from FIFO, no barrier */
  46. buf[i] = BCM283X_BSC_FIFO(base);
  47. i++;
  48. remaining--;
  49. }
  50. }
  51. else
  52. {
  53. /* pre populate FIFO with max buffer */
  54. while (remaining && (i < BSC_FIFO_SIZE))
  55. {
  56. BCM283X_BSC_FIFO(base) = buf[i];
  57. i++;
  58. remaining--;
  59. }
  60. /* Enable device and start transfer */
  61. BCM283X_BSC_C(base) = BSC_C_I2CEN | BSC_C_ST;
  62. /* Transfer is over when BCM2835_BSC_S_DONE */
  63. while (!(BCM283X_BSC_S(base) & BSC_S_DONE))
  64. {
  65. while (remaining && (BCM283X_BSC_S(base) & BSC_S_TXD))
  66. {
  67. /* Write to FIFO */
  68. BCM283X_BSC_FIFO(base) = buf[i];
  69. i++;
  70. remaining--;
  71. }
  72. }
  73. }
  74. status = BCM283X_BSC_S(base);
  75. if (status & BSC_S_ERR)
  76. {
  77. reason = BCM283X_I2C_REASON_ERROR_NACK;
  78. }
  79. else if (status & BSC_S_CLKT)
  80. {
  81. reason = BCM283X_I2C_REASON_ERROR_CLKT;
  82. }
  83. else if (remaining)
  84. {
  85. reason = BCM283X_I2C_REASON_ERROR_DATA;
  86. }
  87. BCM283X_BSC_C(base) |= (BSC_S_DONE & BSC_S_DONE);
  88. return reason;
  89. }
  90. struct raspi_i2c_hw_config
  91. {
  92. rt_uint8_t bsc_num;
  93. rt_uint8_t sdl_pin;
  94. rt_uint8_t scl_pin;
  95. rt_uint8_t sdl_mode;
  96. rt_uint8_t scl_mode;
  97. };
  98. #if (defined(BSP_USING_I2C0) || defined(BSP_USING_I2C1))
  99. static rt_size_t raspi_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  100. struct rt_i2c_msg msgs[],
  101. rt_uint32_t num);
  102. static rt_size_t raspi_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
  103. struct rt_i2c_msg msgs[],
  104. rt_uint32_t num);
  105. static rt_err_t raspi_i2c_bus_control(struct rt_i2c_bus_device *bus,
  106. rt_uint32_t,
  107. rt_uint32_t);
  108. static rt_uint32_t i2c_byte_wait_us = 0;
  109. static rt_size_t raspi_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  110. struct rt_i2c_msg msgs[],
  111. rt_uint32_t num)
  112. {
  113. rt_size_t i;
  114. rt_uint8_t reason;
  115. RT_ASSERT(bus != RT_NULL);
  116. volatile rt_uint32_t base = (volatile rt_uint32_t)(bus->parent.user_data);
  117. if (bus->addr == 0)
  118. base = BCM283X_BSC0_BASE;
  119. else
  120. base = BCM283X_BSC1_BASE;
  121. BCM283X_BSC_A(base) = msgs->addr;
  122. for (i = 0; i < num; i++)
  123. {
  124. if (msgs[i].flags & RT_I2C_RD)
  125. reason = i2c_read_or_write(base, msgs->buf, msgs->len, 1);
  126. else
  127. reason = i2c_read_or_write(base, msgs->buf, msgs->len, 0);
  128. }
  129. return (reason == 0)? i : 0;
  130. }
  131. static rt_size_t raspi_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
  132. struct rt_i2c_msg msgs[],
  133. rt_uint32_t num)
  134. {
  135. return 0;
  136. }
  137. static rt_err_t raspi_i2c_bus_control(struct rt_i2c_bus_device *bus,
  138. rt_uint32_t cmd,
  139. rt_uint32_t arg)
  140. {
  141. return RT_EOK;
  142. }
  143. static const struct rt_i2c_bus_device_ops raspi_i2c_ops =
  144. {
  145. .master_xfer = raspi_i2c_mst_xfer,
  146. .slave_xfer = raspi_i2c_slv_xfer,
  147. .i2c_bus_control = raspi_i2c_bus_control,
  148. };
  149. static rt_err_t raspi_i2c_configure(struct raspi_i2c_hw_config *cfg)
  150. {
  151. RT_ASSERT(cfg != RT_NULL);
  152. volatile rt_uint32_t base = cfg->scl_mode ? BCM283X_BSC1_BASE : BCM283X_BSC0_BASE;
  153. GPIO_FSEL(cfg->sdl_pin, cfg->sdl_mode); /* SDA */
  154. GPIO_FSEL(cfg->scl_pin, cfg->scl_mode); /* SCL */
  155. /* use 0xFFFE mask to limit a max value and round down any odd number */
  156. rt_uint32_t divider = (BCM283X_CORE_CLK_HZ / 10000) & 0xFFFE;
  157. BCM283X_BSC_DIV(base) = (rt_uint16_t) divider;
  158. i2c_byte_wait_us = (divider * 1000000 * 9 / BCM283X_CORE_CLK_HZ);
  159. return RT_EOK;
  160. }
  161. #endif
  162. #if defined (BSP_USING_I2C0)
  163. #define I2C0_BUS_NAME "i2c0"
  164. static struct raspi_i2c_hw_config hw_device0 =
  165. {
  166. .bsc_num = 0,
  167. .sdl_pin = RPI_GPIO_P1_27,
  168. .scl_pin = RPI_GPIO_P1_28,
  169. .sdl_mode = BCM283X_GPIO_FSEL_ALT0,
  170. .scl_mode = BCM283X_GPIO_FSEL_ALT0,
  171. };
  172. struct rt_i2c_bus_device device0 =
  173. {
  174. .ops = &raspi_i2c_ops,
  175. .addr = 0,
  176. };
  177. #endif
  178. #if defined (BSP_USING_I2C1)
  179. #define I2C1_BUS_NAME "i2c1"
  180. static struct raspi_i2c_hw_config hw_device1 =
  181. {
  182. .bsc_num = 1,
  183. .sdl_pin = RPI_GPIO_P1_03,
  184. .scl_pin = RPI_GPIO_P1_05,
  185. .sdl_mode = BCM283X_GPIO_FSEL_ALT0,
  186. .scl_mode = BCM283X_GPIO_FSEL_ALT0,
  187. };
  188. struct rt_i2c_bus_device device1 =
  189. {
  190. .ops = &raspi_i2c_ops,
  191. .addr = 1,
  192. };
  193. #endif
  194. int rt_hw_i2c_init(void)
  195. {
  196. #if defined(BSP_USING_I2C0)
  197. raspi_i2c_configure(&hw_device0);
  198. rt_i2c_bus_device_register(&device0, I2C0_BUS_NAME);
  199. #endif
  200. #if defined(BSP_USING_I2C1)
  201. raspi_i2c_configure(&hw_device1);
  202. rt_i2c_bus_device_register(&device1, I2C1_BUS_NAME);
  203. #endif
  204. return 0;
  205. }
  206. INIT_DEVICE_EXPORT(rt_hw_i2c_init);