usart.c 11 KB

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  1. /*
  2. * File : usart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-01-05 Bernard the first version
  13. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  14. */
  15. #include <board.h>
  16. #include "usart.h"
  17. #include <serial.h>
  18. #include <stm32f10x_dma.h>
  19. /*
  20. * Use UART1 as console output and finsh input
  21. * interrupt Rx and poll Tx (stream mode)
  22. *
  23. * Use UART2 with interrupt Rx and poll Tx
  24. * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
  25. *
  26. * USART DMA setting on STM32
  27. * USART1 Tx --> DMA Channel 4
  28. * USART1 Rx --> DMA Channel 5
  29. * USART2 Tx --> DMA Channel 7
  30. * USART2 Rx --> DMA Channel 6
  31. * USART3 Tx --> DMA Channel 2
  32. * USART3 Rx --> DMA Channel 3
  33. */
  34. #ifdef RT_USING_UART1
  35. struct stm32_serial_int_rx uart1_int_rx;
  36. struct stm32_serial_device uart1 =
  37. {
  38. USART1,
  39. &uart1_int_rx,
  40. RT_NULL
  41. };
  42. struct rt_device uart1_device;
  43. #endif
  44. #ifdef RT_USING_UART2
  45. struct stm32_serial_int_rx uart2_int_rx;
  46. struct stm32_serial_device uart2 =
  47. {
  48. USART2,
  49. &uart2_int_rx,
  50. RT_NULL
  51. };
  52. struct rt_device uart2_device;
  53. #endif
  54. #ifdef RT_USING_UART3
  55. struct stm32_serial_int_rx uart3_int_rx;
  56. struct stm32_serial_dma_tx uart3_dma_tx;
  57. struct stm32_serial_device uart3 =
  58. {
  59. USART3,
  60. &uart3_int_rx,
  61. &uart3_dma_tx
  62. };
  63. struct rt_device uart3_device;
  64. #endif
  65. #define USART1_DR_Base 0x40013804
  66. #define USART2_DR_Base 0x40004404
  67. #define USART3_DR_Base 0x40004804
  68. /* USART1_REMAP = 0 */
  69. #define UART1_GPIO_TX GPIO_Pin_9
  70. #define UART1_GPIO_RX GPIO_Pin_10
  71. #define UART1_GPIO GPIOA
  72. #define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
  73. #define UART1_TX_DMA DMA1_Channel4
  74. #define UART1_RX_DMA DMA1_Channel5
  75. #if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
  76. #define UART2_GPIO_TX GPIO_Pin_5
  77. #define UART2_GPIO_RX GPIO_Pin_6
  78. #define UART2_GPIO GPIOD
  79. #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
  80. #else /* for STM32F10X_HD */
  81. /* USART2_REMAP = 0 */
  82. #define UART2_GPIO_TX GPIO_Pin_2
  83. #define UART2_GPIO_RX GPIO_Pin_3
  84. #define UART2_GPIO GPIOA
  85. #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
  86. #define UART2_TX_DMA DMA1_Channel7
  87. #define UART2_RX_DMA DMA1_Channel6
  88. #endif
  89. /* USART3_REMAP[1:0] = 00 */
  90. #define UART3_GPIO_RX GPIO_Pin_11
  91. #define UART3_GPIO_TX GPIO_Pin_10
  92. #define UART3_GPIO GPIOB
  93. #define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
  94. #define UART3_TX_DMA DMA1_Channel2
  95. #define UART3_RX_DMA DMA1_Channel3
  96. static void RCC_Configuration(void)
  97. {
  98. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
  99. #ifdef RT_USING_UART1
  100. /* Enable USART1 and GPIOA clocks */
  101. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
  102. #endif
  103. #ifdef RT_USING_UART2
  104. #if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
  105. /* Enable AFIO and GPIOD clock */
  106. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
  107. /* Enable the USART2 Pins Software Remapping */
  108. GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
  109. #else
  110. /* Enable AFIO and GPIOA clock */
  111. RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
  112. #endif
  113. /* Enable USART2 clock */
  114. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  115. #endif
  116. #ifdef RT_USING_UART3
  117. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
  118. /* Enable USART3 clock */
  119. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
  120. /* DMA clock enable */
  121. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
  122. #endif
  123. }
  124. static void GPIO_Configuration(void)
  125. {
  126. GPIO_InitTypeDef GPIO_InitStructure;
  127. #ifdef RT_USING_UART1
  128. /* Configure USART1 Rx (PA.10) as input floating */
  129. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
  130. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  131. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  132. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  133. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
  134. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  135. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  136. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  137. #endif
  138. #ifdef RT_USING_UART2
  139. /* Configure USART2 Rx as input floating */
  140. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
  141. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  142. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  143. /* Configure USART2 Tx as alternate function push-pull */
  144. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
  145. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  146. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  147. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  148. #endif
  149. #ifdef RT_USING_UART3
  150. /* Configure USART3 Rx as input floating */
  151. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
  152. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  153. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  154. /* Configure USART3 Tx as alternate function push-pull */
  155. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
  156. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  157. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  158. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  159. #endif
  160. }
  161. static void NVIC_Configuration(void)
  162. {
  163. NVIC_InitTypeDef NVIC_InitStructure;
  164. #ifdef RT_USING_UART1
  165. /* Enable the USART1 Interrupt */
  166. NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
  167. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  168. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  169. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  170. NVIC_Init(&NVIC_InitStructure);
  171. #endif
  172. #ifdef RT_USING_UART2
  173. /* Enable the USART2 Interrupt */
  174. NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
  175. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  176. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  177. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  178. NVIC_Init(&NVIC_InitStructure);
  179. #endif
  180. #ifdef RT_USING_UART3
  181. /* Enable the USART3 Interrupt */
  182. NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
  183. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  184. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  185. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  186. NVIC_Init(&NVIC_InitStructure);
  187. /* Enable the DMA1 Channel2 Interrupt */
  188. NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
  189. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  190. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  191. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  192. NVIC_Init(&NVIC_InitStructure);
  193. #endif
  194. }
  195. static void DMA_Configuration(void)
  196. {
  197. #if defined (RT_USING_UART3)
  198. DMA_InitTypeDef DMA_InitStructure;
  199. /* fill init structure */
  200. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  201. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  202. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
  203. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
  204. DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
  205. DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
  206. DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  207. /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
  208. DMA_DeInit(UART3_TX_DMA);
  209. DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
  210. DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
  211. DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
  212. DMA_InitStructure.DMA_BufferSize = 0;
  213. DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
  214. DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
  215. DMA_ClearFlag(DMA1_FLAG_TC5);
  216. #endif
  217. }
  218. /*
  219. * Init all related hardware in here
  220. * rt_hw_serial_init() will register all supported USART device
  221. */
  222. void rt_hw_usart_init()
  223. {
  224. USART_InitTypeDef USART_InitStructure;
  225. USART_ClockInitTypeDef USART_ClockInitStructure;
  226. RCC_Configuration();
  227. GPIO_Configuration();
  228. NVIC_Configuration();
  229. DMA_Configuration();
  230. /* uart init */
  231. #ifdef RT_USING_UART1
  232. USART_InitStructure.USART_BaudRate = 115200;
  233. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  234. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  235. USART_InitStructure.USART_Parity = USART_Parity_No;
  236. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  237. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  238. USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
  239. USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
  240. USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
  241. USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
  242. USART_Init(USART1, &USART_InitStructure);
  243. USART_ClockInit(USART1, &USART_ClockInitStructure);
  244. /* register uart1 */
  245. rt_hw_serial_register(&uart1_device, "uart1",
  246. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  247. &uart1);
  248. /* enable interrupt */
  249. USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
  250. #endif
  251. #ifdef RT_USING_UART2
  252. USART_InitStructure.USART_BaudRate = 115200;
  253. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  254. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  255. USART_InitStructure.USART_Parity = USART_Parity_No;
  256. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  257. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  258. USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
  259. USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
  260. USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
  261. USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
  262. USART_Init(USART2, &USART_InitStructure);
  263. USART_ClockInit(USART2, &USART_ClockInitStructure);
  264. /* register uart2 */
  265. rt_hw_serial_register(&uart2_device, "uart2",
  266. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  267. &uart2);
  268. /* Enable USART2 DMA Rx request */
  269. USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
  270. #endif
  271. #ifdef RT_USING_UART3
  272. USART_InitStructure.USART_BaudRate = 115200;
  273. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  274. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  275. USART_InitStructure.USART_Parity = USART_Parity_No;
  276. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  277. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  278. USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
  279. USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
  280. USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
  281. USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
  282. USART_Init(USART3, &USART_InitStructure);
  283. USART_ClockInit(USART3, &USART_ClockInitStructure);
  284. uart3_dma_tx.dma_channel= UART3_TX_DMA;
  285. /* register uart3 */
  286. rt_hw_serial_register(&uart3_device, "uart3",
  287. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
  288. &uart3);
  289. /* Enable USART3 DMA Tx request */
  290. USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
  291. /* enable interrupt */
  292. USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
  293. #endif
  294. }