board.c 7.0 KB

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  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2006-08-23 Bernard first implementation
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include "stm32f10x.h"
  17. #include "board.h"
  18. static void rt_hw_console_init(void);
  19. /**
  20. * @addtogroup STM32
  21. */
  22. /*@{*/
  23. /*******************************************************************************
  24. * Function Name : RCC_Configuration
  25. * Description : Configures the different system clocks.
  26. * Input : None
  27. * Output : None
  28. * Return : None
  29. *******************************************************************************/
  30. void RCC_Configuration(void)
  31. {
  32. ErrorStatus HSEStartUpStatus;
  33. /* RCC system reset(for debug purpose) */
  34. RCC_DeInit();
  35. /* Enable HSE */
  36. RCC_HSEConfig(RCC_HSE_ON);
  37. /* Wait till HSE is ready */
  38. HSEStartUpStatus = RCC_WaitForHSEStartUp();
  39. if (HSEStartUpStatus == SUCCESS)
  40. {
  41. /* HCLK = SYSCLK */
  42. RCC_HCLKConfig(RCC_SYSCLK_Div1);
  43. /* PCLK2 = HCLK */
  44. RCC_PCLK2Config(RCC_HCLK_Div1);
  45. /* PCLK1 = HCLK/2 */
  46. RCC_PCLK1Config(RCC_HCLK_Div2);
  47. /* Flash 2 wait state */
  48. FLASH_SetLatency(FLASH_Latency_2);
  49. /* Enable Prefetch Buffer */
  50. FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
  51. /* PLLCLK = 8MHz * 9 = 72 MHz */
  52. RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
  53. /* Enable PLL */
  54. RCC_PLLCmd(ENABLE);
  55. /* Wait till PLL is ready */
  56. while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) ;
  57. /* Select PLL as system clock source */
  58. RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
  59. /* Wait till PLL is used as system clock source */
  60. while (RCC_GetSYSCLKSource() != 0x08) ;
  61. }
  62. }
  63. /*******************************************************************************
  64. * Function Name : NVIC_Configuration
  65. * Description : Configures Vector Table base location.
  66. * Input : None
  67. * Output : None
  68. * Return : None
  69. *******************************************************************************/
  70. void NVIC_Configuration(void)
  71. {
  72. #ifdef VECT_TAB_RAM
  73. /* Set the Vector Table base location at 0x20000000 */
  74. NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
  75. #else /* VECT_TAB_FLASH */
  76. /* Set the Vector Table base location at 0x08000000 */
  77. NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
  78. #endif
  79. }
  80. /*******************************************************************************
  81. * Function Name : SysTick_Configuration
  82. * Description : Configures the SysTick for OS tick.
  83. * Input : None
  84. * Output : None
  85. * Return : None
  86. *******************************************************************************/
  87. void SysTick_Configuration(void)
  88. {
  89. RCC_ClocksTypeDef rcc_clocks;
  90. rt_uint32_t cnts;
  91. RCC_GetClocksFreq(&rcc_clocks);
  92. cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
  93. SysTick_SetReload(cnts);
  94. SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
  95. SysTick_CounterCmd(SysTick_Counter_Enable);
  96. SysTick_ITConfig(ENABLE);
  97. }
  98. extern void rt_hw_interrupt_thread_switch(void);
  99. /**
  100. * This is the timer interrupt service routine.
  101. *
  102. */
  103. void rt_hw_timer_handler(void)
  104. {
  105. /* enter interrupt */
  106. rt_interrupt_enter();
  107. rt_tick_increase();
  108. /* leave interrupt */
  109. rt_interrupt_leave();
  110. }
  111. /* NAND Flash */
  112. #include "fsmc_nand.h"
  113. /**
  114. * This function will initial STM32 Radio board.
  115. */
  116. void rt_hw_board_init()
  117. {
  118. NAND_IDTypeDef NAND_ID;
  119. /* Configure the system clocks */
  120. RCC_Configuration();
  121. /* NVIC Configuration */
  122. NVIC_Configuration();
  123. /* Configure the SysTick */
  124. SysTick_Configuration();
  125. /* Console Initialization*/
  126. rt_hw_console_init();
  127. /* FSMC Initialization */
  128. FSMC_NAND_Init();
  129. /* NAND read ID command */
  130. FSMC_NAND_ReadID(&NAND_ID);
  131. rt_kprintf("Read the NAND ID:%02X%02X%02X%02X\n",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
  132. /* SRAM init */
  133. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  134. FSMC_SRAM_Init();
  135. {
  136. /* PC6 for SDCard Rst */
  137. GPIO_InitTypeDef GPIO_InitStructure;
  138. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  139. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  140. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  141. GPIO_Init(GPIOC,&GPIO_InitStructure);
  142. GPIO_SetBits(GPIOC,GPIO_Pin_6);
  143. }
  144. }
  145. /* init console to support rt_kprintf */
  146. static void rt_hw_console_init()
  147. {
  148. /* Enable USART1 and GPIOA clocks */
  149. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1
  150. | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC
  151. | RCC_APB2Periph_GPIOF, ENABLE);
  152. /* GPIO configuration */
  153. {
  154. GPIO_InitTypeDef GPIO_InitStructure;
  155. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  156. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
  157. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  158. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  159. GPIO_Init(GPIOA, &GPIO_InitStructure);
  160. /* Configure USART1 Rx (PA.10) as input floating */
  161. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
  162. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  163. GPIO_Init(GPIOA, &GPIO_InitStructure);
  164. }
  165. /* USART configuration */
  166. {
  167. USART_InitTypeDef USART_InitStructure;
  168. /* USART1 configured as follow:
  169. - BaudRate = 115200 baud
  170. - Word Length = 8 Bits
  171. - One Stop Bit
  172. - No parity
  173. - Hardware flow control disabled (RTS and CTS signals)
  174. - Receive and transmit enabled
  175. - USART Clock disabled
  176. - USART CPOL: Clock is active low
  177. - USART CPHA: Data is captured on the middle
  178. - USART LastBit: The clock pulse of the last data bit is not output to
  179. the SCLK pin
  180. */
  181. USART_InitStructure.USART_BaudRate = 115200;
  182. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  183. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  184. USART_InitStructure.USART_Parity = USART_Parity_No;
  185. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  186. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  187. USART_Init(USART1, &USART_InitStructure);
  188. /* Enable USART1 */
  189. USART_Cmd(USART1, ENABLE);
  190. }
  191. }
  192. /* write one character to serial, must not trigger interrupt */
  193. static void rt_hw_console_putc(const char c)
  194. {
  195. /*
  196. to be polite with serial console add a line feed
  197. to the carriage return character
  198. */
  199. if (c=='\n')rt_hw_console_putc('\r');
  200. while (!(USART1->SR & USART_FLAG_TXE));
  201. USART1->DR = (c & 0x1FF);
  202. }
  203. /**
  204. * This function is used by rt_kprintf to display a string on console.
  205. *
  206. * @param str the displayed string
  207. */
  208. void rt_hw_console_output(const char* str)
  209. {
  210. while (*str)
  211. {
  212. rt_hw_console_putc (*str++);
  213. }
  214. }
  215. /*@}*/