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- /*
- * Copyright (C) 2020, Huada Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date Author Notes
- * 2020-10-30 CDT first version
- */
-
- #include <rthw.h>
- #include <rtthread.h>
- #include "board.h"
- /**
- * @addtogroup HC32
- */
- /*@{*/
- /*******************************************************************************
- * Function Name : Peripheral_WE
- * Description : MCU Peripheral registers write unprotected.
- * Input : None
- * Output : None
- * Return : None
- *******************************************************************************/
- void Peripheral_WE(void)
- {
- /* Unlock GPIO register: PSPCR, PCCR, PINAER, PCRxy, PFSRxy */
- GPIO_Unlock();
- /* Unlock PWC register: FCG0 */
- PWC_FCG0_Unlock();
- /* Unlock PWC, CLK, PVD registers, @ref PWC_REG_Write_Unlock_Code for details */
- PWC_Unlock(PWC_UNLOCK_CODE_0 | PWC_UNLOCK_CODE_1);
- /* Unlock SRAM register: WTCR */
- SRAM_WTCR_Unlock();
- /* Unlock SRAM register: CKCR */
- // SRAM_CKCR_Unlock();
- /* Unlock all EFM registers */
- EFM_Unlock();
- /* Unlock EFM register: FWMC */
- // EFM_FWMC_Unlock();
- /* Unlock EFM OTP write protect registers */
- // EFM_OTP_WP_Unlock();
- }
- /*******************************************************************************
- * Function Name : Peripheral_WP
- * Description : MCU Peripheral registers write protected.
- * Input : None
- * Output : None
- * Return : None
- *******************************************************************************/
- void Peripheral_WP(void)
- {
- /* Lock GPIO register: PSPCR, PCCR, PINAER, PCRxy, PFSRxy */
- GPIO_Lock();
- /* Lock PWC register: FCG0 */
- // PWC_FCG0_Lock();
- /* Lock PWC, CLK, PVD registers, @ref PWC_REG_Write_Unlock_Code for details */
- PWC_Lock(PWC_UNLOCK_CODE_0 | PWC_UNLOCK_CODE_1);
- /* Lock SRAM register: WTCR */
- // SRAM_WTCR_Lock();
- /* Lock SRAM register: CKCR */
- // SRAM_CKCR_Lock();
- /* Lock all EFM registers */
- // EFM_Lock();
- /* Lock EFM OTP write protect registers */
- // EFM_OTP_WP_Lock();
- /* Lock EFM register: FWMC */
- // EFM_FWMC_Lock();
- }
- /**
- * @brief BSP clock initialize.
- * Set board system clock to PLLH@240MHz
- * @param None
- * @retval None
- */
- void rt_hw_board_clock_init(void)
- {
- stc_clk_pllh_init_t stcPLLHInit;
- CLK_ClkDiv(CLK_CATE_ALL, \
- (CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV4 | \
- CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2 | CLK_EXCLK_DIV2 | \
- CLK_HCLK_DIV1));
- (void)CLK_PLLHStrucInit(&stcPLLHInit);
- /* VCO = (8/1)*120 = 960MHz*/
- stcPLLHInit.u8PLLState = CLK_PLLH_ON;
- stcPLLHInit.PLLCFGR = 0UL;
- stcPLLHInit.PLLCFGR_f.PLLM = 1UL - 1UL;
- stcPLLHInit.PLLCFGR_f.PLLN = 120UL - 1UL;
- stcPLLHInit.PLLCFGR_f.PLLP = 4UL - 1UL;
- stcPLLHInit.PLLCFGR_f.PLLQ = 4UL - 1UL;
- stcPLLHInit.PLLCFGR_f.PLLR = 4UL - 1UL;
- stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLLSRC_XTAL;
- (void)CLK_PLLHInit(&stcPLLHInit);
- /* Highspeed SRAM set to 1 Read/Write wait cycle */
- SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE_1, SRAM_WAIT_CYCLE_1);
- /* SRAM1_2_3_4_backup set to 2 Read/Write wait cycle */
- SRAM_SetWaitCycle((SRAM_SRAM123 | SRAM_SRAM4 | SRAM_SRAMB), SRAM_WAIT_CYCLE_2, SRAM_WAIT_CYCLE_2);
- /* 0-wait @ 40MHz */
- EFM_SetWaitCycle(EFM_WAIT_CYCLE_5);
- /* 4 cycles for 200 ~ 250MHz */
- GPIO_SetReadWaitCycle(GPIO_READ_WAIT_4);
- CLK_SetSysClkSrc(CLK_SYSCLKSOURCE_PLLH);
- }
- /*******************************************************************************
- * Function Name : SysTick_Configuration
- * Description : Configures the SysTick for OS tick.
- * Input : None
- * Output : None
- * Return : None
- *******************************************************************************/
- void SysTick_Configuration(void)
- {
- stc_clk_freq_t stcClkFreq;
- rt_uint32_t cnts;
- CLK_GetClockFreq(&stcClkFreq);
- cnts = (rt_uint32_t)stcClkFreq.hclkFreq / RT_TICK_PER_SECOND;
- SysTick_Config(cnts);
- }
- /**
- * This is the timer interrupt service routine.
- *
- */
- void SysTick_Handler(void)
- {
- /* enter interrupt */
- rt_interrupt_enter();
- rt_tick_increase();
- /* leave interrupt */
- rt_interrupt_leave();
- }
- /**
- * This function will initialize HC32 board.
- */
- void rt_hw_board_init()
- {
- /* Unlock the protected registers. */
- Peripheral_WE();
- /* Configure the System clock */
- rt_hw_board_clock_init();
- /* Configure the SysTick */
- SysTick_Configuration();
- #ifdef RT_USING_HEAP
- rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
- #endif
- #ifdef RT_USING_COMPONENTS_INIT
- rt_components_board_init();
- #endif
- #ifdef RT_USING_CONSOLE
- rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
- #endif
- }
- void rt_hw_us_delay(rt_uint32_t us)
- {
- uint32_t start, now, delta, reload, us_tick;
- start = SysTick->VAL;
- reload = SysTick->LOAD;
- us_tick = SystemCoreClock / 1000000UL;
- do{
- now = SysTick->VAL;
- delta = start > now ? start - now : reload + start - now;
- }
- while(delta < us_tick * us);
- }
- /*@}*/
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