uart.c 4.7 KB

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  1. /*
  2. * File : uart.c
  3. * Drivers for s3c2440 uarts.
  4. * Change Logs:
  5. * Date Author Notes
  6. * 2020-04-09 Jonne Code refactoring for new bsp
  7. */
  8. #include <rthw.h>
  9. #include <rtdevice.h>
  10. #include <board.h>
  11. #define ULCON_OFS 0x00
  12. #define UCON_OFS 0x04
  13. #define UFCON_OFS 0x08
  14. #define UMCON_OFS 0x0c
  15. #define UTRSTAT_OFS 0x10
  16. #define UERSTAT_OFS 0x14
  17. #define UFSTAT_OFS 0x18
  18. #define UMSTAT_OFS 0x1c
  19. #define UTXH_OFS 0x20
  20. #define URXH_OFS 0x24
  21. #define UBRDIV_OFS 0x28
  22. #define readl(addr) (*(volatile unsigned long *)(addr))
  23. #define writel(addr, value) (*(volatile unsigned long *)(addr) = value)
  24. #define PCLK_HZ 50000000
  25. struct hw_uart_device
  26. {
  27. rt_uint32_t hw_base;
  28. rt_uint32_t irqno;
  29. };
  30. static rt_err_t s3c2440_serial_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  31. {
  32. struct hw_uart_device* uart = serial->parent.user_data;
  33. writel(uart->hw_base + UBRDIV_OFS, PCLK_HZ / (cfg->baud_rate * 16));
  34. writel(uart->hw_base + ULCON_OFS, 0x03);// 8bit data, 1bit stop, No parity
  35. writel(uart->hw_base + UCON_OFS, 0x05);
  36. writel(uart->hw_base + UFCON_OFS, 0x00);
  37. writel(uart->hw_base + UMCON_OFS, 0x00);
  38. return RT_EOK;
  39. }
  40. static rt_err_t s3c2440_serial_control(struct rt_serial_device *serial, int cmd, void *arg)
  41. {
  42. struct hw_uart_device *uart;
  43. int mask;
  44. RT_ASSERT(serial != RT_NULL);
  45. uart = (struct hw_uart_device *)serial->parent.user_data;
  46. if(uart->irqno == INTUART0)
  47. {
  48. mask = BIT_SUB_RXD0;
  49. }
  50. else if(uart->irqno == INTUART1)
  51. {
  52. mask = BIT_SUB_RXD1;
  53. }
  54. else
  55. {
  56. mask = BIT_SUB_RXD2;
  57. }
  58. switch (cmd)
  59. {
  60. case RT_DEVICE_CTRL_CLR_INT:
  61. /* disable rx irq */
  62. INTSUBMSK |= mask;
  63. break;
  64. case RT_DEVICE_CTRL_SET_INT:
  65. /* enable rx irq */
  66. INTSUBMSK &= ~mask;
  67. break;
  68. }
  69. return RT_EOK;
  70. }
  71. static int s3c2440_putc(struct rt_serial_device *serial, char c)
  72. {
  73. struct hw_uart_device* uart = serial->parent.user_data;
  74. while(!(readl(uart->hw_base + UTRSTAT_OFS) & (1<<2)))
  75. {
  76. }
  77. writel(uart->hw_base + UTXH_OFS, c);
  78. return 0;
  79. }
  80. static int s3c2440_getc(struct rt_serial_device *serial)
  81. {
  82. struct hw_uart_device* uart = serial->parent.user_data;
  83. int ch = -1;
  84. if(readl(uart->hw_base + UTRSTAT_OFS) & (1<<0))
  85. {
  86. ch = readl(uart->hw_base + URXH_OFS) & 0x000000FF;
  87. }
  88. return ch;
  89. }
  90. static void rt_hw_uart_isr(int irqno, void *param)
  91. {
  92. struct rt_serial_device *serial = (struct rt_serial_device *)param;
  93. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  94. /*clear SUBSRCPND*/
  95. if(irqno == INTUART0)
  96. {
  97. SUBSRCPND = BIT_SUB_RXD0;
  98. }
  99. else if(irqno == INTUART1)
  100. {
  101. SUBSRCPND = BIT_SUB_RXD1;
  102. }
  103. else
  104. {
  105. SUBSRCPND = BIT_SUB_RXD2;
  106. }
  107. }
  108. static struct rt_uart_ops s3c2440_uart_ops = {
  109. .configure = s3c2440_serial_configure,
  110. .control = s3c2440_serial_control,
  111. .putc = s3c2440_putc,
  112. .getc = s3c2440_getc
  113. };
  114. static struct rt_serial_device _serial0 = {
  115. .ops = &s3c2440_uart_ops,
  116. .config = RT_SERIAL_CONFIG_DEFAULT,
  117. .serial_rx = NULL,
  118. .serial_tx = NULL
  119. };
  120. static struct hw_uart_device _hwserial0 = {
  121. .hw_base = 0x50000000,
  122. .irqno = INTUART0
  123. };
  124. static struct rt_serial_device _serial1 = {
  125. .ops = &s3c2440_uart_ops,
  126. .config = RT_SERIAL_CONFIG_DEFAULT,
  127. .serial_rx = NULL,
  128. .serial_tx = NULL
  129. };
  130. static struct hw_uart_device _hwserial1 = {
  131. .hw_base = 0x50004000,
  132. .irqno = INTUART1
  133. };
  134. static struct rt_serial_device _serial2 = {
  135. .ops = &s3c2440_uart_ops,
  136. .config = RT_SERIAL_CONFIG_DEFAULT,
  137. .serial_rx = NULL,
  138. .serial_tx = NULL
  139. };
  140. static struct hw_uart_device _hwserial2 = {
  141. .hw_base = 0x50008000,
  142. .irqno = INTUART2
  143. };
  144. int rt_hw_uart_init(void)
  145. {
  146. /* UART0 UART1 UART2 port configure */
  147. GPHCON |= 0xAAAA;
  148. /* PULLUP is disable */
  149. GPHUP |= 0xFFF;
  150. /* register UART0 device */
  151. rt_hw_serial_register(&_serial0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &_hwserial0);
  152. rt_hw_interrupt_install(_hwserial0.irqno, rt_hw_uart_isr, &_serial0, "uart0");
  153. rt_hw_interrupt_umask(INTUART0);
  154. /* register UART1 device */
  155. rt_hw_serial_register(&_serial1, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &_hwserial1);
  156. rt_hw_interrupt_install(_hwserial1.irqno, rt_hw_uart_isr, &_serial1, "uart1");
  157. rt_hw_interrupt_umask(INTUART1);
  158. /* register UART2 device */
  159. rt_hw_serial_register(&_serial2, "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &_hwserial2);
  160. rt_hw_interrupt_install(_hwserial2.irqno, rt_hw_uart_isr, &_serial2, "uart2");
  161. rt_hw_interrupt_umask(INTUART2);
  162. return RT_EOK;
  163. }
  164. INIT_BOARD_EXPORT(rt_hw_uart_init);