system_SWM320.c 7.4 KB

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  1. /******************************************************************************************************************************************
  2. * 文件名称: system_SWM320.c
  3. * 功能说明: SWM320单片机的时钟设置
  4. * 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1
  5. * 注意事项:
  6. * 版本日期: V1.1.0 2017年10月25日
  7. * 升级记录:
  8. *
  9. *
  10. *******************************************************************************************************************************************
  11. * @attention
  12. *
  13. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION
  14. * REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE
  15. * FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
  16. * OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONN-
  17. * -ECTION WITH THEIR PRODUCTS.
  18. *
  19. * COPYRIGHT 2012 Synwit Technology
  20. *******************************************************************************************************************************************/
  21. #include <stdint.h>
  22. #include "SWM320.h"
  23. /******************************************************************************************************************************************
  24. * 系统时钟设定
  25. *****************************************************************************************************************************************/
  26. #define SYS_CLK_20MHz 0 //0 内部高频20MHz RC振荡器
  27. #define SYS_CLK_40MHz 1 //1 内部高频40MHz RC振荡器
  28. #define SYS_CLK_32KHz 2 //2 内部低频32KHz RC振荡器
  29. #define SYS_CLK_XTAL 3 //3 外部晶体振荡器(2-30MHz)
  30. #define SYS_CLK_PLL 4 //4 片内锁相环输出
  31. #define SYS_CLK SYS_CLK_PLL
  32. #define SYS_CLK_DIV_1 0
  33. #define SYS_CLK_DIV_2 1
  34. #define SYS_CLK_DIV SYS_CLK_DIV_1
  35. #define __HSI (20000000UL) //高速内部时钟
  36. #define __LSI ( 32000UL) //低速内部时钟
  37. #define __HSE (20000000UL) //高速外部时钟
  38. /********************************** PLL 设定 **********************************************
  39. * VCO输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV
  40. * PLL输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV / OUTDIV = VCO输出频率 / OUTDIV
  41. *****************************************************************************************/
  42. #define SYS_PLL_SRC SYS_CLK_20MHz //可取值SYS_CLK_20MHz、SYS_CLK_XTAL
  43. #define PLL_IN_DIV 5
  44. #define PLL_FB_DIV 60
  45. #define PLL_OUT_DIV8 0
  46. #define PLL_OUT_DIV4 1
  47. #define PLL_OUT_DIV2 2
  48. #define PLL_OUT_DIV PLL_OUT_DIV8
  49. uint32_t SystemCoreClock = __HSI; //System Clock Frequency (Core Clock)
  50. uint32_t CyclesPerUs = (__HSI / 1000000); //Cycles per micro second
  51. /******************************************************************************************************************************************
  52. * 函数名称:
  53. * 功能说明: This function is used to update the variable SystemCoreClock and must be called whenever the core clock is changed
  54. * 输 入:
  55. * 输 出:
  56. * 注意事项:
  57. ******************************************************************************************************************************************/
  58. void SystemCoreClockUpdate(void)
  59. {
  60. if(SYS->CLKSEL & SYS_CLKSEL_SYS_Msk) //SYS_CLK <= HFCK
  61. {
  62. if(SYS->CLKSEL & SYS_CLKSEL_HFCK_Msk) //HFCK <= XTAL
  63. {
  64. SystemCoreClock = __HSE;
  65. }
  66. else //HFCK <= HRC
  67. {
  68. if(SYS->HRCCR & SYS_HRCCR_DBL_Msk) //HRC = 40MHz
  69. {
  70. SystemCoreClock = __HSI*2;
  71. }
  72. else //HRC = 20MHz
  73. {
  74. SystemCoreClock = __HSI;
  75. }
  76. }
  77. }
  78. else //SYS_CLK <= LFCK
  79. {
  80. if(SYS->CLKSEL & SYS_CLKSEL_LFCK_Msk) //LFCK <= PLL
  81. {
  82. if(SYS->PLLCR & SYS_PLLCR_INSEL_Msk) //PLL_SRC <= HRC
  83. {
  84. SystemCoreClock = __HSI;
  85. }
  86. else //PLL_SRC <= XTAL
  87. {
  88. SystemCoreClock = __HSE;
  89. }
  90. SystemCoreClock = SystemCoreClock / PLL_IN_DIV * PLL_FB_DIV * 4 / (2 << (2 - PLL_OUT_DIV));
  91. }
  92. else //LFCK <= LRC
  93. {
  94. SystemCoreClock = __LSI;
  95. }
  96. }
  97. if(SYS->CLKDIV & SYS_CLKDIV_SYS_Msk) SystemCoreClock /= 2;
  98. CyclesPerUs = SystemCoreClock / 1000000;
  99. }
  100. /******************************************************************************************************************************************
  101. * 函数名称:
  102. * 功能说明: The necessary initializaiton of systerm
  103. * 输 入:
  104. * 输 出:
  105. * 注意事项:
  106. ******************************************************************************************************************************************/
  107. void SystemInit(void)
  108. {
  109. SYS->CLKEN |= (1 << SYS_CLKEN_ANAC_Pos);
  110. Flash_Param_at_xMHz(120);
  111. switch(SYS_CLK)
  112. {
  113. case SYS_CLK_20MHz: //0 内部高频20MHz RC振荡器
  114. switchCLK_20MHz();
  115. break;
  116. case SYS_CLK_40MHz: //1 内部高频40MHz RC振荡器
  117. switchCLK_40MHz();
  118. break;
  119. case SYS_CLK_32KHz: //2 内部低频32KHz RC振荡器
  120. switchCLK_32KHz();
  121. break;
  122. case SYS_CLK_XTAL: //3 外部晶体振荡器(2-30MHz)
  123. switchCLK_XTAL();
  124. break;
  125. case SYS_CLK_PLL: //4 片内锁相环输出
  126. switchCLK_PLL();
  127. break;
  128. }
  129. SYS->CLKDIV &= ~SYS_CLKDIV_SYS_Msk;
  130. SYS->CLKDIV |= (SYS_CLK_DIV << SYS_CLKDIV_SYS_Pos);
  131. SystemCoreClockUpdate();
  132. if(SystemCoreClock > 80000000)
  133. {
  134. Flash_Param_at_xMHz(120);
  135. }
  136. else if(SystemCoreClock > 40000000)
  137. {
  138. Flash_Param_at_xMHz(80);
  139. }
  140. else if(SystemCoreClock > 30000000)
  141. {
  142. Flash_Param_at_xMHz(40);
  143. }
  144. else
  145. {
  146. Flash_Param_at_xMHz(30);
  147. }
  148. }
  149. void switchCLK_20MHz(void)
  150. {
  151. uint32_t i;
  152. SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) |
  153. (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz
  154. for(i = 0; i < 1000; i++) __NOP();
  155. SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk; //HFCK <= HRC
  156. SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK
  157. }
  158. void switchCLK_40MHz(void)
  159. {
  160. uint32_t i;
  161. SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) |
  162. (1 << SYS_HRCCR_DBL_Pos); //HRC = 40MHz
  163. for(i = 0; i < 1000; i++) __NOP();
  164. SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk; //HFCK <= HRC
  165. SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK
  166. }
  167. void switchCLK_32KHz(void)
  168. {
  169. uint32_t i;
  170. SYS->CLKEN |= (1 << SYS_CLKEN_RTCBKP_Pos);
  171. SYS->LRCCR &= ~(1 << SYS_LRCCR_OFF_Pos);
  172. for(i = 0; i < 100; i++) __NOP();
  173. SYS->CLKSEL &= ~SYS_CLKSEL_LFCK_Msk; //LFCK <= LRC
  174. SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk; //SYS_CLK <= LFCK
  175. }
  176. void switchCLK_XTAL(void)
  177. {
  178. uint32_t i;
  179. SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos);
  180. for(i = 0; i < 1000; i++) __NOP();
  181. SYS->CLKSEL |= (1 << SYS_CLKSEL_HFCK_Pos); //HFCK <= XTAL
  182. SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK <= HFCK
  183. }
  184. void switchCLK_PLL(void)
  185. {
  186. uint32_t i;
  187. PLLInit();
  188. SYS->PLLCR |= (1 << SYS_PLLCR_OUTEN_Pos);
  189. for(i = 0; i < 10000; i++) __NOP();
  190. SYS->CLKSEL |= (1 << SYS_CLKSEL_LFCK_Pos); //LFCK <= PLL
  191. SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk; //SYS_CLK <= LFCK
  192. }
  193. void PLLInit(void)
  194. {
  195. uint32_t i;
  196. if(SYS_PLL_SRC == SYS_CLK_20MHz)
  197. {
  198. SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) |
  199. (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz
  200. for(i = 0; i < 1000; i++) __NOP();
  201. SYS->PLLCR |= (1 << SYS_PLLCR_INSEL_Pos); //PLL_SRC <= HRC
  202. }
  203. else if(SYS_PLL_SRC == SYS_CLK_XTAL)
  204. {
  205. SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos);
  206. for(i = 0; i < 20000; i++);
  207. SYS->PLLCR &= ~(1 << SYS_PLLCR_INSEL_Pos); //PLL_SRC <= XTAL
  208. }
  209. SYS->PLLDIV &= ~(SYS_PLLDIV_INDIV_Msk |
  210. SYS_PLLDIV_FBDIV_Msk |
  211. SYS_PLLDIV_OUTDIV_Msk);
  212. SYS->PLLDIV |= (PLL_IN_DIV << SYS_PLLDIV_INDIV_Pos) |
  213. (PLL_FB_DIV << SYS_PLLDIV_FBDIV_Pos) |
  214. (PLL_OUT_DIV<< SYS_PLLDIV_OUTDIV_Pos);
  215. SYS->PLLCR &= ~(1 << SYS_PLLCR_OFF_Pos);
  216. while(SYS->PLLLOCK == 0); //等待PLL锁定
  217. }