drv_dac.c 5.4 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-03-04 stevetong459 first version
  9. * 2022-07-15 Aligagago add apm32F4 serie MCU support
  10. * 2022-12-26 luobeihai add apm32F0 serie MCU support
  11. */
  12. #include <board.h>
  13. #if defined(BSP_USING_DAC1)
  14. #define DBG_TAG "drv.dac"
  15. #define DBG_LVL DBG_LOG//DBG_INFO
  16. #include <rtdbg.h>
  17. struct apm32_dac
  18. {
  19. const char *name;
  20. DAC_T *dac;
  21. DAC_Config_T dac_conf;
  22. struct rt_dac_device dac_dev;
  23. };
  24. static struct apm32_dac dac_config[] =
  25. {
  26. #if defined (BSP_USING_DAC1)
  27. {
  28. #if defined (SOC_SERIES_APM32F0)
  29. "dac1",
  30. DAC,
  31. {
  32. DAC_TRIGGER_SOFTWARE,
  33. DAC_OUTPUTBUFF_DISABLE,
  34. DAC_WAVE_GENERATION_NONE,
  35. DAC_TRIANGLEAMPLITUDE_4095,
  36. },
  37. RT_NULL,
  38. #elif defined (SOC_SERIES_APM32F1) || defined (SOC_SERIES_APM32F4)
  39. "dac1",
  40. DAC,
  41. {
  42. DAC_TRIGGER_SOFT,
  43. DAC_OUTPUT_BUFFER_DISABLE,
  44. DAC_WAVE_GENERATION_NONE,
  45. DAC_TRIANGLE_AMPLITUDE_4095,
  46. },
  47. RT_NULL,
  48. #endif
  49. }
  50. #endif
  51. };
  52. /**
  53. * @brief This function will enable dac.
  54. *
  55. * @param device is a pointer to dac device.
  56. *
  57. * @param channel is the dac channel.
  58. *
  59. * @return RT_EOK indicates successful enable dac, other value indicates failed.
  60. */
  61. static rt_err_t apm32_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel)
  62. {
  63. GPIO_Config_T GPIO_ConfigStruct;
  64. struct apm32_dac *cfg = (struct apm32_dac *)device->parent.user_data;
  65. #if defined (SOC_SERIES_APM32F1)
  66. RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOA);
  67. GPIO_ConfigStruct.mode = GPIO_MODE_ANALOG;
  68. #elif defined (SOC_SERIES_APM32F4)
  69. RCM_EnableAHB1PeriphClock(RCM_AHB1_PERIPH_GPIOA);
  70. GPIO_ConfigStruct.mode = GPIO_MODE_AN;
  71. #elif defined (SOC_SERIES_APM32F0)
  72. RCM_EnableAHBPeriphClock(RCM_AHB_PERIPH_GPIOA);
  73. GPIO_ConfigStruct.mode = GPIO_MODE_AN;
  74. #endif
  75. if (channel == 1)
  76. {
  77. GPIO_ConfigStruct.pin = GPIO_PIN_4;
  78. GPIO_Config(GPIOA, &GPIO_ConfigStruct);
  79. DAC_Config(DAC_CHANNEL_1, &cfg->dac_conf);
  80. DAC_Enable(DAC_CHANNEL_1);
  81. }
  82. else if (channel == 2)
  83. {
  84. GPIO_ConfigStruct.pin = GPIO_PIN_5;
  85. GPIO_Config(GPIOA, &GPIO_ConfigStruct);
  86. DAC_Config(DAC_CHANNEL_2, &cfg->dac_conf);
  87. DAC_Enable(DAC_CHANNEL_2);
  88. }
  89. else
  90. {
  91. LOG_E("dac channel must be 1 or 2.");
  92. return -RT_ERROR;
  93. }
  94. return RT_EOK;
  95. }
  96. /**
  97. * @brief This function will disable dac.
  98. *
  99. * @param device is a pointer to dac device.
  100. *
  101. * @param channel is the dac channel.
  102. *
  103. * @return RT_EOK indicates successful disable dac, other value indicates failed.
  104. */
  105. static rt_err_t apm32_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel)
  106. {
  107. if (channel == 1)
  108. {
  109. DAC_Disable(DAC_CHANNEL_1);
  110. }
  111. else if (channel == 2)
  112. {
  113. DAC_Disable(DAC_CHANNEL_2);
  114. }
  115. else
  116. {
  117. LOG_E("dac channel must be 1 or 2.");
  118. return -RT_ERROR;
  119. }
  120. return RT_EOK;
  121. }
  122. /**
  123. * @brief This function will set the vaule of dac.
  124. *
  125. * @param device is a pointer to dac device.
  126. *
  127. * @param channel is the dac channel.
  128. *
  129. * @param value is a pointer to dac value to be convert.
  130. *
  131. * @return RT_EOK indicates successful set dac value, other value indicates failed.
  132. */
  133. static rt_err_t apm32_dac_set_value(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value)
  134. {
  135. #if defined (SOC_SERIES_APM32F0)
  136. if (channel == 1)
  137. {
  138. DAC_ConfigChannel1Data(DAC_ALIGN_12B_R, *value);
  139. DAC_EnableSoftwareTrigger(DAC_CHANNEL_1);
  140. }
  141. else if (channel == 2)
  142. {
  143. DAC_ConfigChannel2Data(DAC_ALIGN_12B_R, *value);
  144. DAC_EnableSoftwareTrigger(DAC_CHANNEL_2);
  145. }
  146. else
  147. {
  148. LOG_E("dac channel must be 1 or 2.");
  149. return -RT_ERROR;
  150. }
  151. #elif defined (SOC_SERIES_APM32F1) || defined (SOC_SERIES_APM32F4)
  152. if (channel == 1)
  153. {
  154. DAC_ConfigChannel1Data(DAC_ALIGN_12BIT_R, *value);
  155. DAC_EnableSoftwareTrigger(DAC_CHANNEL_1);
  156. }
  157. else if (channel == 2)
  158. {
  159. DAC_ConfigChannel2Data(DAC_ALIGN_12BIT_R, *value);
  160. DAC_EnableSoftwareTrigger(DAC_CHANNEL_2);
  161. }
  162. else
  163. {
  164. LOG_E("dac channel must be 1 or 2.");
  165. return -RT_ERROR;
  166. }
  167. #endif
  168. return RT_EOK;
  169. }
  170. static const struct rt_dac_ops apm32_dac_ops =
  171. {
  172. .disabled = apm32_dac_disabled,
  173. .enabled = apm32_dac_enabled,
  174. .convert = apm32_dac_set_value,
  175. };
  176. /**
  177. * @brief DAC initialization function.
  178. *
  179. * @return RT_EOK indicates successful initialization, other value indicates failed;
  180. */
  181. static int rt_hw_dac_init(void)
  182. {
  183. rt_err_t result = RT_EOK;
  184. rt_size_t obj_num = sizeof(dac_config) / sizeof(struct apm32_dac);
  185. rt_uint32_t i = 0;
  186. RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_DAC);
  187. for (i = 0; i < obj_num; i++)
  188. {
  189. /* register dac device */
  190. if (rt_hw_dac_register(&dac_config[i].dac_dev, dac_config[i].name, &apm32_dac_ops, dac_config) == RT_EOK)
  191. {
  192. LOG_D("%s init success", dac_config[i].name);
  193. }
  194. else
  195. {
  196. LOG_E("%s init failed", dac_config[i].name);
  197. result = -RT_ERROR;
  198. }
  199. }
  200. return result;
  201. }
  202. INIT_DEVICE_EXPORT(rt_hw_dac_init);
  203. #endif /* BSP_USING_DACX */