apm32f10x_dma.h 7.0 KB

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  1. /*!
  2. * @file apm32f10x_dma.h
  3. *
  4. * @brief This file contains all the functions prototypes for the DMA firmware library
  5. *
  6. * @version V1.0.1
  7. *
  8. * @date 2021-03-23
  9. *
  10. */
  11. #ifndef __APM32F10X_DMA_H
  12. #define __APM32F10X_DMA_H
  13. #include "apm32f10x.h"
  14. #ifdef __cplusplus
  15. extern "C" {
  16. #endif
  17. /** @addtogroup Peripherals_Library Standard Peripheral Library
  18. @{
  19. */
  20. /** @addtogroup DMA_Driver DMA Driver
  21. @{
  22. */
  23. /** @addtogroup DMA_Enumerations Enumerations
  24. @{
  25. */
  26. /**
  27. * @brief DMA Transmission direction
  28. */
  29. typedef enum
  30. {
  31. DMA_DIR_PERIPHERAL_SRC,
  32. DMA_DIR_PERIPHERAL_DST
  33. } DMA_DIR_T;
  34. /**
  35. * @brief DMA Peripheral address increment
  36. */
  37. typedef enum
  38. {
  39. DMA_PERIPHERAL_INC_DISABLE,
  40. DMA_PERIPHERAL_INC_ENABLE
  41. } DMA_PERIPHERAL_INC_T;
  42. /**
  43. * @brief DMA Memory address increment
  44. */
  45. typedef enum
  46. {
  47. DMA_MEMORY_INC_DISABLE,
  48. DMA_MEMORY_INC_ENABLE
  49. } DMA_MEMORY_INC_T;
  50. /**
  51. * @brief DMA Peripheral Data Size
  52. */
  53. typedef enum
  54. {
  55. DMA_PERIPHERAL_DATA_SIZE_BYTE,
  56. DMA_PERIPHERAL_DATA_SIZE_HALFWORD,
  57. DMA_PERIPHERAL_DATA_SIZE_WOED
  58. } DMA_PERIPHERAL_DATA_SIZE_T;
  59. /**
  60. * @brief DMA Memory Data Size
  61. */
  62. typedef enum
  63. {
  64. DMA_MEMORY_DATA_SIZE_BYTE,
  65. DMA_MEMORY_DATA_SIZE_HALFWORD,
  66. DMA_MEMORY_DATA_SIZE_WOED
  67. } DMA_MEMORY_DATA_SIZE_T;
  68. /**
  69. * @brief DMA Mode
  70. */
  71. typedef enum
  72. {
  73. DMA_MODE_NORMAL,
  74. DMA_MODE_CIRCULAR
  75. } DMA_LOOP_MODE_T;
  76. /**
  77. * @brief DMA priority level
  78. */
  79. typedef enum
  80. {
  81. DMA_PRIORITY_LOW,
  82. DMA_PRIORITY_MEDIUM,
  83. DMA_PRIORITY_HIGH,
  84. DMA_PRIORITY_VERYHIGH
  85. } DMA_PRIORITY_T;
  86. /**
  87. * @brief DMA Memory to Memory
  88. */
  89. typedef enum
  90. {
  91. DMA_M2MEN_DISABLE,
  92. DMA_M2MEN_ENABLE
  93. } DMA_M2MEN_T;
  94. /**
  95. * @brief DMA interrupt
  96. */
  97. typedef enum
  98. {
  99. DMA_INT_TC = 0x00000002,
  100. DMA_INT_HT = 0x00000004,
  101. DMA_INT_TERR = 0x00000008
  102. } DMA_INT_T;
  103. /**
  104. * @brief DMA Flag
  105. */
  106. typedef enum
  107. {
  108. DMA1_FLAG_GINT1 = 0x00000001,
  109. DMA1_FLAG_TC1 = 0x00000002,
  110. DMA1_FLAG_HT1 = 0x00000004,
  111. DMA1_FLAG_TERR1 = 0x00000008,
  112. DMA1_FLAG_GINT2 = 0x00000010,
  113. DMA1_FLAG_TC2 = 0x00000020,
  114. DMA1_FLAG_HT2 = 0x00000040,
  115. DMA1_FLAG_TERR2 = 0x00000080,
  116. DMA1_FLAG_GINT3 = 0x00000100,
  117. DMA1_FLAG_TC3 = 0x00000200,
  118. DMA1_FLAG_HT3 = 0x00000400,
  119. DMA1_FLAG_TERR3 = 0x00000800,
  120. DMA1_FLAG_GINT4 = 0x00001000,
  121. DMA1_FLAG_TC4 = 0x00002000,
  122. DMA1_FLAG_HT4 = 0x00004000,
  123. DMA1_FLAG_TERR4 = 0x00008000,
  124. DMA1_FLAG_GINT5 = 0x00010000,
  125. DMA1_FLAG_TC5 = 0x00020000,
  126. DMA1_FLAG_HT5 = 0x00040000,
  127. DMA1_FLAG_TERR5 = 0x00080000,
  128. DMA1_FLAG_GINT6 = 0x00100000,
  129. DMA1_FLAG_TC6 = 0x00200000,
  130. DMA1_FLAG_HT6 = 0x00400000,
  131. DMA1_FLAG_TERR6 = 0x00800000,
  132. DMA1_FLAG_GINT7 = 0x01000000,
  133. DMA1_FLAG_TC7 = 0x02000000,
  134. DMA1_FLAG_HT7 = 0x04000000,
  135. DMA1_FLAG_TERR7 = 0x08000000,
  136. DMA2_FLAG_GINT1 = 0x10000001,
  137. DMA2_FLAG_TC1 = 0x10000002,
  138. DMA2_FLAG_HT1 = 0x10000004,
  139. DMA2_FLAG_TERR1 = 0x10000008,
  140. DMA2_FLAG_GINT2 = 0x10000010,
  141. DMA2_FLAG_TC2 = 0x10000020,
  142. DMA2_FLAG_HT2 = 0x10000040,
  143. DMA2_FLAG_TERR2 = 0x10000080,
  144. DMA2_FLAG_GINT3 = 0x10000100,
  145. DMA2_FLAG_TC3 = 0x10000200,
  146. DMA2_FLAG_HT3 = 0x10000400,
  147. DMA2_FLAG_TERR3 = 0x10000800,
  148. DMA2_FLAG_GINT4 = 0x10001000,
  149. DMA2_FLAG_TC4 = 0x10002000,
  150. DMA2_FLAG_HT4 = 0x10004000,
  151. DMA2_FLAG_TERR4 = 0x10008000,
  152. DMA2_FLAG_GINT5 = 0x10010000,
  153. DMA2_FLAG_TC5 = 0x10020000,
  154. DMA2_FLAG_HT5 = 0x10040000,
  155. DMA2_FLAG_TERR5 = 0x10080000
  156. } DMA_FLAG_T;
  157. /**
  158. * @brief DMA Flag
  159. */
  160. typedef enum
  161. {
  162. DMA1_INT_FLAG_GINT1 = 0x00000001,
  163. DMA1_INT_FLAG_TC1 = 0x00000002,
  164. DMA1_INT_FLAG_HT1 = 0x00000004,
  165. DMA1_INT_FLAG_TERR1 = 0x00000008,
  166. DMA1_INT_FLAG_GINT2 = 0x00000010,
  167. DMA1_INT_FLAG_TC2 = 0x00000020,
  168. DMA1_INT_FLAG_HT2 = 0x00000040,
  169. DMA1_INT_FLAG_TERR2 = 0x00000080,
  170. DMA1_INT_FLAG_GINT3 = 0x00000100,
  171. DMA1_INT_FLAG_TC3 = 0x00000200,
  172. DMA1_INT_FLAG_HT3 = 0x00000400,
  173. DMA1_INT_FLAG_TERR3 = 0x00000800,
  174. DMA1_INT_FLAG_GINT4 = 0x00001000,
  175. DMA1_INT_FLAG_TC4 = 0x00002000,
  176. DMA1_INT_FLAG_HT4 = 0x00004000,
  177. DMA1_INT_FLAG_TERR4 = 0x00008000,
  178. DMA1_INT_FLAG_GINT5 = 0x00010000,
  179. DMA1_INT_FLAG_TC5 = 0x00020000,
  180. DMA1_INT_FLAG_HT5 = 0x00040000,
  181. DMA1_INT_FLAG_TERR5 = 0x00080000,
  182. DMA1_INT_FLAG_GINT6 = 0x00100000,
  183. DMA1_INT_FLAG_TC6 = 0x00200000,
  184. DMA1_INT_FLAG_HT6 = 0x00400000,
  185. DMA1_INT_FLAG_TERR6 = 0x00800000,
  186. DMA1_INT_FLAG_GINT7 = 0x01000000,
  187. DMA1_INT_FLAG_TC7 = 0x02000000,
  188. DMA1_INT_FLAG_HT7 = 0x04000000,
  189. DMA1_INT_FLAG_TERR7 = 0x08000000,
  190. DMA2_INT_FLAG_GINT1 = 0x10000001,
  191. DMA2_INT_FLAG_TC1 = 0x10000002,
  192. DMA2_INT_FLAG_HT1 = 0x10000004,
  193. DMA2_INT_FLAG_TERR1 = 0x10000008,
  194. DMA2_INT_FLAG_GINT2 = 0x10000010,
  195. DMA2_INT_FLAG_TC2 = 0x10000020,
  196. DMA2_INT_FLAG_HT2 = 0x10000040,
  197. DMA2_INT_FLAG_TERR2 = 0x10000080,
  198. DMA2_INT_FLAG_GINT3 = 0x10000100,
  199. DMA2_INT_FLAG_TC3 = 0x10000200,
  200. DMA2_INT_FLAG_HT3 = 0x10000400,
  201. DMA2_INT_FLAG_TERR3 = 0x10000800,
  202. DMA2_INT_FLAG_GINT4 = 0x10001000,
  203. DMA2_INT_FLAG_TC4 = 0x10002000,
  204. DMA2_INT_FLAG_HT4 = 0x10004000,
  205. DMA2_INT_FLAG_TERR4 = 0x10008000,
  206. DMA2_INT_FLAG_GINT5 = 0x10010000,
  207. DMA2_INT_FLAG_TC5 = 0x10020000,
  208. DMA2_INT_FLAG_HT5 = 0x10040000,
  209. DMA2_INT_FLAG_TERR5 = 0x10080000
  210. } DMA_INT_FLAG_T;
  211. /**@} end of group DMA_Enumerations*/
  212. /** @addtogroup DMA_Structure Data Structure
  213. @{
  214. */
  215. /**
  216. * @brief DMA Config struct definition
  217. */
  218. typedef struct
  219. {
  220. uint32_t peripheralBaseAddr;
  221. uint32_t memoryBaseAddr;
  222. DMA_DIR_T dir;
  223. uint32_t bufferSize;
  224. DMA_PERIPHERAL_INC_T peripheralInc;
  225. DMA_MEMORY_INC_T memoryInc;
  226. DMA_PERIPHERAL_DATA_SIZE_T peripheralDataSize;
  227. DMA_MEMORY_DATA_SIZE_T memoryDataSize;
  228. DMA_LOOP_MODE_T loopMode;
  229. DMA_PRIORITY_T priority;
  230. DMA_M2MEN_T M2M;
  231. } DMA_Config_T;
  232. /**@} end of group DMA_Structure*/
  233. /** @addtogroup DMA_Fuctions Fuctions
  234. @{
  235. */
  236. /** Reset and configuration */
  237. void DMA_Reset(DMA_Channel_T *channel);
  238. void DMA_Config(DMA_Channel_T* channel, DMA_Config_T* dmaConfig);
  239. void DMA_ConfigStructInit( DMA_Config_T* dmaConfig);
  240. void DMA_Enable(DMA_Channel_T *channel);
  241. void DMA_Disable(DMA_Channel_T *channel);
  242. /** Data number */
  243. void DMA_ConfigDataNumber(DMA_Channel_T *channel, uint16_t dataNumber);
  244. uint16_t DMA_ReadDataNumber(DMA_Channel_T *channel);
  245. /** Interrupt and flag */
  246. void DMA_EnableInterrupt(DMA_Channel_T *channel, uint32_t interrupt);
  247. void DMA_DisableInterrupt(DMA_Channel_T *channel, uint32_t interrupt);
  248. uint8_t DMA_ReadStatusFlag(DMA_FLAG_T flag);
  249. void DMA_ClearStatusFlag(uint32_t flag);
  250. uint8_t DMA_ReadIntFlag(DMA_INT_FLAG_T flag);
  251. void DMA_ClearIntFlag(uint32_t flag);
  252. /**@} end of group DMA_Fuctions*/
  253. /**@} end of group DMA_Driver */
  254. /**@} end of group Peripherals_Library*/
  255. #ifdef __cplusplus
  256. }
  257. #endif
  258. #endif /* __APM32F10X_DMA_H */