drv_dma.h 1.3 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-11-09 shelton first version
  9. * 2023-01-31 shelton add support f421/f425
  10. * 2023-04-08 shelton add support f423
  11. */
  12. #ifndef __DRV_DMA_H__
  13. #define __DRV_DMA_H__
  14. #ifdef __cplusplus
  15. extern "C" {
  16. #endif
  17. #include <rtdevice.h>
  18. #include <rtthread.h>
  19. #include "drv_common.h"
  20. #define DMA_GLO_FLAG 0x0001U
  21. #define DMA_FDT_FLAG 0x0002U
  22. #define DMA_HDT_FLAG 0x0004U
  23. #define DMA_DTE_FLAG 0x0008U
  24. struct dma_config {
  25. dma_type *dma_x;
  26. rt_uint8_t channel_index;
  27. rt_bool_t dma_done;
  28. dma_channel_type *dma_channel;
  29. crm_periph_clock_type dma_clock;
  30. IRQn_Type dma_irqn;
  31. #if defined (SOC_SERIES_AT32F425)
  32. rt_uint8_t flex_channel;
  33. rt_uint32_t request_id;
  34. #endif
  35. #if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437) || \
  36. defined (SOC_SERIES_AT32F423) || defined (SOC_SERIES_AT32F402) || \
  37. defined (SOC_SERIES_AT32F405)
  38. dmamux_channel_type *dmamux_channel;
  39. rt_uint32_t request_id;
  40. #endif
  41. };
  42. #ifdef __cplusplus
  43. }
  44. #endif
  45. #endif /*__DRV_DMA_H__ */
  46. /************************** end of file ******************/