hal_sdpin.c 8.7 KB

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  1. /**
  2. * @file hal_sdhost.c
  3. * @author ALLWINNERTECH IOT WLAN Team
  4. */
  5. /*
  6. * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved.
  7. *
  8. * Redistribution and use in source and binary forms, with or without
  9. * modification, are permitted provided that the following conditions
  10. * are met:
  11. * 1. Redistributions of source code must retain the above copyright
  12. * notice, this list of conditions and the following disclaimer.
  13. * 2. Redistributions in binary form must reproduce the above copyright
  14. * notice, this list of conditions and the following disclaimer in the
  15. * documentation and/or other materials provided with the
  16. * distribution.
  17. * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of
  18. * its contributors may be used to endorse or promote products derived
  19. * from this software without specific prior written permission.
  20. *
  21. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27. * LIMITED TO, )|hhst->sdio_irq_maskPROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. */
  33. #include <hal_gpio.h>
  34. #include <stdio.h>
  35. #include <stdlib.h>
  36. #ifndef CONFIG_KERNEL_FREERTOS
  37. #include <log.h>
  38. #endif
  39. #include "_sdhost.h"
  40. #include "_sd_define.h"
  41. #ifndef SDC_MAX_PIN_NUM
  42. #define SDC_MAX_PIN_NUM 13
  43. #endif
  44. typedef struct
  45. {
  46. uint32_t *pin;
  47. uint8_t pin_num : 3;
  48. uint8_t pin_mux : 3;
  49. uint8_t pin_drv : 2;
  50. } sdmmc_pin_t;
  51. static sdmmc_pin_t sunxi_sdmmc_pin[4];
  52. int32_t sdmmc_pinctl_set_from_cfg(struct mmc_host *host, char *sdc_str, uint32_t pin_num)
  53. {
  54. #ifdef HAL_SetPin
  55. int32_t ret = 0;
  56. user_gpio_set_t gpiocfg[SDC_MAX_PIN_NUM] = {0};
  57. int i = 0;
  58. int gpio_num = 0;
  59. if (pin_num > SDC_MAX_PIN_NUM) {
  60. SDC_LOGE("pin num over %d\n", SDC_MAX_PIN_NUM);
  61. return ret;
  62. }
  63. ret = Hal_Cfg_GetGPIOSecData(sdc_str, gpiocfg, pin_num);
  64. if(ret < 0) {
  65. SDC_LOGE("%s not has pin setting on sys_config.fex\n", sdc_str);
  66. return ret;
  67. }
  68. for (i = 0;i < pin_num; i++) {
  69. SDC_LOGD("name %s,port %d,port_num %d,mul_sel %d, pull %d, drv_level %d\n",\
  70. gpiocfg[i].gpio_name, gpiocfg[i].port, gpiocfg[i].port_num, \
  71. gpiocfg[i].mul_sel, gpiocfg[i].pull, gpiocfg[i].drv_level);
  72. }
  73. for(i = 0; i< pin_num; i++ ) {
  74. gpio_num = (gpiocfg[i].port - 1) * PINS_PER_BANK + gpiocfg[i].port_num;
  75. ret = hal_gpio_pinmux_set_function(gpio_num, gpiocfg[i].mul_sel);
  76. if (ret) {
  77. SDC_LOGE(
  78. "[sdmmc %s] PIN%lu set function failed! return %d\n",
  79. sdc_str, gpio_num, ret);
  80. return -1;
  81. }
  82. ret = hal_gpio_set_driving_level(gpio_num, gpiocfg[i].drv_level);
  83. if (ret) {
  84. SDC_LOGE(
  85. "[sdmmc %s] PIN%lu set driving level failed! return %d\n",
  86. sdc_str, gpio_num, ret);
  87. return -1;
  88. }
  89. ret = hal_gpio_set_pull(gpio_num, gpiocfg[i].pull);
  90. if (ret) {
  91. SDC_LOGE(
  92. "[sdmmc %s] PIN%lu set driving level failed! return %d\n",
  93. sdc_str, gpio_num, ret);
  94. return -1;
  95. }
  96. }
  97. return ret;
  98. #else
  99. SDC_LOGN("unsupport sys fex %d\n");
  100. return -1;
  101. #endif
  102. }
  103. uint32_t sdmmc_pinctrl_init(struct mmc_host *host)
  104. {
  105. uint8_t i;
  106. uint32_t flags = 0;
  107. int ret;
  108. uint32_t host_id = host->sdc_id;
  109. switch (host_id) {
  110. case 0:
  111. ret = sdmmc_pinctl_set_from_cfg(host, "sdc0", SDC0_NUM);
  112. if(ret < 0) {
  113. sunxi_sdmmc_pin[host_id].pin_num = SDC0_NUM;
  114. sunxi_sdmmc_pin[host_id].pin_mux = SDMMC_MUXSEL;
  115. sunxi_sdmmc_pin[host_id].pin_drv = SDMMC_DRVSEL;
  116. sunxi_sdmmc_pin[host_id].pin = malloc(sizeof(uint32_t) * SDC0_NUM);
  117. sunxi_sdmmc_pin[host_id].pin[0] = SDC0_CLK;
  118. sunxi_sdmmc_pin[host_id].pin[1] = SDC0_CMD;
  119. sunxi_sdmmc_pin[host_id].pin[2] = SDC0_D0;
  120. sunxi_sdmmc_pin[host_id].pin[3] = SDC0_D1;
  121. sunxi_sdmmc_pin[host_id].pin[4] = SDC0_D2;
  122. sunxi_sdmmc_pin[host_id].pin[5] = SDC0_D3;
  123. SDC_LOGE("sdmmc%ld use default pin setting\n", host_id);
  124. } else {
  125. SDC_LOGD("sdmmc%ld use pin setting on sys_config.fex\n", host_id);
  126. goto out;
  127. }
  128. break;
  129. case 1:
  130. if (host->param.pwr_mode == POWER_MODE_330) {
  131. hal_gpio_sel_vol_mode(SDC1_D0, POWER_MODE_330);
  132. } else {
  133. hal_gpio_sel_vol_mode(SDC1_D0, POWER_MODE_180);
  134. }
  135. ret = sdmmc_pinctl_set_from_cfg(host, "sdc1", SDC1_NUM);
  136. if(ret < 0) {
  137. sunxi_sdmmc_pin[host_id].pin_num = SDC1_NUM;
  138. sunxi_sdmmc_pin[host_id].pin_mux = SDMMC_MUXSEL;
  139. sunxi_sdmmc_pin[host_id].pin_drv = SDMMC_DRVSEL;
  140. sunxi_sdmmc_pin[host_id].pin = malloc(sizeof(uint32_t) * SDC1_NUM);
  141. sunxi_sdmmc_pin[host_id].pin[0] = SDC1_CLK;
  142. sunxi_sdmmc_pin[host_id].pin[1] = SDC1_CMD;
  143. sunxi_sdmmc_pin[host_id].pin[2] = SDC1_D0;
  144. // sunxi_sdmmc_pin[host_id].pin[3] = SDC1_D1;
  145. // sunxi_sdmmc_pin[host_id].pin[4] = SDC1_D2;
  146. // sunxi_sdmmc_pin[host_id].pin[5] = SDC1_D3;
  147. SDC_LOGE("sdmmc%ld use default pin setting\n", host_id);
  148. } else {
  149. SDC_LOGD("sdmmc%ld use pin setting on sys_config.fex\n", host_id);
  150. goto out;
  151. }
  152. break;
  153. default:
  154. SDC_LOGE("sdmmc%ld is invalid\n", host_id);
  155. return -1;
  156. }
  157. for (i = 0; i < sunxi_sdmmc_pin[host_id].pin_num; i++)
  158. {
  159. ret = hal_gpio_pinmux_set_function(sunxi_sdmmc_pin[host_id].pin[i], sunxi_sdmmc_pin[host_id].pin_mux);
  160. if (ret)
  161. {
  162. SDC_LOGE(
  163. "[sdmmc%ld] PIN%lu set function failed! return %d\n",
  164. host_id, sunxi_sdmmc_pin[host_id].pin[i], ret);
  165. return -1;
  166. }
  167. ret = hal_gpio_set_driving_level(sunxi_sdmmc_pin[host_id].pin[i], sunxi_sdmmc_pin[host_id].pin_drv);
  168. if (ret)
  169. {
  170. SDC_LOGE(
  171. "[sdmmc%ld] PIN%lu set driving level failed! return %d\n",
  172. host_id, sunxi_sdmmc_pin[host_id].pin[i], ret);
  173. return -1;
  174. }
  175. ret = hal_gpio_set_pull(sunxi_sdmmc_pin[host_id].pin[i], GPIO_PULL_UP);
  176. // ret = drv_gpio_set_pull_state(sunxi_sdmmc_pin[host_id].pin[i], DRV_GPIO_PULL_DOWN_DISABLE);
  177. }
  178. out:
  179. return 0;
  180. }
  181. int mmc_gpiod_request_cd_irq(struct mmc_host *host)
  182. {
  183. uint32_t irq;
  184. int ret = 0;
  185. gpio_pull_status_t pull_state;
  186. gpio_direction_t gpio_direction;
  187. gpio_data_t gpio_data;
  188. host->cd_gpio_pin = SDC0_DET;
  189. /*set gpio detect-clk 24M*/
  190. hal_gpio_set_debounce(host->cd_gpio_pin, 1);
  191. ret = hal_gpio_to_irq(host->cd_gpio_pin, &irq);
  192. if (ret < 0)
  193. {
  194. SDC_LOGE("gpio to irq error, error num: %d\n", ret);
  195. return ret;
  196. }
  197. /*set pin mux*/
  198. ret = hal_gpio_pinmux_set_function(host->cd_gpio_pin, 0);
  199. ret = hal_gpio_set_driving_level(host->cd_gpio_pin, 3);
  200. ret = hal_gpio_set_pull(host->cd_gpio_pin, 1);
  201. if (ret < 0)
  202. {
  203. SDC_LOGE("set pin mux error!\n");
  204. return -1;
  205. }
  206. host->cd_irq = irq;
  207. ret = hal_gpio_irq_request(irq, host->cd_gpio_isr, IRQ_TYPE_EDGE_BOTH, host);
  208. if (ret < 0)
  209. {
  210. SDC_LOGE("request irq error, irq num:%lu error num: %d\n", (unsigned long)irq, ret);
  211. return ret;
  212. }
  213. #if 0
  214. ret = drv_gpio_irq_enable(irq);
  215. if (ret < 0)
  216. {
  217. printf("request irq error, error num: %d\n", ret);
  218. return ret;
  219. }
  220. ret = drv_gpio_irq_disable(irq);
  221. if (ret < 0)
  222. {
  223. printf("disable irq error, irq num:%lu,error num: %d\n", irq, ret);
  224. return ret;
  225. }
  226. ret = drv_gpio_irq_free(irq);
  227. if (ret < 0)
  228. {
  229. printf("free irq error, error num: %d\n", ret);
  230. return ret;
  231. }
  232. #endif
  233. return ret;
  234. }